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2022-09-12Merge tag 'v6.1-rockchip-drivers1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/drivers Powerdomain drivers for rv1126 and rk3588 socs, keep current state of power-domains instead of always enabling when adding them, add rv1126 io domains and add binding for another "general register files" syscon. * tag 'v6.1-rockchip-drivers1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: soc: rockchip: power-domain: add power domain support for rk3588 soc: rockchip: power-domain: do not enable domain when adding it dt-bindings: power: rockchip: Add bindings for rk3588 dt-bindings: arm: rockchip: add rk5388 compatible string to pmu.yaml dt-bindings: power: add power-domain header for rk3588 soc: rockchip: io-domain: Add RV1126 IO domains dt-bindings: power: rockchip: Document RV1126 PMU IO domains soc: rockchip: power-domain: Add RV1126 power domains dt-bindings: power: rockchip: Document RV1126 power-controller dt-bindings: power: Add power-domain header for RV1126 dt-bindings: soc: grf: add pcie30-{phy,pipe}-grf Link: https://lore.kernel.org/r/2252399.ElGaqSPkdT@phil Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-09-09soc: rockchip: power-domain: add power domain support for rk3588Finley Xiao
This driver is modified to support RK3588 SoCs. Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com> [port of downstream code incl. merging in fixes] Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20220906143825.199089-7-sebastian.reichel@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-09-09soc: rockchip: power-domain: do not enable domain when adding itElaine Zhang
It's not need to power on all pd when add pm domain. Instead use PD's real status in pm_genpd_init(). Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20220906143825.199089-6-sebastian.reichel@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-09-08soc: sunxi: sram: Fix debugfs info for A64 SRAM CSamuel Holland
The labels were backward with respect to the register values. The SRAM is mapped to the CPU when the register value is 1. Fixes: 5e4fb6429761 ("drivers: soc: sunxi: add support for A64 and its SRAM C") Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20220815041248.53268-7-samuel@sholland.org
2022-09-08soc: sunxi: sram: Fix probe function ordering issuesSamuel Holland
Errors from debugfs are intended to be non-fatal, and should not prevent the driver from probing. Since debugfs file creation is treated as infallible, move it below the parts of the probe function that can fail. This prevents an error elsewhere in the probe function from causing the file to leak. Do the same for the call to of_platform_populate(). Finally, checkpatch suggests an octal literal for the file permissions. Fixes: 4af34b572a85 ("drivers: soc: sunxi: Introduce SoC driver to map SRAMs") Fixes: 5828729bebbb ("soc: sunxi: export a regmap for EMAC clock reg on A64") Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20220815041248.53268-6-samuel@sholland.org
2022-09-08soc: sunxi: sram: Prevent the driver from being unboundSamuel Holland
This driver exports a regmap tied to the platform device (as opposed to a syscon, which exports a regmap tied to the OF node). Because of this, the driver can never be unbound, as that would destroy the regmap. Use builtin_platform_driver_probe() to enforce this limitation. Fixes: 5828729bebbb ("soc: sunxi: export a regmap for EMAC clock reg on A64") Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20220815041248.53268-5-samuel@sholland.org
2022-09-08soc: sunxi: sram: Actually claim SRAM regionsSamuel Holland
sunxi_sram_claim() checks the sram_desc->claimed flag before updating the register, with the intent that only one device can claim a region. However, this was ineffective because the flag was never set. Fixes: 4af34b572a85 ("drivers: soc: sunxi: Introduce SoC driver to map SRAMs") Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20220815041248.53268-4-samuel@sholland.org
2022-09-08Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netPaolo Abeni
drivers/net/ethernet/freescale/fec.h 7d650df99d52 ("net: fec: add pm_qos support on imx6q platform") 40c79ce13b03 ("net: fec: add stop mode support for imx8 platform") Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2022-09-08Merge tag 'amlogic-drivers-for-v6.1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into arm/drivers Amlogic Drivers changes for v6.1: - Hold reference returned by of_get_parent() in meson_pwrc * tag 'amlogic-drivers-for-v6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux: soc: amlogic: meson-pwrc: Hold reference returned by of_get_parent() Link: https://lore.kernel.org/r/ea093c00-a4bb-fb80-3430-71916b2853f8@baylibre.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-09-05soc: qcom: icc-bwmon: force clear counter/irq registersRajendra Nayak
In some SoCs we have to force clear the counter/irq clear registers as they are not self clearing after they are written into. sc7280 seems to be one such SoC, handle this with a quirk flag. Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220902043511.17130-4-quic_rjendra@quicinc.com
2022-09-05soc: qcom: icc-bwmon: add support for sc7280 LLCC BWMONRajendra Nayak
Add support for sc7280 BWMON instance measuring traffic between LLCC and memory with the v5 register layout. Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220902043511.17130-3-quic_rjendra@quicinc.com
2022-09-05soc: fsl: qbman: Add CGR update functionSean Anderson
This adds a function to update a CGR with new parameters. qman_create_cgr can almost be used for this (with flags=0), but it's not suitable because it also registers the callback function. The _safe variant was modeled off of qman_cgr_delete_safe. However, we handle multiple arguments and a return value. Signed-off-by: Sean Anderson <sean.anderson@seco.com> Acked-by: Camelia Groza <camelia.groza@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-05soc: fsl: qbman: Add helper for sanity checking cgr opsSean Anderson
This breaks out/combines get_affine_portal and the cgr sanity check in preparation for the next commit. No functional change intended. Signed-off-by: Sean Anderson <sean.anderson@seco.com> Acked-by: Camelia Groza <camelia.groza@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-05soc: rockchip: io-domain: Add RV1126 IO domainsJianqun Xu
Add IO domains support for RV1126 SoC. Cc: Liam Girdwood <lgirdwood@gmail.com> Cc: Mark Brown <broonie@kernel.org> Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com> Signed-off-by: Jagan Teki <jagan@edgeble.ai> Link: https://lore.kernel.org/r/20220818124132.125304-6-jagan@edgeble.ai Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-09-05soc: rockchip: power-domain: Add RV1126 power domainsJagan Teki
Add power domains support for RV1126 SoC. Cypto, VO and NPU domains will add it future patches. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Signed-off-by: Jagan Teki <jagan@edgeble.ai> Link: https://lore.kernel.org/r/20220818124132.125304-4-jagan@edgeble.ai Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-09-05soc: amlogic: meson-pwrc: Hold reference returned by of_get_parent()Liang He
We should hold the reference returned by of_get_parent() and use it to call of_node_put() for refcount balance. Signed-off-by: Liang He <windhl@126.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/20220726073841.1320509-1-windhl@126.com
2022-09-02soc: fsl: select FSL_GUTS driver for DPIOMathew McBride
The soc/fsl/dpio driver will perform a soc_device_match() to determine the optimal cache settings for a given CPU core. If FSL_GUTS is not enabled, this search will fail and the driver will not configure cache stashing for the given DPIO, and a string of "unknown SoC" messages will appear: fsl_mc_dpio dpio.7: unknown SoC version fsl_mc_dpio dpio.6: unknown SoC version fsl_mc_dpio dpio.5: unknown SoC version Fixes: 51da14e96e9b ("soc: fsl: dpio: configure cache stashing destination") Signed-off-by: Mathew McBride <matt@traverse.com.au> Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20220901052149.23873-2-matt@traverse.com.au' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-09-02Merge tag 'arm-soc/for-6.0/drivers-fixes' of ↵Arnd Bergmann
https://github.com/Broadcom/stblinux into arm/fixes This pull request contains Broadcom SoCs driver fixes for 6.0, please pull the following: - Liang fixes the legacy Broadcom STB ARM system suspend/resume code error paths that were leaking ioremap() and other of_* operations * tag 'arm-soc/for-6.0/drivers-fixes' of https://github.com/Broadcom/stblinux: soc: brcmstb: pm-arm: Fix refcount leak and __iomem leak bugs Link: https://lore.kernel.org/r/20220829225103.753223-2-f.fainelli@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-08-31soc: mediatek: mutex: Add mt8186 mutex mod settings for mdp3Allen-KH Cheng
Add mt8186 mutex mod settings for mdp3. Co-developed-by: Xiandong Wang <xiandong.wang@mediatek.com> Signed-off-by: Xiandong Wang <xiandong.wang@mediatek.com> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220831172151.10215-3-allen-kh.cheng@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-08-31soc: mediatek: pm-domains: Simplify some error messageChristophe JAILLET
dev_err_probe() already prints the error code in a human readable way, so there is no need to duplicate it as a numerical value at the end of the message. Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Link: https://lore.kernel.org/r/e6ba80d8e27fdb2b1527c7eae6687e481960c81d.1659735996.git.christophe.jaillet@wanadoo.fr Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-08-30soc: mediatek: mtk-svs: Explicitly include bitfield headerNícolas F. R. A. Prado
Commit a92438c5a30a ("soc: mediatek: mtk-svs: Use bitfield access macros where possible") introduced the use of FIELD_GET and FIELD_PREP macros, which are defined in the bitfield header. Add an explicit include for it so we're sure to have the symbols defined independently of the config. Fixes: a92438c5a30a ("soc: mediatek: mtk-svs: Use bitfield access macros where possible") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220829204439.3748648-1-nfraprado@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-08-29Merge tag '20220825043859.30066-3-manivannan.sadhasivam@linaro.org' into ↵Bjorn Andersson
drivers-for-6.1 v6.0-rc1 + 20220825043859.30066-2-manivannan.sadhasivam@linaro.org + 20220825043859.30066-3-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2022-08-29soc: qcom: llcc: Pass LLCC version based register offsets to EDAC driverManivannan Sadhasivam
The LLCC EDAC register offsets varies between each SoCs. Until now, the EDAC driver used the hardcoded register offsets. But this caused crash on SM8450 SoC where the register offsets has been changed. So to avoid this crash and also to make it easy to accommodate changes for new SoCs, let's pass the LLCC version specific register offsets to the EDAC driver. Currently, two set of offsets are used. One is starting from LLCC version v1.0.0 used by all SoCs other than SM8450. For SM8450, LLCC version starting from v2.1.0 is used. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220825043859.30066-3-manivannan.sadhasivam@linaro.org
2022-08-29soc: qcom: llcc: Rename reg_offset structs to reflect LLCC versionManivannan Sadhasivam
The register offsets used by the LLCC block retains its layout for multiple versions. For instance, starting from version v1.0.0 to v2.0.1 the offsets are same. And starting from v2.1.0, the offsets changed. But the current reg_offset naming convention is confusing. So to reflect this change correctly in driver, let's encode the start version from which the offsets got changed in reg_offset struct name. This will be llcc_v1_reg_offset for v1.0.0 and llcc_v2_1_reg_offset for v2.1.0. This will allow multiple SoCs to use the same reg_offset clearly. And in the future if the offsets got changed again, then that specific version could be encoded in the struct name. Suggested-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220825043859.30066-2-manivannan.sadhasivam@linaro.org
2022-08-29soc: qcom: qmi: use const for struct qmi_elem_infoJeff Johnson
Currently all usage of struct qmi_elem_info, which is used to define the QMI message encoding/decoding rules, does not use const. This prevents clients from registering const arrays. Since these arrays are always pre-defined, they should be const, so add the const qualifier to all places in the QMI interface where struct qmi_elem_info is used. Once this patch is in place, clients can independently update their pre-defined arrays to be const, as demonstrated in the QMI sample code. Signed-off-by: Jeff Johnson <quic_jjohnson@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220822153435.7856-1-quic_jjohnson@quicinc.com
2022-08-29soc: qcom: icc-bwmon: remove redundant ret variableJinpeng Cui
Return value from devm_regmap_field_bulk_alloc() directly instead of taking this in another redundant variable. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Jinpeng Cui <cui.jinpeng2@zte.com.cn> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220823133620.211902-1-cui.jinpeng2@zte.com.cn
2022-08-29soc: qcom: stats: Add SDM845 stats config and compatibleAbel Vesa
SDM845 is a special case compared to the other platforms that use RPMh stats, since it only has 2 stats (aosd and cxsd), while the others have a 3rd one (ddr). So lets add dedicated stats config and compatible for SDM845 to make the driver aware of this num_records difference. Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220812101240.1869605-2-abel.vesa@linaro.org
2022-08-29soc: qcom: Make QCOM_RPMPD depend on OFYueHaibing
WARNING: unmet direct dependencies detected for PM_GENERIC_DOMAINS_OF Depends on [n]: PM_GENERIC_DOMAINS [=y] && OF [=n] Selected by [m]: - QCOM_RPMPD [=m] && PM [=y] && QCOM_SMD_RPM [=m] PM_GENERIC_DOMAINS_OF depends on OF, so QCOM_RPMPD also depends on it. Fixes: 7d0221fb5912 ("soc/qcom: Make QCOM_RPMPD select PM_GENERIC_DOMAINS/_OF") Signed-off-by: YueHaibing <yuehaibing@huawei.com> Acked-by: Randy Dunlap <rdunlap@infradead.org> # build-tested Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220820113202.23940-1-yuehaibing@huawei.com
2022-08-29soc: brcmstb: pm-arm: Fix refcount leak and __iomem leak bugsLiang He
In brcmstb_pm_probe(), there are two kinds of leak bugs: (1) we need to add of_node_put() when for_each__matching_node() breaks (2) we need to add iounmap() for each iomap in fail path Fixes: 0b741b8234c8 ("soc: bcm: brcmstb: Add support for S2/S3/S5 suspend states (ARM)") Signed-off-by: Liang He <windhl@126.com> Link: https://lore.kernel.org/r/20220707015620.306468-1-windhl@126.com Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-08-26soc: mediatek: mtk-svs: Use bitfield access macros where possibleAngeloGioacchino Del Regno
In order to enhance readability and safety during registers setup and value retrieval, redefine a few register related macros and convert all open-coded instances of bitfield setting/retrieval to use the FIELD_PREP() and FIELD_GET() macros. While at it, some macros were renamed to further enhance readability. This commit brings no functional changes. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20220825184616.2118870-3-nfraprado@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-08-26soc: mediatek: mtk-svs: Commonize t-calibration-data fuse array readAngeloGioacchino Del Regno
Commonize the repeating pattern for reading the "t-calibration-data" efuse data in a new function svs_thermal_efuse_get_data(), reducing the size of this driver. No functional changes. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20220825184616.2118870-2-nfraprado@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-08-25soc: mediatek: mtk-svs: Use devm variant for dev_pm_opp_of_add_table()AngeloGioacchino Del Regno
In error cases, this driver never calls dev_pm_opp_of_remove_table(): instead of doing that, simple switch to a devm variant, which will automagically do that for us. Fixes: 681a02e95000 ("soc: mediatek: SVS: introduce MTK SVS engine") Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220726141653.177948-6-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-08-25soc: mediatek: mtk-svs: Drop of_match_ptr() for of_match_tableAngeloGioacchino Del Regno
If CONFIG_OF is not set, we get a -Wunused-const-variable: dropping of_match_ptr() solves that issue. Fixes: 681a02e95000 ("soc: mediatek: SVS: introduce MTK SVS engine") Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220726141653.177948-5-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-08-25soc: mediatek: mtk-svs: Remove hardcoded irqflagsAngeloGioacchino Del Regno
The interrupt flags are specified in devicetree: forcing them into the driver is suboptimal and not very useful. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220726141653.177948-4-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-08-25soc: mediatek: mtk-svs: Switch to platform_get_irq()AngeloGioacchino Del Regno
Instead of using irq_of_parse_and_map() to retrieve the interrupt from devicetree, switch to platform_get_irq() instead: this function will conveniently also write an error message in case the irq is not found. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220726141653.177948-3-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-08-25soc: mediatek: Let PMIC Wrapper and SCPSYS depend on OFJean Delvare
With the following configuration options: CONFIG_OF is not set CONFIG_MTK_PMIC_WRAP=y CONFIG_MTK_SCPSYS=y we get the following build warnings: CC drivers/soc/mediatek/mtk-pmic-wrap.o drivers/soc/mediatek/mtk-pmic-wrap.c:2138:34: warning: ‘of_pwrap_match_tbl’ defined but not used [-Wunused-const-variable=] drivers/soc/mediatek/mtk-pmic-wrap.c:1953:34: warning: ‘of_slave_match_tbl’ defined but not used [-Wunused-const-variable=] CC drivers/soc/mediatek/mtk-scpsys.o drivers/soc/mediatek/mtk-scpsys.c:1084:34: warning: ‘of_scpsys_match_tbl’ defined but not used [-Wunused-const-variable=] Looking at the code, both drivers can only bind to OF-defined device nodes, so these drivers are useless without OF and should therefore depend on it. Also drop of_match_ptr() from both drivers. We already know what it will resolve to, so we might as well save cpp some work. Developers or QA teams who wish to test-build the code can still do so by enabling CONFIG_OF, which is available on all architectures and has no dependencies. Signed-off-by: Jean Delvare <jdelvare@suse.de> Reported-by: kernel test robot <lkp@intel.com> Link: https://lore.kernel.org/all/202207240252.ZY5hSCNB-lkp@intel.com/ Cc: Matthias Brugger <matthias.bgg@gmail.com> Cc: Chenglin Xu <chenglin.xu@mediatek.com> Link: https://lore.kernel.org/r/20220730144833.0a0d9825@endymion.delvare Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-08-21soc: imx: gpcv2: Assert reset before ungating clockMarek Vasut
In case the power domain clock are ungated before the reset is asserted, the system might freeze completely. This is likely due to a device is an undefined state being attached to bus, which sporadically leads to a bus hang. Assert the reset before the clock are enabled to assure the device is in defined state before being attached to bus. Fixes: fe58c887fb8ca ("soc: imx: gpcv2: add support for optional resets") Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-08-18soc: qcom: socinfo: Add PM6125 IDKonrad Dybcio
PM6125 has the ID 45. Add it. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220723100225.92053-2-konrad.dybcio@somainline.org
2022-08-18soc: qcom: socinfo: Add an ID for SM6375Konrad Dybcio
Add an ID for SM6375, also known as BLAIR. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220723100225.92053-1-konrad.dybcio@somainline.org
2022-08-18soc: qcom: smem_state: Add refcounting for the 'state->of_node'Liang He
In qcom_smem_state_register() and qcom_smem_state_release(), we should better use of_node_get() and of_node_put() for the reference creation and destruction of 'device_node'. Fixes: 9460ae2ff308 ("soc: qcom: Introduce common SMEM state machine code") Signed-off-by: Liang He <windhl@126.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220721135217.1301039-2-windhl@126.com
2022-08-18soc: qcom: smsm: Fix refcount leak bugs in qcom_smsm_probe()Liang He
There are two refcount leak bugs in qcom_smsm_probe(): (1) The 'local_node' is escaped out from for_each_child_of_node() as the break of iteration, we should call of_node_put() for it in error path or when it is not used anymore. (2) The 'node' is escaped out from for_each_available_child_of_node() as the 'goto', we should call of_node_put() for it in goto target. Fixes: c97c4090ff72 ("soc: qcom: smsm: Add driver for Qualcomm SMSM") Signed-off-by: Liang He <windhl@126.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220721135217.1301039-1-windhl@126.com
2022-08-18soc: qcom: icc-bwmon: add support for SDM845 LLCC BWMONKrzysztof Kozlowski
The SDM845 comes with few instances of Bandwidth Monitor. The already supported one monitors traffic between CPU and Last Level Cache Controller (LLCC) and in downstream sources is called BWMON v4 (or v4 of register layout). SDM845 also has also BWMON instance measuring traffic between LLCC and memory with different register layout: called v5. Add support for this "LLCC" BWMON. Differences against existing v4 one: 1. No global interrupts. 2. Different register layout. 3. Different shift of interrupt fields. 4. Smaller sampling window. Cc: Rajendra Nayak <quic_rjendra@quicinc.com> Cc: Sibi Sankar <quic_sibis@quicinc.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Tested-by: Steev Klimaszewski <steev@kali.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220728113748.170548-10-krzysztof.kozlowski@linaro.org
2022-08-18soc: qcom: icc-bwmon: add per-variant quirksKrzysztof Kozlowski
BWMON v5 lacks global interrupt registers. Other BWMON versions differ as well, so add quirks for easier customization of code flow. Cc: Rajendra Nayak <quic_rjendra@quicinc.com> Cc: Sibi Sankar <quic_sibis@quicinc.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Tested-by: Steev Klimaszewski <steev@kali.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220728113748.170548-9-krzysztof.kozlowski@linaro.org
2022-08-18soc: qcom: icc-bwmon: use regmap and prepare for BWMON v5Krzysztof Kozlowski
Refactor the code to prepare it for supporting BWMON v5 which comes with different register layout by: 1. Adding use of MMIO regmap and regmap fields which allows to keep one code logic with different register maps. 2. The "clear" type registers do not allow reading, therefore regmap requires using cache with default values. 3. regmap has an effect of introducing barriers after each readl/writel, which should negligible effect as only few writes were relaxed. 4. Additionally usage of regmap fields removes need of shifting the register values. 5. Add "V4" prefix to names of all defines with register addresses (so BWMON_V4_xxx) to differentiate it from V5. The actual register values are shared so keep their naming. 6. While changing the defines, pad register addresses to three digits for readability. Cc: Rajendra Nayak <quic_rjendra@quicinc.com> Cc: Sibi Sankar <quic_sibis@quicinc.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Tested-by: Steev Klimaszewski <steev@kali.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220728113748.170548-8-krzysztof.kozlowski@linaro.org
2022-08-18soc: qcom: icc-bwmon: store count unit per variantKrzysztof Kozlowski
Versions v4 and v5 of BWMON on SDM845 use different unit count, so allow easier variant customization by storing its value in struct icc_bwmon_data. Cc: Rajendra Nayak <quic_rjendra@quicinc.com> Cc: Sibi Sankar <quic_sibis@quicinc.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Sibi Sankar <quic_sibis@quicinc.com> Tested-by: Steev Klimaszewski <steev@kali.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220728113748.170548-7-krzysztof.kozlowski@linaro.org
2022-08-18soc: qcom: icc-bwmon: clear all registers on initKrzysztof Kozlowski
The hardware programming guide recommends to clear all registers on first initialization, through separate field in BWMON_CLEAR register. This makes sense in general but especially if driver is rebound to avoid spurious/early interrupts. Cc: Rajendra Nayak <quic_rjendra@quicinc.com> Cc: Sibi Sankar <quic_sibis@quicinc.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Tested-by: Steev Klimaszewski <steev@kali.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220728113748.170548-6-krzysztof.kozlowski@linaro.org
2022-08-18soc: qcom: icc-bwmon: store reference to variant data in containerKrzysztof Kozlowski
Instead of copying pieces of variant-specific data (struct icc_bwmon_data) into the state container (struct icc_bwmon), just store a pointer to it. This simplifies a bit the code and allows later to grow easily the variant-specific data for new BWMON v5. Cc: Rajendra Nayak <quic_rjendra@quicinc.com> Cc: Sibi Sankar <quic_sibis@quicinc.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Sibi Sankar <quic_sibis@quicinc.com> Tested-by: Steev Klimaszewski <steev@kali.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220728113748.170548-5-krzysztof.kozlowski@linaro.org
2022-08-18soc: qcom: icc-bwmon: drop unused registersKrzysztof Kozlowski
BWMON_GLOBAL_IRQ_STATUS and BWMON_ZONE_COUNT defines are not used. Cc: Rajendra Nayak <quic_rjendra@quicinc.com> Cc: Sibi Sankar <quic_sibis@quicinc.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Sibi Sankar <quic_sibis@quicinc.com> Tested-by: Steev Klimaszewski <steev@kali.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220728113748.170548-4-krzysztof.kozlowski@linaro.org
2022-08-18soc: qcom: icc-bwmon: re-use IRQ enable/clear defineKrzysztof Kozlowski
The interrupt enable, status and clear registers have the same layout, so BWMON_GLOBAL_IRQ_ENABLE_ENABLE define can be used also for clearing IRQ, instead of hard-coded value. Cc: Rajendra Nayak <quic_rjendra@quicinc.com> Cc: Sibi Sankar <quic_sibis@quicinc.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Sibi Sankar <quic_sibis@quicinc.com> Tested-by: Steev Klimaszewski <steev@kali.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220728113748.170548-3-krzysztof.kozlowski@linaro.org
2022-08-17Revert "soc: imx: imx8m-blk-ctrl: set power device name"Marco Felsch
This reverts commit 8239d67f59cf522dd4f7135392a2f9a3a25f9cff. This change confuses the sysfs cleanup path since the rename is done after the device registration. Fixes: 8239d67f59cf ("soc: imx: imx8m-blk-ctrl: set power device name") Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
generated by cgit (git 2.34.1) at 2025-06-02 00:21:43 +0000