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path: root/drivers/spi/atmel-quadspi.c
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2020-07-17spi: atmel-quadspi: Use optimezed memcpy_fromio()/memcpy_toio()Tudor Ambarus
Optimezed mem*io operations are defined for LE platforms, use them. The ARM and !ARCH_EBSA110 dependencies for COMPILE_TEST were added only for the _memcpy_fromio()/_memcpy_toio() functions. Drop these dependencies. Tested unaligned accesses on both sama5d2 and sam9x60 QSPI controllers using SPI NOR flashes, everything works ok. The following performance improvement can be seen when running mtd_speedtest: sama5d2_xplained (mx25l25635e) - before: mtd_speedtest: eraseblock write speed is 983 KiB/s mtd_speedtest: eraseblock read speed is 6150 KiB/s - after: mtd_speedtest: eraseblock write speed is 1055 KiB/s mtd_speedtest: eraseblock read speed is 20144 KiB/s sam9x60ek (sst26vf064b) - before: mtd_speedtest: eraseblock write speed is 4770 KiB/s mtd_speedtest: eraseblock read speed is 8062 KiB/s - after: mtd_speedtest: eraseblock write speed is 4524 KiB/s mtd_speedtest: eraseblock read speed is 21186 KiB/s Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200716043139.565734-1-tudor.ambarus@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-07-14spi: atmel-quadspi: reject DTR opsPratyush Yadav
Double Transfer Rate (DTR) ops are added in spi-mem. But this controller doesn't support DTR transactions. Since we don't use the default supports_op(), which rejects all DTR ops, do that explicitly in our supports_op(). Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200623183030.26591-4-p.yadav@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-03-20spi: atmel-quadspi: Add verbose debug facilities to monitor register accessesTudor Ambarus
This feature should not be enabled in release but can be useful for developers who need to monitor register accesses at some specific places. Helped me identify a bug in u-boot, by comparing the register accesses from the linux driver with the ones from its u-boot variant. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200320065058.891221-1-tudor.ambarus@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-02-28spi: atmel-quadspi: fix possible MMIO window size overrunTudor Ambarus
The QSPI controller memory space is limited to 128MB: 0x9000_00000-0x9800_00000/0XD000_0000--0XD800_0000. There are nor flashes that are bigger in size than the memory size supported by the controller: Micron MT25QL02G (256 MB). Check if the address exceeds the MMIO window size. An improvement would be to add support for regular SPI mode and fall back to it when the flash memories overrun the controller's memory space. Fixes: 0e6aae08e9ae ("spi: Add QuadSPI driver for Atmel SAMA5D2") Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200228155437.1558219-1-tudor.ambarus@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-08-02spi: Remove dev_err() usage after platform_get_irq()Stephen Boyd
We don't need dev_err() messages when platform_get_irq() fails now that platform_get_irq() prints an error message itself when something goes wrong. Let's remove these prints with a simple semantic patch. // <smpl> @@ expression ret; struct platform_device *E; @@ ret = ( platform_get_irq(E, ...) | platform_get_irq_byname(E, ...) ); if ( \( ret < 0 \| ret <= 0 \) ) { ( -if (ret != -EPROBE_DEFER) -{ ... -dev_err(...); -... } | ... -dev_err(...); ) ... } // </smpl> While we're here, remove braces on if statements that only have one statement (manually). Cc: Mark Brown <broonie@kernel.org> Cc: linux-spi@vger.kernel.org Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20190730181557.90391-42-swboyd@chromium.org Signed-off-by: Mark Brown <broonie@kernel.org>
2019-07-02spi: atmel-quadspi: fix resume callTudor Ambarus
When waking up from the Suspend-to-RAM state, the following error was seen: m25p80 spi2.0: flash operation timed out The flash remained in an undefined state, returning 0xFFs. Fix it by setting the Serial Clock Baud Rate, as it was set before the conversion to SPIMEM. Tested with sama5d2_xplained and mx25l25673g spi-nor in Backup + Self-Refresh and Suspend modes. Fixes: 0e6aae08e9ae ("spi: Add QuadSPI driver for Atmel SAMA5D2") Reported-by: Mark Deneen <mdeneen@gmail.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2019-07-02spi: atmel-quadspi: void return type for atmel_qspi_init()Tudor Ambarus
commit 2d30ac5ed633 ("mtd: spi-nor: atmel-quadspi: Use spi-mem interface for atmel-quadspi driver") removed the error path from atmel_qspi_init(), but not changed the function's return type. Set void return type for atmel_qspi_init(). Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2019-05-02Merge branch 'spi-5.2' into spi-nextMark Brown
2019-05-02spi: atmel-quadspi: fix crash while suspendingClaudiu Beznea
atmel_qspi objects are kept in spi_controller objects, so, first get pointer to spi_controller object and then get atmel_qspi object from spi_controller object. Fixes: 2d30ac5ed633 ("mtd: spi-nor: atmel-quadspi: Use spi-mem interface for atmel-quadspi driver") Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2019-03-25spi: atmel-quadspi: Make atmel_qspi_get_name staticYueHaibing
Fix sparse warning: drivers/spi/atmel-quadspi.c:369:12: warning: symbol 'atmel_qspi_get_name' was not declared. Should it be static? Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2019-02-06spi: atmel-quadspi: add support for sam9x60 qspi controllerTudor Ambarus
The sam9x60 qspi controller uses 2 clocks, one for the peripheral register access, the other for the qspi core and phy. Both are mandatory. It uses different transfer type bits in IFR register. It has dedicated registers to specify a read or a write instruction: Read Instruction Code Register (RICR) and Write Instruction Code Register (WICR). ICR/RICR/WICR have identical fields. Tested with sst26vf064b jedec,spi-nor flash. Backward compatibility test done on sama5d2 qspi controller and mx25l25635e jedec,spi-nor flash. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2019-02-06spi: atmel-quadspi: add support for named peripheral clockTudor Ambarus
Naming clocks is a good practice. Keep supporting unnamed peripheral clock, to be backward compatible with old DTs. While here, rename clk to pclk, to indicate that it is a peripheral clock. Suggested-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2019-02-06spi: atmel-quadspi: rework transfer macrosTudor Ambarus
Split the TFRTYP_TRSFR_ bitfields in 2: one bit encoding the mem/reg transfer type and one bit encoding the direction of the transfer (read/write). Remove NOP when setting read transfer type. Remove useless setting of write transfer type when op->data.dir == SPI_MEM_DATA_IN && !op->data.nbytes. QSPI_IFR_TFRTYP_TRSFR_WRITE is specific just to sama5d2 qspi, rename it to QSPI_IFR_SAMA5D2_WRITE_TRSFR. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2019-02-06spi: atmel-quadspi: switch to SPDX license identifiersTudor Ambarus
Adopt the SPDX license identifiers to ease license compliance management. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2019-02-06spi: atmel-quadspi: return appropriate error codeTudor Ambarus
Return -ENOTSUPP when atmel_qspi_find_mode() fails. Propagate the error in atmel_qspi_exec_op(). Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2019-02-06spi: atmel-quadspi: remove unnecessary castTudor Ambarus
The cast is done implicitly. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2019-02-06spi: atmel-quadspi: fix naming schemeTudor Ambarus
Let general names to core drivers. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2019-02-06spi: atmel-quadspi: drop wrappers for iomem accessesTudor Ambarus
The wrappers hid that the accesses are relaxed. Drop them. Suggested-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2019-02-06spi: atmel-quadspi: order header files inclusion alphabeticallyTudor Ambarus
Cosmetic change, no functional change. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2019-02-06spi: atmel-quadspi: cache MR value to avoid a write accessTudor Ambarus
Set the controller by default in Serial Memory Mode (SMM) at probe. Cache Mode Register (MR) value to avoid write access when setting the controller in serial memory mode at exec_op(). Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-07spi: Add QuadSPI driver for Atmel SAMA5D2Piotr Bugalski
Kernel contains QSPI driver strongly tied to MTD and nor-flash memory. New spi-mem interface allows usage also other memory types, especially much larger NAND with SPI interface. This driver works as SPI controller and is not related to MTD, however can work with NAND-flash or other peripherals using spi-mem interface. Suggested-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Piotr Bugalski <bugalski.piotr@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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