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path: root/drivers/spi/spi-stm32-qspi.c
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2021-09-20spi: Fixed division by zero warningYoshitaka Ikeda
The reason for dividing by zero is because the dummy bus width is zero, but if the dummy n bytes is zero, it indicates that there is no data transfer, so there is no need for calculation. Fixes: 7512eaf54190 ("spi: cadence-quadspi: Fix dummy cycle calculation when buswidth > 1") Signed-off-by: Yoshitaka Ikeda <ikeda@nskint.co.jp> Acked-by: Pratyush Yadav <p.yadav@ti.com> Link: https://lore.kernel.org/r/OSZPR01MB70049C8F56ED8902852DF97B8BD49@OSZPR01MB7004.jpnprd01.prod.outlook.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-25Merge remote-tracking branch 'spi/for-5.14' into spi-nextMark Brown
2021-06-15spi: stm32-qspi: Remove unused qspi field of struct stm32_qspi_flashPatrice Chotard
Remove struct stm32_qspi_flash's field qspi which is not used. Fixes: c530cd1d9d5e ("spi: spi-mem: add stm32 qspi controller") Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Link: https://lore.kernel.org/r/20210615090115.30702-1-patrice.chotard@foss.st.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-03spi: stm32-qspi: add automatic poll status featurePatrice Chotard
STM32 QSPI is able to automatically poll a specified register inside the memory and relieve the CPU from this task. As example, when erasing a large memory area, we got cpu load equal to 50%. This patch allows to perform the same operation with a cpu load around 2%. Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Link: https://lore.kernel.org/r/20210518162754.15940-4-patrice.chotard@foss.st.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-03spi: stm32-qspi: Always wait BUSY bit to be cleared in stm32_qspi_wait_cmd()Patrice Chotard
In U-boot side, an issue has been encountered when QSPI source clock is running at low frequency (24 MHz for example), waiting for TCF bit to be set didn't ensure that all data has been send out the FIFO, we should also wait that BUSY bit is cleared. To prevent similar issue in kernel driver, we implement similar behavior by always waiting BUSY bit to be cleared. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Link: https://lore.kernel.org/r/20210603073421.8441-1-patrice.chotard@foss.st.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-04-22spi: stm32-qspi: fix debug format stringArnd Bergmann
Printing size_t needs a special %zx format modifier to avoid a warning like: drivers/spi/spi-stm32-qspi.c:481:41: note: format string is defined here 481 | dev_dbg(qspi->dev, "%s len = 0x%x offs = 0x%llx buf = 0x%p\n", __func__, len, offs, buf); Patrice already tried to fix this, but picked %lx instead of %zx, which fixed some architectures but broke others in the same way. Using %zx works everywhere. Fixes: 18674dee3cd6 ("spi: stm32-qspi: Add dirmap support") Fixes: 1b8a7d4282c0 ("spi: stm32-qspi: Fix compilation warning in ARM64") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20210422134955.1988316-1-arnd@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2021-04-20spi: stm32-qspi: Fix compilation warning in ARM64Patrice Chotard
This fixes warnings detected when compiling in ARM64. Introduced by 'commit 18674dee3cd6 ("spi: stm32-qspi: Add dirmap support")' Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Link: https://lore.kernel.org/r/20210420082103.1693-1-patrice.chotard@foss.st.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-04-19spi: stm32-qspi: Add dirmap supportPatrice Chotard
Add stm32_qspi_dirmap_read() and stm32_qspi_dirmap_create() to get dirmap support. Update the exec_op callback which doens't allow anymore memory map access. Memory map access are only available through the dirmap_read callback. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Link: https://lore.kernel.org/r/20210419121541.11617-4-patrice.chotard@foss.st.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-04-19spi: stm32-qspi: Trigger DMA only if more than 4 bytes to transferPatrice Chotard
In order to optimize accesses to spi flashes, trigger a DMA only if more than 4 bytes has to be transferred. DMA transfer preparation's cost becomes negligible above 4 bytes to transfer. Below this threshold, indirect transfer give more throughput. mtd_speedtest shows that page write throughtput increases : - from 779 to 853 KiB/s (~9.5%) with s25fl512s SPI-NOR. - from 5283 to 5666 KiB/s (~7.25%) with Micron SPI-NAND. Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Link: https://lore.kernel.org/r/20210419121541.11617-3-patrice.chotard@foss.st.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-04-19spi: stm32-qspi: fix pm_runtime usage_count counterChristophe Kerello
pm_runtime usage_count counter is not well managed. pm_runtime_put_autosuspend callback drops the usage_counter but this one has never been increased. Add pm_runtime_get_sync callback to bump up the usage counter. It is also needed to use pm_runtime_force_suspend and pm_runtime_force_resume APIs to handle properly the clock. Fixes: 9d282c17b023 ("spi: stm32-qspi: Add pm_runtime support") Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20210419121541.11617-2-patrice.chotard@foss.st.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-11-09spi: stm32-qspi: fix reference leak in stm32 qspi operationsZhang Qilong
pm_runtime_get_sync will increment pm usage counter even it failed. Forgetting to pm_runtime_put_noidle will result in reference leak in two callers(stm32_qspi_exec_op and stm32_qspi_setup), so we should fix it. Fixes: 9d282c17b023a ("spi: stm32-qspi: Add pm_runtime support") Signed-off-by: Zhang Qilong <zhangqilong3@huawei.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Link: https://lore.kernel.org/r/20201106015357.141235-1-zhangqilong3@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-06-17spi: stm32-qspi: Fix error path in case of -EPROBE_DEFERPatrice Chotard
In case of -EPROBE_DEFER, stm32_qspi_release() was called in any case which unregistered driver from pm_runtime framework even if it has not been registered yet to it. This leads to: stm32-qspi 58003000.spi: can't setup spi0.0, status -13 spi_master spi0: spi_device register error /soc/spi@58003000/mx66l51235l@0 spi_master spi0: Failed to create SPI device for /soc/spi@58003000/mx66l51235l@0 stm32-qspi 58003000.spi: can't setup spi0.1, status -13 spi_master spi0: spi_device register error /soc/spi@58003000/mx66l51235l@1 spi_master spi0: Failed to create SPI device for /soc/spi@58003000/mx66l51235l@1 On v5.7 kernel,this issue was not "visible", qspi driver was probed successfully. Fixes: 9d282c17b023 ("spi: stm32-qspi: Add pm_runtime support") Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Link: https://lore.kernel.org/r/20200616113035.4514-1-patrice.chotard@st.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-04-29spi: stm32-qspi: Fix unbalanced pm_runtime_enable issuePatrice Chotard
Issue detected by unbinding/binding the stm32 qspi driver as following: root@stm32mp2:~# echo 40430000.spi > /sys/bus/platform/drivers/stm32-qspi/404300 00.spi/driver/unbind root@stm32mp2:~# echo 40430000.spi > /sys/bus/platform/drivers/stm32-qspi/bind [ 969.864021] stm32-qspi 40430000.spi: Unbalanced pm_runtime_enable! [ 970.225161] spi-nor spi0.0: mx66u51235f (65536 Kbytes) [ 970.935721] spi-nor spi0.1: mx66u51235f (65536 Kbytes) Fixes: 9d282c17b023 ("spi: stm32-qspi: Add pm_runtime support") Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Link: https://lore.kernel.org/r/20200429102625.25974-1-patrice.chotard@st.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-04-17spi: stm32-qspi: Add pm_runtime supportPatrice Chotard
By default, STM32_AUTOSUSPEND_DELAY is set to -1 which has for effect to prevent runtime suspends. Runtime suspends can be activated by setting autosuspend_delay_ms using sysfs entry : echo {delay_in_ms} > /sys/devices/platform/soc/58003000.spi/power/autosusp end_delay_ms) Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Link: https://lore.kernel.org/r/20200417121241.6473-1-patrice.chotard@st.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-02-11spi: stm32-qspi: properly manage probe errorsLionel Debieve
Fix resource release issues when driver probe operation fails. Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Link: https://lore.kernel.org/r/20200203135048.1299-3-patrice.chotard@st.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-02-11spi: stm32-qspi: defer probe for reset controllerEtienne Carriere
Changes stm32 QSPI driver to defer its probe operation when a reset controller device have not yet probed but is registered in the system. Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Link: https://lore.kernel.org/r/20200203135048.1299-2-patrice.chotard@st.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-12-16spi: stm32-qspi: Use dma_request_chan() instead dma_request_slave_channel()Peter Ujfalusi
dma_request_slave_channel() is a wrapper on top of dma_request_chan() eating up the error code. By using dma_request_chan() directly the driver can support deferred probing against DMA. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Link: https://lore.kernel.org/r/20191212135550.4634-9-peter.ujfalusi@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-04spi: stm32-qspi: Fix kernel oops when unbinding driverPatrice Chotard
spi_master_put() must only be called in .probe() in case of error. As devm_spi_register_master() is used during probe, spi_master_put() mustn't be called in .remove() callback. It fixes the following kernel WARNING/Oops when executing echo "58003000.spi" > /sys/bus/platform/drivers/stm32-qspi/unbind : ------------[ cut here ]------------ WARNING: CPU: 1 PID: 496 at fs/kernfs/dir.c:1504 kernfs_remove_by_name_ns+0x9c/0xa4 kernfs: can not remove 'uevent', no directory Modules linked in: CPU: 1 PID: 496 Comm: sh Not tainted 5.3.0-rc1-00219-ga0e07bb51a37 #62 Hardware name: STM32 (Device Tree Support) [<c0111570>] (unwind_backtrace) from [<c010d384>] (show_stack+0x10/0x14) [<c010d384>] (show_stack) from [<c08db558>] (dump_stack+0xb4/0xc8) [<c08db558>] (dump_stack) from [<c01209d8>] (__warn.part.3+0xbc/0xd8) [<c01209d8>] (__warn.part.3) from [<c0120a5c>] (warn_slowpath_fmt+0x68/0x8c) [<c0120a5c>] (warn_slowpath_fmt) from [<c02e5844>] (kernfs_remove_by_name_ns+0x9c/0xa4) [<c02e5844>] (kernfs_remove_by_name_ns) from [<c05833a4>] (device_del+0x128/0x358) [<c05833a4>] (device_del) from [<c05835f8>] (device_unregister+0x24/0x64) [<c05835f8>] (device_unregister) from [<c0638dac>] (spi_unregister_controller+0x88/0xe8) [<c0638dac>] (spi_unregister_controller) from [<c058c580>] (release_nodes+0x1bc/0x200) [<c058c580>] (release_nodes) from [<c0588a44>] (device_release_driver_internal+0xec/0x1ac) [<c0588a44>] (device_release_driver_internal) from [<c0586840>] (unbind_store+0x60/0xd4) [<c0586840>] (unbind_store) from [<c02e64e8>] (kernfs_fop_write+0xe8/0x1c4) [<c02e64e8>] (kernfs_fop_write) from [<c0266b44>] (__vfs_write+0x2c/0x1c0) [<c0266b44>] (__vfs_write) from [<c02694c0>] (vfs_write+0xa4/0x184) [<c02694c0>] (vfs_write) from [<c0269710>] (ksys_write+0x58/0xd0) [<c0269710>] (ksys_write) from [<c0101000>] (ret_fast_syscall+0x0/0x54) Exception stack(0xdd289fa8 to 0xdd289ff0) 9fa0: 0000006c 000e20e8 00000001 000e20e8 0000000d 00000000 9fc0: 0000006c 000e20e8 b6f87da0 00000004 0000000d 0000000d 00000000 00000000 9fe0: 00000004 bee639b0 b6f2286b b6eaf6c6 ---[ end trace 1b15df8a02d76aef ]--- ------------[ cut here ]------------ WARNING: CPU: 1 PID: 496 at fs/kernfs/dir.c:1504 kernfs_remove_by_name_ns+0x9c/0xa4 kernfs: can not remove 'online', no directory Modules linked in: CPU: 1 PID: 496 Comm: sh Tainted: G W 5.3.0-rc1-00219-ga0e07bb51a37 #62 Hardware name: STM32 (Device Tree Support) [<c0111570>] (unwind_backtrace) from [<c010d384>] (show_stack+0x10/0x14) [<c010d384>] (show_stack) from [<c08db558>] (dump_stack+0xb4/0xc8) [<c08db558>] (dump_stack) from [<c01209d8>] (__warn.part.3+0xbc/0xd8) [<c01209d8>] (__warn.part.3) from [<c0120a5c>] (warn_slowpath_fmt+0x68/0x8c) [<c0120a5c>] (warn_slowpath_fmt) from [<c02e5844>] (kernfs_remove_by_name_ns+0x9c/0xa4) [<c02e5844>] (kernfs_remove_by_name_ns) from [<c0582488>] (device_remove_attrs+0x20/0x5c) [<c0582488>] (device_remove_attrs) from [<c05833b0>] (device_del+0x134/0x358) [<c05833b0>] (device_del) from [<c05835f8>] (device_unregister+0x24/0x64) [<c05835f8>] (device_unregister) from [<c0638dac>] (spi_unregister_controller+0x88/0xe8) [<c0638dac>] (spi_unregister_controller) from [<c058c580>] (release_nodes+0x1bc/0x200) [<c058c580>] (release_nodes) from [<c0588a44>] (device_release_driver_internal+0xec/0x1ac) [<c0588a44>] (device_release_driver_internal) from [<c0586840>] (unbind_store+0x60/0xd4) [<c0586840>] (unbind_store) from [<c02e64e8>] (kernfs_fop_write+0xe8/0x1c4) [<c02e64e8>] (kernfs_fop_write) from [<c0266b44>] (__vfs_write+0x2c/0x1c0) [<c0266b44>] (__vfs_write) from [<c02694c0>] (vfs_write+0xa4/0x184) [<c02694c0>] (vfs_write) from [<c0269710>] (ksys_write+0x58/0xd0) [<c0269710>] (ksys_write) from [<c0101000>] (ret_fast_syscall+0x0/0x54) Exception stack(0xdd289fa8 to 0xdd289ff0) 9fa0: 0000006c 000e20e8 00000001 000e20e8 0000000d 00000000 9fc0: 0000006c 000e20e8 b6f87da0 00000004 0000000d 0000000d 00000000 00000000 9fe0: 00000004 bee639b0 b6f2286b b6eaf6c6 ---[ end trace 1b15df8a02d76af0 ]--- 8<--- cut here --- Unable to handle kernel NULL pointer dereference at virtual address 00000050 pgd = e612f14d [00000050] *pgd=ff1f5835 Internal error: Oops: 17 [#1] SMP ARM Modules linked in: CPU: 1 PID: 496 Comm: sh Tainted: G W 5.3.0-rc1-00219-ga0e07bb51a37 #62 Hardware name: STM32 (Device Tree Support) PC is at kernfs_find_ns+0x8/0xfc LR is at kernfs_find_and_get_ns+0x30/0x48 pc : [<c02e49a4>] lr : [<c02e4ac8>] psr: 40010013 sp : dd289dac ip : 00000000 fp : 00000000 r10: 00000000 r9 : def6ec58 r8 : dd289e54 r7 : 00000000 r6 : c0abb234 r5 : 00000000 r4 : c0d26a30 r3 : ddab5080 r2 : 00000000 r1 : c0abb234 r0 : 00000000 Flags: nZcv IRQs on FIQs on Mode SVC_32 ISA ARM Segment none Control: 10c5387d Table: dd11c06a DAC: 00000051 Process sh (pid: 496, stack limit = 0xe13a592d) Stack: (0xdd289dac to 0xdd28a000) 9da0: c0d26a30 00000000 c0abb234 00000000 c02e4ac8 9dc0: 00000000 c0976b44 def6ec00 dea53810 dd289e54 c02e864c c0a61a48 c0a4a5ec 9de0: c0d630a8 def6ec00 c0d04c48 c02e86e0 def6ec00 de909338 c0d04c48 c05833b0 9e00: 00000000 c0638144 dd289e54 def59900 00000000 475b3ee5 def6ec00 00000000 9e20: def6ec00 def59b80 dd289e54 def59900 00000000 c05835f8 def6ec00 c0638dac 9e40: 0000000a dea53810 c0d04c48 c058c580 dea53810 def59500 def59b80 475b3ee5 9e60: ddc63e00 dea53810 dea3fe10 c0d63a0c dea53810 ddc63e00 dd289f78 dd240d10 9e80: 00000000 c0588a44 c0d59a20 0000000d c0d63a0c c0586840 0000000d dd240d00 9ea0: 00000000 00000000 ddc63e00 c02e64e8 00000000 00000000 c0d04c48 dd9bbcc0 9ec0: c02e6400 dd289f78 00000000 000e20e8 0000000d c0266b44 00000055 00000cc0 9ee0: 000000e3 000e3000 dd11c000 dd11c000 00000000 00000000 00000000 00000000 9f00: ffeee38c dff99688 00000000 475b3ee5 00000001 dd289fb0 ddab5080 ddaa5800 9f20: 00000817 000e30ec dd9e7720 475b3ee5 ddaa583c 0000000d dd9bbcc0 000e20e8 9f40: dd289f78 00000000 000e20e8 0000000d 00000000 c02694c0 00000000 00000000 9f60: c0d04c48 dd9bbcc0 00000000 00000000 dd9bbcc0 c0269710 00000000 00000000 9f80: 000a91f4 475b3ee5 0000006c 000e20e8 b6f87da0 00000004 c0101204 dd288000 9fa0: 00000004 c0101000 0000006c 000e20e8 00000001 000e20e8 0000000d 00000000 9fc0: 0000006c 000e20e8 b6f87da0 00000004 0000000d 0000000d 00000000 00000000 9fe0: 00000004 bee639b0 b6f2286b b6eaf6c6 600e0030 00000001 00000000 00000000 [<c02e49a4>] (kernfs_find_ns) from [<def6ec00>] (0xdef6ec00) Code: ebf8eeab c0dc50b8 e92d40f0 e292c000 (e1d035b0) ---[ end trace 1b15df8a02d76af1 ]--- Fixes: a88eceb17ac7 ("spi: stm32-qspi: add spi_master_put in release function") Cc: <stable@vger.kernel.org> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Link: https://lore.kernel.org/r/20191004123606.17241-1-patrice.chotard@st.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-08-02spi: Remove dev_err() usage after platform_get_irq()Stephen Boyd
We don't need dev_err() messages when platform_get_irq() fails now that platform_get_irq() prints an error message itself when something goes wrong. Let's remove these prints with a simple semantic patch. // <smpl> @@ expression ret; struct platform_device *E; @@ ret = ( platform_get_irq(E, ...) | platform_get_irq_byname(E, ...) ); if ( \( ret < 0 \| ret <= 0 \) ) { ( -if (ret != -EPROBE_DEFER) -{ ... -dev_err(...); -... } | ... -dev_err(...); ) ... } // </smpl> While we're here, remove braces on if statements that only have one statement (manually). Cc: Mark Brown <broonie@kernel.org> Cc: linux-spi@vger.kernel.org Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20190730181557.90391-42-swboyd@chromium.org Signed-off-by: Mark Brown <broonie@kernel.org>
2019-07-04Merge branch 'spi-5.3' into spi-nextMark Brown
2019-06-28spi: stm32-qspi: remove signal sensitive on completionLudovic Barre
On umount step a sigkill signal is set (without user specific action), due to sigkill signal the completion will be interrupted and the data transfer can't be finished if a sync is needed. Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2019-06-24spi: spi-stm32-qspi: Remove CR_FTHRES_MASK usagePatrice Chotard
On STM32 F4/F7/H7 SoCs, FTHRES is a 5 bits field in QSPI_CR register, but for STM32MP1 SoCs, FTHRES is a 4 bits field long. CR_FTHRES_MASK definition is not correct. As for all these SoCs, FTHRES field is set to 3, FIELD_PREP() macro is used with a constant as second parameter which make its usage useless. CR_FTHRES_MASK and FIELD_PREP() can be removed. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2019-05-02spi: stm32-qspi: manage the get_irq error caseFabien Dessenne
During probe, check the "get_irq" error value. Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com> Acked-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2019-03-26spi: stm32-qspi: add dma supportLudovic Barre
This patch adds the dma support for the stm32-qspi hardware. The memory buffer constraints (lowmem, vmalloc, kmap) are taken into account by framework. In read mode, the memory map is preferred vs dma (due to better throughput). If the dma transfer fails the buffer is sent by polling. Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2019-03-26spi: stm32-qspi: add spi_master_put in release functionLudovic Barre
This patch adds spi_master_put in release function to drop the controller's refcount. Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2019-03-20spi: spi-mem: stm32-qspi: stm32_qspi_pm_ops can be statickbuild test robot
Fixes: 2e541b64ee52 ("spi: spi-mem: stm32-qspi: add suspend/resume support") Signed-off-by: kbuild test robot <lkp@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2019-03-15spi: spi-mem: stm32-qspi: add suspend/resume supportLudovic Barre
This patch adds suspend and resume support for spi-stm32-qspi drivers. Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2019-03-15spi: spi-mem: stm32-qspi: avoid memory corruption at low frequencyLudovic Barre
This patch solves a memory corruption seen at 8 MHz. To avoid such issue, timeout counter is disabled. Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-10-19spi: spi-mem: add stm32 qspi controllerLudovic Barre
The qspi controller is a specialized communication interface targeting single, dual or quad SPI Flash memories (NOR/NAND). It can operate in any of the following modes: -indirect mode: all the operations are performed using the quadspi registers -read memory-mapped mode: the external Flash memory is mapped to the microcontroller address space and is seen by the system as if it was an internal memory tested on: -NOR: mx66l51235l -NAND: MT29F2G01ABAGD Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Mark Brown <broonie@kernel.org>
generated by cgit (git 2.34.1) at 2024-05-26 21:26:30 +0000