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Display SFP module information verbosely, splitting the generic parts
into a separate file.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Add a compatible for SFP+ cages. SFP+ cages are backwards compatible,
but the ethernet device behind them may not support the slower speeds
of SFP modules.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
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Cooled SFP+ transceivers need a longer initialisation (startup) time.
Select the initialisation time depending on the cooled option bit.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
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phy_error() is called from phy_interrupt() or phy_state_machine(), and
uses WARN_ON() to print a backtrace. The backtrace is not useful when
reporting a PHY error.
However, a system may contain multiple ethernet PHYs, and phy_error()
gives no clue which one caused the problem.
Replace WARN_ON() with a call to phydev_err() so that we can see which
PHY had an error, and also inform the user that we are halting the PHY.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
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Allow the PHY to probe when there is no firmware, but do not allow the
link to come up by forcing the PHY state to PHY_HALTED in a similar way
to phy_error().
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
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Provide phy driver start/stop hooks so that the PHY driver knows when
the network driver is starting or stopping. This will be used for the
Marvell 10G driver so that we can sanely refuse to start if the PHYs
firmware is not present, and also so that we can sanely support SFPs
behind the PHY.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
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Support reporting the hardware resolved pause enablement states via
phylib, overriding our software implementation.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
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Allow phylib drivers to pass the hardware-resolved pause state to MAC
drivers, rather than using the software-based pause resolution code.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
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Add support for configuring the LEDs. Macchiatobin has an oddity in
that the left LED goes out when the cable is connected, and flashes
when there's link activity. This is because the reset default for
the LED outputs assume that the LED is connected to supply, not to
ground. Add support for configuring the LED modes and polarities.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
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There are several places which open code comparing PHY IDs. Provide a
couple of helpers to assist with this, using a slightly simpler test
than the original:
- phy_id_compare() compares two arbitary PHY IDs and a mask of the
significant bits in the ID.
- phydev_id_compare() compares the bound phydev with the specified
PHY ID, using the bound driver's mask.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
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The SGMII PCS PHY needs to be updated with the link configuration in
the mac_link_up() call rather than in mac_config(). However,
mtk_sgmii_setup_mode_force() programs the SGMII block during
mac_config() when using 802.3z interface modes with the link
configuration.
Split that functionality from mtk_sgmii_setup_mode_force(), moving it
to a new mtk_sgmii_link_up() function, and call it from mac_link_up().
This does not look correct to me: 802.3z modes operate at a fixed
speed. The contents of mtk_sgmii_link_up() look more appropriate for
SGMII mode, but the original code definitely did not call
mtk_sgmii_setup_mode_force() for SGMII mode but only 802.3z mode.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
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Where a MAC provides a phy_interface_t bitmap, use these bitmaps to
select the operating interface mode for optical SFP modules, rather
than using the linkmode bitmaps.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
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We currently parse the SFP EEPROM to a bitmap of ethtool link modes,
and then attempt to convert the link modes to a PHY interface mode.
While this works at present, there are cases where this is sub-optimal.
For example, where a module can operate with several different PHY
interface modes.
To start addressing this, arrange for the SFP EEPROM parsing to also
provide a bitmap of the possible PHY interface modes.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
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The implementation appears not to appear to support pause modes on
anything but RGMII, RGMII_TXID, MII and REVMII interface modes. Let
phylink know that detail.
Moreover, RGMII_RXID and RGMII_ID appears to be unsupported.
(This may not be correct; particularly see the FIXMEs in this patch.)
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
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As the autoneg bit is now handled in the PCS validation function, we
can get rid of mt753x_phylink_validate() and rely on the default
phylink_generic_validate() implementation for the MAC.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Partially convert the mt7530 driver to use phylink's PCS support. This
is a partial implementation as we don't move anything into the
pcs_config method yet - this driver supports SGMII or 1000BASE-X
without in-band.
With this conversion, this driver becomes a modern phylink driver.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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As there are no users of phylink_helper_basex_speed(), we can now
remove this functionality.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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The mt7530 driver does not make use of the speed, duplex, pause or
advertisement in its phylink_mac_config() implementation, so it can be
marked as a non-legacy driver.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Switch mt7530 to use phylink_get_linkmodes() to generate the ethtool
linkmodes that can be supported. We are unable to use the generic
helper for this as pause modes are dependent on the interface as
the Autoneg bit depends on the interface mode.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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When using an external PHY connected using RGMII to mt7531 port 5, the
PHY can be used to used support 1000baseX connections. Therefore, it
makes no sense to exclude this from the linkmodes permitted for mt7531
port 5, so allow 1000baseX.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Now that mt7530 is not using the basex helper, it becomes unnecessary to
indicate support for both 1000baseX and 2500baseX when one of the 803.3z
PHY interface modes is being selected. Ensure that the driver indicates
only those linkmodes that can actually be supported by the PHY interface
mode.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Now that we have a better method to select SFP interface modes, we
no longer need to use phylink_helper_basex_speed() in a driver's
validation function.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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As phylink checks the interface mode against the supported_interfaces
bitmap, we no longer need to validate the interface mode, nor handle
PHY_INTERFACE_MODE_NA in the validation function. Remove these to
simplify the implementation.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Populate the supported interfaces for mt7530, mt7531 and mt7621 DSA
switches. Filling this in will enable phylink to pre-check the PHY
interface mode against the the supported interfaces bitmap prior to
calling the validate function.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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The B53 driver does not make use of the speed, duplex, pause or
advertisement in its phylink_mac_config() implementation, so it can be
marked as a non-legacy driver.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Switch the Broadcom b53 driver to using the phylink_generic_validate()
implementation by removing its own .phylink_validate method and
associated code.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Now that we have a better method to select SFP interface modes, we
no longer need to use phylink_helper_basex_speed() in a driver's
validation function.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Populate the supported interfaces and MAC capabilities for the Broadcom
B53 DSA switches in preparation to using these for the generic
validation functionality.
The interface modes are derived from:
- b53_serdes_phylink_validate()
- SRAB mux configuration
NOTE: much of this conversion is a guess as the driver doesn't contain
sufficient information. I would appreciate a thorough review and
testing of this change before it is merged.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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I've stared at this if() statement for a while trying to work out if
it really does correspond with the comment above, and it does seem to.
However, let's make it more readable and phrase it in the same way as
the comment.
Also add a FIXME into the comment - we appear to deny Gigabit modes for
802.3z interface modes, but 802.3z interface modes only operate at
gigabit and above.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Now that mv88e6xxx is completely converted to using phylink_pcs
support, we have no need for the serdes methods. Remove all this
infrastructure.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Convert the 88E6390, 88E6390X, and 88E6393X family of switches to use
the phylink_pcs infrastructure.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Convert the 88E6352 SERDES code to use the phylink_pcs infrastructure.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
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Convert the 88E6185 SERDES code to use the phylink_pcs infrastructure.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Rename and export the PCS state decoding function so our PCS can
make use of the functionality provided by this.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Add a modify() helper, and use this to deal with the work around for the
88e6390, including powering the Serdes PHY down. This is necessary as we
will be removing the serdes_power implementation in a later patch.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Phylink wants to know if the link has dropped since the last time state
was retrieved, and the BMSR gives us that. Read the BMSR and use it when
deciding the link state. Fill in the an_complete member as well for the
emulated PHY state.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Commit ede359d8843a ("net: dsa: mv88e6xxx: Link in pcs_get_state() if AN
is bypassed") added the ability to link if AN was bypassed, and added
filling of state->an_complete field, but set it to true if AN was
enabled in BMCR, not when AN was reported complete in BMSR.
This was done because for some reason, when I wanted to use BMSR value
to infer an_complete, I was looking at BMSR_ANEGCAPABLE bit (which was
always 1), instead of BMSR_ANEGCOMPLETE bit.
Use BMSR_ANEGCOMPLETE for filling state->an_complete.
Fixes: ede359d8843a ("net: dsa: mv88e6xxx: Link in pcs_get_state() if AN is bypassed")
Signed-off-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Add infrastructure for phylink_pcs to the mv88e6xxx driver. This
involves adding a mac_select_pcs() hook so we can pass the PCS to
phylink at the appropriate time, and a PCS initialisation function.
As the various chip implementations are converted to use phylink_pcs,
they are no longer reliant on the legacy phylink behaviour. We detect
this by the use of this infrastructure, or the lack of any serdes.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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The decision whether to report serdes statistics currently depends on
the cached C_Mode value for the port, read at probe time or updated by
configuration. However, port 4 can be in "automedia" mode when it is
used as a serdes port, meaning it switches between the internal PHY and
the serdes, changing the read-only C_Mode value depending on which
first gains link. Consequently, the C_Mode value read at probe does not
accurately reflect whether the port has the serdes associated with it.
In "net: dsa: mv88e6xxx: add mv88e6352_g2_scratch_port_has_serdes()",
we added a way to read the hardware configuration to determine which
port has the serdes associated with it. Use this to determine which
port reports the serdes statistics.
Reviewed-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Now that the mv88e6xxx chip drivers are supplying the supported
interfaces and MAC capabilities, switch the driver to use the generic
phylink validation implementation by removing our own validation
implementations. This causes DSA to call phylink_generic_validate()
on our behalf.
Reviewed-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Populate the supported interfaces and MAC capabilities for the
Marvell MV88E6xxx DSA switches in preparation to using these for the
validation functionality.
Patch co-authored by Marek.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: Marek Behún <kabel@kernel.org> [ fixed 6341 and 6393x ]
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Read the hardware configuration to determine which port is attached
to the serdes.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Add the following unlocked accessors to complete the set:
__mdiobus_modify()
__mdiodev_read()
__mdiodev_write()
__mdiodev_modify()
__mdiodev_modify_changed()
which we will need for Marvell DSA PCS conversion.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Add phylink_pcs_inband() to indicate whether the PCS should be using
inband signalling.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Add phylink PCS enable/disable callbacks that will allow us to place
IEEE 802.3 register compliant PCS in power-down mode while not being
used.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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phylink_set_10g_modes() is no longer used with the conversion of
drivers to phylink_generic_validate(), so we can remove it.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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phylink_config's pcs_poll is no longer used, let's get rid of it.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Phylink will use PCS polling whenever the PCS's poll member is set, so
setting phylink_config.pcs_poll as well is redundant.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Convert sparx5 to use the mac_select_interface rather than using
phylink_set_pcs(). The intention here is to unify the approach for
PCS and eventually remove phylink_set_pcs().
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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