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Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Use the phylink_mode_*() helpers in all drivers so we can change the
definition of the "mode" argument.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Use the phy interface mode bitmaps for SFP modules and PHYs to select
the operating interface for SFPs and PHYs with SFPs.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
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Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
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Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
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Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
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Display SFP module information verbosely, splitting the generic parts
into a separate file.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Add a compatible for SFP+ cages. SFP+ cages are backwards compatible,
but the ethernet device behind them may not support the slower speeds
of SFP modules.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
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Cooled SFP+ transceivers need a longer initialisation (startup) time.
Select the initialisation time depending on the cooled option bit.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
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phy_error() is called from phy_interrupt() or phy_state_machine(), and
uses WARN_ON() to print a backtrace. The backtrace is not useful when
reporting a PHY error.
However, a system may contain multiple ethernet PHYs, and phy_error()
gives no clue which one caused the problem.
Replace WARN_ON() with a call to phydev_err() so that we can see which
PHY had an error, and also inform the user that we are halting the PHY.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
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Allow the PHY to probe when there is no firmware, but do not allow the
link to come up by forcing the PHY state to PHY_HALTED in a similar way
to phy_error().
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
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Provide phy driver start/stop hooks so that the PHY driver knows when
the network driver is starting or stopping. This will be used for the
Marvell 10G driver so that we can sanely refuse to start if the PHYs
firmware is not present, and also so that we can sanely support SFPs
behind the PHY.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
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Support reporting the hardware resolved pause enablement states via
phylib, overriding our software implementation.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
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Allow phylib drivers to pass the hardware-resolved pause state to MAC
drivers, rather than using the software-based pause resolution code.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
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If MDIO_USXGMII_LINK is not set, it means that the PHYs media side
link is down. Indicate back to phylink that the link as a whole is
down.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Add support for configuring the LEDs. Macchiatobin has an oddity in
that the left LED goes out when the cable is connected, and flashes
when there's link activity. This is because the reset default for
the LED outputs assume that the LED is connected to supply, not to
ground. Add support for configuring the LED modes and polarities.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
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Allow EEE management for SFPs without accessible PHYs.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Add phylink EEE control methods to allow EEE to be configured. When
LPI is to be disabled, we force the port to have EEE disabled, but
when enabling EEE, if the port is under the control of the PPU, we
stop forcing it, otherwise we force-enable EEE.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Add support for EEE forcing using the MAC control register. Replace
the 88e6393x errata 4.5 EEE disable code with a call to the new EEE
forcing code.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Add a port_set_eee() method to allow the EEE settings for a port to be
configured.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Fixme: doesn't bit 25 and 26 also need to be set in the PMCR for
PMCR_FORCE_EEE100 and PMCR_FORCE_EEE1G to take effect?
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Add EEE support for mvpp2, using phylink's EEE implementation, which
means we just need to implement the two methods for LPI control, and
with the initial configuration. Only the GMAC is supported, so only
100M, 1G and 2.5G speeds.
Disabling LPI requires clearing a single bit. Enabling LPI needs a full
configuration of several values, as the timer values are dependent on
the MAC operating speed.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Convert mvneta to use phylink's EEE implementation, which means we just
need to implement the two methods for LPI control, and adding the
initial configuration.
Disabling LPI requires clearing a single bit. Enabling LPI needs a full
configuration of several values, as the timer values are dependent on
the MAC operating speed.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Add EEE management to phylink.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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b53_get_mac_eee() sets both eee_enabled and ee_active, and then returns
zero.
dsa_slave_get_eee(), which calls this function, will then continue to
call phylink_ethtool_get_eee(), which will return -EOPNOTSUPP if there
is no PHY present, otherwise calling phy_ethtool_get_eee() which in
turn will call genphy_c45_ethtool_get_eee().
genphy_c45_ethtool_get_eee() will overwrite eee_enabled and eee_active
with its own interpretation from the PHYs settings and negotiation
result.
Thus, when there is no PHY, dsa_slave_get_eee() will fail with
-EOPNOTSUPP, meaning eee_enabled and eee_active will not be returned to
userspace. When there is a PHY, eee_enabled and eee_active will be
overwritten by phylib, making the setting of these members in
b53_get_mac_eee() entirely unnecessary.
Remove this code, thus simplifying b53_get_mac_eee().
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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stmmac_ethtool_op_get_eee() sets both eee_enabled and ee_active, and
then goes on to call phylink_ethtool_get_eee().
phylink_ethtool_get_eee() will return -EOPNOTSUPP if there is no PHY
present, otherwise calling phy_ethtool_get_eee() which in turn will call
genphy_c45_ethtool_get_eee().
genphy_c45_ethtool_get_eee() will overwrite eee_enabled and eee_active
with its own interpretation from the PHYs settings and negotiation
result.
Thus, when there is no PHY, stmmac_ethtool_op_get_eee() will fail with
-EOPNOTSUPP, meaning eee_enabled and eee_active will not be returned to
userspace. When there is a PHY, eee_enabled and eee_active will be
overwritten by phylib, making the setting of these members in
stmmac_ethtool_op_get_eee() entirely unnecessary.
Remove this code, thus simplifying stmmac_ethtool_op_get_eee().
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Some PHYs such as Aquantia, Broadcom 84881, and Marvell 88X33x0 can
switch between a set of interface types depending on the negotiated
media speed, or can use rate adaption for some or all of these
interface types.
We currently assume that these are Clause 45 PHYs that are configured
not to use a specific set of interface modes, which has worked so far,
but is just a work-around. In this workaround, we validate using all
interfaces that the MAC supports, which can lead to extra modes being
advertised that can not be supported.
To properly address this, switch to using the newly introduced PHY
possible_interfaces bitmap which indicates which interface modes will
be used by the PHY as configured. We calculate the union of the PHY's
possible interfaces and MACs supported interfaces, checking that is
non-empty. If the PHY is on a SFP, we further reduce the set by those
which can be used on a SFP module, again checking that is non-empty.
Finally, we validate the subset of interfaces, taking account of
whether rate matching will be used for each individual interface mode.
This becomes independent of whether the PHY is clause 22 or clause 45.
It is encouraged that all PHYs that switch interface modes or use
rate matching should populate phydev->possible_interfaces.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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When bringing up a PHY, we need to work out which ethtool link modes it
should support and advertise. Clause 22 PHYs operate in a single
interface mode, which can be easily dealt with. However, clause 45 PHYs
tend to switch interface mode depending on the media. We need more
flexible validation at this point, so this patch splits out that code
in preparation to changing it.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Move phylink_pcs_neg_mode() from the header file into the .c file since
nothing should be using it.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Pass the phy (if any) into phylink_validate_mask() so that we can
validate each interface with its rate matching setting.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Pass the phy (if any) into phylink_validate_one() so that we can
validate each interface with its rate matching setting.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Split out the internals of phylink_validate_mask() to make the code
easier to read.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Fill in the possible_interfaces bitmap for AQR113C so phylink knows
which interface modes will be used by the PHY.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Fill in the possible_interfaces member. This PHY driver only supports
a single configuration found on SFPs.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Fill in the possible_interfaces member according to the selected
mactype mode.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Replace the code-based mactype decode with a table driven approach.
This will allow us to fill in the possible_interfaces cleanly.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Add a possible_interfaces member to struct phy_device to indicate which
interfaces a clause 45 PHY may switch between depending on the media.
This must be populated by the PHY driver by the time the .config_init()
method completes according to the PHYs host-side configuration.
For example, the Marvell 88x3310 PHY can switch between 10GBASE-R,
5GBASE-R, 2500BASE-X, and SGMII on the host side depending on the media
side speed, so all these interface modes are set in the
possible_interfaces member.
This allows phylib users (such as phylink) to know in advance which
interface modes to expect, which allows them to appropriately restrict
the advertised link modes according to the capabilities of other parts
of the link.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Use for_each_set_bit() rather than open coding the for() test_bit()
loop.
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Use the linkmode_*() helpers rather than open coding the calls to the
bitmap operators.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Use linkmode_fill() rather than open coding the bitmap operation.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Remove exports for phylink_caps_to_linkmodes(),
phylink_get_capabilities(), phylink_validate_mask_caps() and
phylink_generic_validate(). Also, as phylink_generic_validate() is no
longer called, we can remove its implementation as well.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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The MAC .validate() method is no longer used, so remove it from the
phylink_mac_ops structure, and remove the callsite in
phylink_validate_mac_and_pcs().
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Convert fman to use the .mac_get_caps() method rather than the
.validate() method.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Provide a new method, mac_get_caps() to get the MAC capabilities for
the specified interface mode. This is for MACs which have special
requirements, such as not supporting half-duplex in certain interface
modes, and will replace the validate() method.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Add phylink capabilities for dsa_loop, which I believe being a software
construct means that it supports essentially all interface types and
all speeds.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Add phylink capabilities for vsc73xx. Although this switch driver does
populates the .adjust_link method, dsa_slave_phy_setup() will still be
used to create phylink instances for the LAN ports, although phylink
won't be used for shared links.
There are two different classes of switch - 5+1 and 8 port. The 5+1
port switches uses port indicies 0-4 for the user interfaces and 6 for
the CPU port. The 8 port is confusing - some comments in the driver
imply that port index 7 is used, but the driver actually still uses 6,
so that is what we go with. Also, there appear to be no DTs in the
kernel tree that are using the 8 port variety.
It also looks like port 5 is always skipped.
The switch supports 10M, 100M and 1G speeds. It is not clear whether
all these speeds are supported on the CPU interface. It also looks like
symmetric pause is supported, whether asymmetric pause is as well is
unclear. However, it looks like the pause configuration is entirely
static, and doesn't depend on negotiation results.
So, let's do the best effort we can based on the information found in
the driver when creating vsc73xx_phylink_get_caps().
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Remove the mt753x_phylink_pcs_link_up() function for two reasons:
1) priv->pcs[i].pcs.neg_mode is set true, meaning it doesn't take a
MLO_AN_FIXED anymore, but one of PHYLINK_PCS_NEG_*. However, this
is inconsequential due to...
2) priv->pcs[port].pcs.ops is always initialised to point at
mt7530_pcs_ops, which does not have a pcs_link_up() member.
So, let's remove mt753x_phylink_pcs_link_up() entirely.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Marek reports that a deadlock occurs with the AX88772A PHY used on the
ASIX USB network driver:
asix 1-1.4:1.0 (unnamed net_device) (uninitialized): PHY [usb-001:003:10] driver [Asix Electronics AX88772A] (irq=POLL)
Asix Electronics AX88772A usb-001:003:10: attached PHY driver(mii_bus:phy_addr=usb-001:003:10, irq=POLL)
asix 1-1.4:1.0 eth0: register 'asix' at usb-12110000.usb-1.4, ASIX AX88772 USB 2.0 Ethernet, a2:99:b6:cd:11:eb
asix 1-1.4:1.0 eth0: configuring for phy/internal link mode
============================================
WARNING: possible recursive locking detected
6.6.0-rc1-00239-g8da77df649c4-dirty #13949 Not tainted
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kworker/3:3/71 is trying to acquire lock:
c6c704cc (&dev->lock){+.+.}-{3:3}, at: phy_start_aneg+0x1c/0x38
but task is already holding lock:
c6c704cc (&dev->lock){+.+.}-{3:3}, at: phy_state_machine+0x100/0x2b8
This is because we now consistently call phy_process_state_change()
while holding phydev->lock, but the AX88772A PHY driver then goes on
to call phy_start_aneg() which tries to grab the same lock - causing
deadlock.
Fix this by exporting the unlocked version, and use this in the PHY
driver instead.
Reported-by: Marek Szyprowski <m.szyprowski@samsung.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Fixes: ef113a60d0a9 ("net: phy: call phy_error_precise() while holding the lock")
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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