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2020-11-03gpio: mvebu: add PWM support for Armada 8kRussell King
Add support for PWM devices on the Armada 8k, which are useful on the Macchiatobin and Clearfog GT 8K platforms for controlling the fan speed. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-11-03gpio: mvebu: honour EPROBE_DEFER for devm_clk_get()Russell King
Honour deferred probing for devm_clk_get() so that we can get the clock for PWM. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-11-03gpio: mvebu: convert pwm to regmapRussell King
Convert mvebu's pwm support to use regmap to access the registers to prepare the driver to support the "blink" support on CP110. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-11-03gpio: mvebu: fix PWM period calculationRussell King
The period of a PWM signal is the sum of the on and off durations. The calculation being used by gpio-mvebu is not correct, resulting in the period being miscalculated and invalid. Fix this. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-11-03usb: host: xhci: mvebu: add reset on resume quirkOfer Heifetz
The resume operation of mvebu xHCI host have some issues, so The XHCI_RESET_ON_RESUME quirk is added for it. Signed-off-by: Ofer Heifetz <oferh@marvell.com> Tested-by: Nadav Haklai <nadavh@marvell.com> Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Reviewed-by: Lior Amsalem <alior@marvell.com> Tested-by: Lior Amsalem <alior@marvell.com> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-11-03Merge branches 'mvneta' and 'net-queue' into mcbinRussell King
2020-11-03net: dsa/bcm_sf2: fix pause mode validationRussell King
The implementation appears not to support pause modes on anything but RGMII, RGMII_TXID, MII and REVMII interface modes. Let phylink know that detail. (This may not be correct; particularly see the FIXMEs in this patch.) Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-11-03net: phylink: use phy interface mode bitmapsRussell King
Use the phy interface mode bitmaps for SFP modules and PHYs to select the operating interface for SFPs and PHYs with SFPs. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-11-03net: phy: add supported_interfaces to marvell10g PHYsRussell King
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-11-03net: phy: add supported_interfaces to marvell PHYsRussell King
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-11-03net: phy: add supported_interfaces to bcm84881Russell King
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-11-03net: phy: marvell10g: select host interface configurationRussell King
Select the host interface configuration according to the capabilities of the host; this allows the kernel to support SFP modules using the 88x3310. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-11-03net: phy: pass supported PHY interface types to phylibRussell King
Pass the supported PHY interface types to phylib so that PHY drivers can select an appropriate host configuration mode for their interface according to the host capabilities. This is only done for SFP modules presently. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-11-03net: sfp: display SFP module information [*not for mainline*]Russell King
Display SFP module information verbosely, splitting the generic parts into a separate file. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2020-11-03net: sfp: add sfp+ compatible [*not for mainline*]Russell King
Add a compatible for SFP+ cages. SFP+ cages are backwards compatible, but the ethernet device behind them may not support the slower speeds of SFP modules. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-11-03net: sfp: add debugfs supportRussell King
Add debugfs support to SFP so that the internal state of the SFP state machines and hardware signal state can be viewed from userspace, rather than having to compile a debug kernel to view state state transitions in the kernel log. The 'state' output looks like: Module state: empty Module probe attempts: 0 0 Device state: up Main state: down Fault recovery remaining retries: 5 PHY probe remaining retries: 12 moddef0: 0 rx_los: 1 tx_fault: 1 tx_disable: 1 Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-11-03net: sfp: add support for cooled SFP+ transceiversRussell King
Cooled SFP+ transceivers need a longer initialisation (startup) time. Select the initialisation time depending on the cooled option bit. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-11-03net: phy: make phy_error() report which PHY has failedRussell King
phy_error() is called from phy_interrupt() or phy_state_machine(), and uses WARN_ON() to print a backtrace. The backtrace is not useful when reporting a PHY error. However, a system may contain multiple ethernet PHYs, and phy_error() gives no clue which one caused the problem. Replace WARN_ON() with a call to phydev_err() so that we can see which PHY had an error, and also inform the user that we are halting the PHY. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-11-03net: phy: marvell10g: allow PHY to probe without firmwareRussell King
Allow the PHY to probe when there is no firmware, but do not allow the link to come up by forcing the PHY state to PHY_HALTED in a similar way to phy_error(). Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-11-03net: phy: provide phy driver start/stop hooksRussell King
Provide phy driver start/stop hooks so that the PHY driver knows when the network driver is starting or stopping. This will be used for the Marvell 10G driver so that we can sanely refuse to start if the PHYs firmware is not present, and also so that we can sanely support SFPs behind the PHY. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-11-03net: phy: marvell*: add support for hw resolved pause modesRussell King
Support reporting the hardware resolved pause enablement states via phylib, overriding our software implementation. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-11-03net: phy: add resolved pause supportRussell King
Allow phylib drivers to pass the hardware-resolved pause state to MAC drivers, rather than using the software-based pause resolution code. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-11-03net: phy: marvell10g: add support for configuring LEDsRussell King
Add support for configuring the LEDs. Macchiatobin has an oddity in that the left LED goes out when the cable is connected, and flashes when there's link activity. This is because the reset default for the LED outputs assume that the LED is connected to supply, not to ground. Add support for configuring the LED modes and polarities. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-11-03net: phy: marvell10g: add downshift tunable supportRussell King
Add support for the downshift tunable for the Marvell 88x3310 PHY. Downshift is only usable with firmware 0.3.5.0 and later. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-11-03net: phy: add helpers for comparing phy IDsRussell King
There are several places which open code comparing PHY IDs. Provide a couple of helpers to assist with this, using a slightly simpler test than the original: - phy_id_compare() compares two arbitary PHY IDs and a mask of the significant bits in the ID. - phydev_id_compare() compares the bound phydev with the specified PHY ID, using the bound driver's mask. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-11-03net: phy: at803x: simplify custom phy id matchingRussell King
The at803x driver contains a function, at803x_match_phy_id(), which tests whether the PHY ID matches the value passed, comparing phy_id with phydev->phy_id and testing all bits that have a "one" in the mask, phydev->drv->phy_id_mask. This is the same test that is used to match the driver, with phy_id replaced with the driver specified ID, phydev->drv->phy_id. Hence, we already know the value of the bits being tested if we look at phydev->drv->phy_id directly, and we do not require a complicated test to check them. Test directly against phydev->drv->phy_id instead. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-11-03net: mtk_eth_soc: use resolved link config for PCS PHYRussell King
The SGMII PCS PHY needs to be updated with the link configuration in the mac_link_up() call rather than in mac_config(). However, mtk_sgmii_setup_mode_force() programs the SGMII block during mac_config() when using 802.3z interface modes with the link configuration. Split that functionality from mtk_sgmii_setup_mode_force(), moving it to a new mtk_sgmii_link_up() function, and call it from mac_link_up(). This does not look correct to me: 802.3z modes operate at a fixed speed. The contents of mtk_sgmii_link_up() look more appropriate for SGMII mode, but the original code definitely did not call mtk_sgmii_setup_mode_force() for SGMII mode but only 802.3z mode. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-11-03net: dsa: mv88e6xxx: implement .phylink_get_interfaces operationMarek BehĂșn
Implement the .phylink_get_interfaces method for mv88e6xxx driver. We are currently only interested in SGMII, 1000base-x and 2500base-x modes (for the SFP code). USXGMII and 10gbase-r can be added later for Amethyst. XAUI and RXAUI are irrelevant for SFP (but maybe not for QSFP?). Signed-off-by: Marek BehĂșn <kabel@kernel.org> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-11-03net: mvpp2: fill in phy interface mode bitmapRussell King
Fill in the phy interface mode bitmap for the Marvell mvpp2 driver, so phylink can know which interfaces are supported by the MAC. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-11-03net: mvneta: fill in phy interface mode bitmapRussell King
Fill in the phy interface mode bitmap for the Marvell mvneta driver, so phylink can know which interfaces are supported by the MAC. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-11-03net: phylink: use phy interface mode bitmaps for optical modulesRussell King
Where a MAC provides the PHY interface mode capabilities, use the PHY interface mode bitmaps to select the operating interface mode for optical SFP modules, rather than using the linkmode bitmaps. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-11-03net: sfp: add interface modes bitmapRussell King
We currently parse the SFP EEPROM to a bitmap of ethtool link modes, and then attempt to convert the link modes to a PHY interface mode. While this works at present, there are cases where this is sub-optimal. For example, where a module can operate with several different PHY interface modes. To start addressing this, arrange for the SFP EEPROM parsing to also provide a bitmap of the possible PHY interface modes. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-11-03net: dsa: mv88e6xxx: fix vlan setupRussell King
DSA assumes that a bridge which has vlan filtering disabled is not vlan aware, and ignores all vlan configuration. However, the kernel software bridge code allows configuration in this state. This causes the kernel's idea of the bridge vlan state and the hardware state to disagree, so "bridge vlan show" indicates a correct configuration but the hardware lacks all configuration. Even worse, enabling vlan filtering on a DSA bridge immediately blocks all traffic which, given the output of "bridge vlan show", is very confusing. Allow the VLAN configuration to be updated on Marvell DSA bridges, otherwise we end up cutting all traffic when enabling vlan filtering. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-11-03net: phylink: consider QSGMII interface mode in phylink_mii_c22_pcs_get_stateIoana Ciornei
The same link partner advertisement word is used for both QSGMII and SGMII, thus treat both interface modes using the same phylink_decode_sgmii_word() function. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Reviewed-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-11-03net: phylink: add helper function to decode USXGMII wordIoana Ciornei
With the new addition of the USXGMII link partner ability constants we can now introduce a phylink helper that decodes the USXGMII word and populates the appropriate fields in the phylink_link_state structure based on them. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Reviewed-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-11-03net: phylink: avoid oops during initialisationRussell King
If we intend to use PCS operations, mac_pcs_get_state() will not be implemented, so will be NULL. If we also intend to register the PCS operations in mac_prepare() or mac_config(), then this leads to an attempt to call NULL function pointer during phylink_start(). Avoid this. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-10-12net: mvgmac: support different hw versionsRussell King
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-10-12net: mvneta: split out GMACRussell King
Split out the code handling the GMAC from the rest of the driver. This block appears to be shared amongst several revisions of the IP. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-10-12net: mvneta: convert to phylink pcs operationsRussell King
An initial stab at converting mvneta to PCS operations. There's a few FIXMEs to be solved. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-10-12net: mvneta: move 1ms clock control into mac_prepare/mac_finishRussell King
Move the 1ms clock control out of mac_config() into mac_prepare() and mac_finish(), which simplifies the mac_config() code. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-10-12net: mvneta: convert to use mac_prepare()/mac_finish()Russell King
Convert mvneta to use the mac_prepare() and mac_finish() methods in preparation to converting mvneta to split-PCS support. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-10-12net: mvneta: program 1ms autonegotiation clock divisorRussell King
Program the 1ms autonegotiation clock divisor according to the clocking rate of neta - without this, the 1ms clock ticks at about 660us on Armada 38x configured for 250MHz. Bring this into correct specification. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-10-12phy: armada-38x: further augmentation of setupRussell King
Further augmentation of the comphy setup. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-10-12net: dsa/bcm_sf2: fix pause mode validationRussell King
The implementation appears not to support pause modes on anything but RGMII, RGMII_TXID, MII and REVMII interface modes. Let phylink know that detail. (This may not be correct; particularly see the FIXMEs in this patch.) Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-10-12net: phylink: use phy interface mode bitmapsRussell King
Use the phy interface mode bitmaps for SFP modules and PHYs to select the operating interface for SFPs and PHYs with SFPs. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-10-12net: phy: add supported_interfaces to marvell10g PHYsRussell King
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-10-12net: phy: add supported_interfaces to marvell PHYsRussell King
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-10-12net: phy: add supported_interfaces to bcm84881Russell King
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-10-12net: phy: marvell10g: select host interface configurationRussell King
Select the host interface configuration according to the capabilities of the host; this allows the kernel to support SFP modules using the 88x3310. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-10-12net: phy: pass supported PHY interface types to phylibRussell King
Pass the supported PHY interface types to phylib so that PHY drivers can select an appropriate host configuration mode for their interface according to the host capabilities. This is only done for SFP modules presently. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>