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2017-03-29drm/amdgpu: add initial uvd 7.0 support for vega10Leo Liu
Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29drm/amdgpu: add vega10 interrupt handlerKen Wang
Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29drm/amdgpu: implement GFX 9.0 support (v2)Ken Wang
Add support for gfx v9.0. v2: update golden settings from Ken Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29drm/amdgpu: add SDMA v4.0 implementation (v2)Ken Wang
v2: fix Makefile Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29drm/amdgpu: Add GMC 9.0 support (v2)Alex Xie
On SOC-15 parts, the GMC (Graphics Memory Controller) consists of two hubs: GFX (graphics and compute) and MM (sdma, uvd, vce). v2: drop sdma from Makefile, fix duplicate return statement. Signed-off-by: Alex Xie <AlexBin.Xie@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29drm/amdgpu: add NBIO 6.1 driverJunwei Zhang
This handles nbio 6.1 specific implementations which are used by various other IPs. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29drm/amdgpu: handle PTE MTYPE in amdgpu_vm_bo_split_mappingAlex Xie
Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Xie <AlexBin.Xie@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29drm/amdgpu: handle PTE EXEC in amdgpu_vm_bo_split_mappingAlex Xie
Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Xie <AlexBin.Xie@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29drm/amdgpu: gart fixes for vega10Alex Deucher
Flags need to be 0 to be considered invalid. Reviewed-by: Christian König <christian.koenig@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29drm/amdgpu: add psp firmware header infoHuang Rui
Defines the header info for the psp firmware. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29drm/amdgpu: rework common ucode handling for vega10Huang Rui
Handle ucode differences in vega10. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29drm/amdgpu: don't validate TILE_SPLIT on GFX9Marek Olšák
Signed-off-by: Marek Olšák <marek.olsak@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29drm/amdgpu: add NGG parametersAlex Deucher
NGG (Next Generation Graphics) is a new feature in GFX9.0. This adds the relevant parameters. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29drm/amdgpu: add PTE defines for MTYPEAlex Deucher
New on SOC-15 asics. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29drm/amdgpu: add IV trace pointChristian König
This allows us to grab IVs without spamming the log. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29drm/amdgpu: update IH IV ring entry for soc-15Alex Deucher
Reflect the new format on soc-15 asics. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29drm/amdgpu: use atomfirmware interfaces for scratch reg save/restoreAlex Deucher
If the board is atomfirmware based. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29drm/amdgpu: Add MTYPE flags to GPU VM IOCTL interfaceAlex Xie
Signed-off-by: Alex Xie <AlexBin.Xie@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29drm/amdgpu: add 64bit doorbell assignmentsKen Wang
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29drm/amdgpu: gb_addr_config structAndrey Grodzovsky
Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Ken Wang <Qingqing.Wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29drm/amdgpu: use new flag to handle different firmware loading methodHuang Rui
This patch introduces a new flag named "amdgpu_firmware_load_type" to handle different firmware loading method. Since Vega10, there are three ways to load firmware. It would be better to use a flag and a fw_load_type kernel parameter to configure it. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29drm/amdgpu: add clinetid definition for vega10ken
Signed-off-by: ken <Qingqing.Wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29drm/amdgpu: add vega10 chip nameKen Wang
Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29drm/amdgpu: add common soc15 headersKen Wang
These are used by various IP modules. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29drm/amdgpu: add SDMA 4.0 packet headerAlex Deucher
Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29drm/amdgpu: add gfx9 clearstate headerAlex Deucher
Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29drm/amd: Add MQD structs for GFX V9Felix Kuehling
This header defines the gfx v9 MEC structures. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Shaoyun Liu <Shaoyun.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29drm/amdgpu: add the VCE 4.0 register headersAlex Deucher
These are the Video Compression Engine registers for vega10. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29drm/amdgpu: add the UVD 7.0 register headersAlex Deucher
These are the Unifed Video Decoder registers for vega10. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29drm/amdgpu: add THM 9.0 register headersAlex Deucher
These are the THerMal control registers for vega10. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29drm/amdgpu: add SMUIO 9.0 register headersAlex Deucher
These are the System Managment Unit IO registers for vega10. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29drm/amdgpu: add SDMA 4.0 register headersAlex Deucher
These are the System DMA register headers for vega10. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29drm/amdgpu: add OSSSYS 4.0 register headersAlex Deucher
These are the OS Services register headers for vega10. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29drm/amdgpu: add NBIO 6.1 register headersAlex Deucher
These are the Bus IO registers for vega10. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29drm/amdgpu: add NBIF 6.1 register headersAlex Deucher
These are the Bus InterFace registers for vega10. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29drm/amdgpu: add MP 9.0 register headersAlex Deucher
MP is the system management controller on vega10. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29drm/amdgpu: add the MMHUB 1.0 register headersAlex Deucher
Add the MultiMedia Hub registers for vega10. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29drm/amdgpu: add the HDP 4.0 register headersAlex Deucher
These are the Host Data Path registers for vega10. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29drm/amdgpu: add the GC 9.0 register headersAlex Deucher
Add the Graphics Core register headers for vega10. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29drm/amdgpu: Add the DCE 12.0 register headersAlex Deucher
These are the register headers for the Display and Composition Engine on vega10. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29drm/amdgpu: Add ATHUB 1.0 register headersAlex Deucher
ATHUB is part of the memory controller on soc15 asics. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29drm/amdgpu: add vega10_enum.hAlex Deucher
This adds the register bitfield enums for vega10. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29drm/amdgpu: add soc15ip.hAlex Deucher
This header defines the IP layout for soc15 based SoCs. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29drm/amdgpu: add basic support for atomfirmware.h (v3)Alex Deucher
This adds basic support for asics that use atomfirmware.h to define their vbios tables. v2: rebase v3: squash in num scratch reg fix Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Ken Wang <Qingqing.Wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29drm/amdgpu: move atom scratch setup into amdgpu_atombios.cAlex Deucher
There will be a slightly different version for atomfirmware. Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Ken Wang <Qingqing.Wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29amdgpu: detect if we are using atomfirmware or atombios for vbios (v2)Alex Deucher
Supposedly atomfirmware rom header is 3.3 atombios is 1.1. v2: rebased on newer kernel Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29drm/amdgpu: add the new atomfirmware interface headerAlex Deucher
soc15 asics have a new vbios interface. These headers define that interface. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29drm/amdgpu: add optional fence out-parameter to amdgpu_vm_clear_freedNicolai Hähnle
We will add the fence to freed buffer objects in a later commit, to ensure that the underlying memory can only be re-used after all references in page tables have been cleared. Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29drm/amd/powerplay: restore disabling power containment on Fiji (v2)Eric Huang
Power containment will degrade performance in some compute tests. Restore disabling it as before code refining in powerplay. v2: only in the compute profile Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Reviewed-by: Felix Kuehling <felix.kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29drm/amdgpu/gfx8: further KIQ parameter cleanupAlex Deucher
The ring structure already has what we need. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit (git 2.34.1) at 2025-05-30 10:21:15 +0000