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2020-03-27iwlwifi: pcie: make iwl_pcie_cmdq_reclaim staticJohannes Berg
There's no need for this to be exposed outside of the tx.c file, make it static. Change-Id: I41d40008311b108d0578bd2ec73c5477e700a839 Signed-off-by: Johannes Berg <johannes.berg@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2020-03-27iwlwifi: bump FW API to 53 for 22000 seriesLuca Coelho
Start supporting API version 53 for 22000 series. Change-Id: I5725e46394f3f53c3069723fd513cc53c7df383d Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2020-03-27iwlwifi: remove IWL_FW_DBG_DOMAIN macroJohannes Berg
This is used to initialize the default value, but refers back to the value itself, essentially leading to a val = val assignment at init time ... that's useless, remove it and use _NODEF. Change-Id: I725923016563c34ce2fa057bf7c12984e1041c49 Signed-off-by: Johannes Berg <johannes.berg@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2020-03-27iwlwifi: yoyo: enable yoyo by defaultLuca Coelho
Now that YoYo is more mature, we can enable it by default, so we collect data in the new way. Change-Id: Ic1a147f935286b085ca8bdb248a7493b7c6341ea Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2020-03-27iwlwifi: scan: support FW APIs with variable number of profilesTova Mussai
The FW changed the maximum number of scan offload profiles to 8 in new APIs. Support it by changing the scan_offload_profile_cfg struct to be more dynamic, so we can reuse most of the code and only change size of the profiles array. Change-Id: I65210cf541af46e2675a8c764d5871f7f5b070d6 Signed-off-by: Tova Mussai <tova.mussai@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2020-03-27iwlwifi: yoyo: don't block dumping internal memory when not in SRAM moderotem saado
When we have an assert during D3 we want to dump the internal buffer memory even if are we working in DRAM debug mode. We should not block dumping it. Change-Id: I69aad2d4904c4f8bb653c61e8781a2e07780054f Signed-off-by: Rotem Saado <rotem.saado@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2020-03-27iwlwifi: remove support for QnJ HR FPGALuca Coelho
We don't support the FPGA versions of this card combination anymore. Remove the cfg mangling that tries to load it and all the relevant structures. Change-Id: I190652101afcab682cfba873d062992f11efca32 Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2020-03-27iwlwifi: remove support for QnJ Hr STEP ALuca Coelho
We don't support QnJ HR STEP A anymore. Remove the structures we used for it. Change-Id: I0dfd88232bdc8ff2dd9c4368b8ed9a0c40c86bc8 Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2020-03-27iwlwifi: add trans_cfg for devices with long latencyLuca Coelho
A couple of SoCs, which can be recognized by PCI device IDs 0xA0F0 and 0x43F0, need a longer wait for the xtal to stabilize. To handle this, add a new trans_cfg structure for Qu devices with a larger xtal_latency value and apply them to the devices recognized by these IDs. Also add a flag that allows us to inform the FW that the low latency xtal should be used. Change-Id: I8a14c6af45ea14d8e7f1ef38a589158f38d0c0ea Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2020-03-27iwlwifi: add support for version 2 of SOC_CONFIGURATION_CMDLuca Coelho
This new command is mostly backwards compatible, with the exception that the device_type element was changed into a bitmask. The device type bit remains the same (because we only had 0 and 1 anyway), but when using v1 we can't set any other bits, because that would change the integer. Other than that, the struct remains the same and the driver can set the device_type bit in both cases, but it can only set the low_latency bit if VER_2 is used. Change-Id: Ib68d4c821ebcce253b42ed0ea15881fb4e3e01da Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2020-03-27iwlwifi: mvm: add support for non EDCA based measurementsAvraham Stern
Add support for requesting trigger-based / non trigger-based measurements. Change-Id: Ib4d0c471da9c50d9981541a7f5926db384a0f7ce Signed-off-by: Avraham Stern <avraham.stern@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2020-03-27iwlwifi: remove unnecessary cfg mangling for Qu C and QuZ with JfLuca Coelho
Now that we identify the correct cfgs with the new tables for Qu step C and QuZ with Jf, we can remove the mangling we do later on. Change-Id: Ic01ce67db147e897ad2424f0e05a70a00d2c620e Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2020-03-27iwlwifi: convert QnJ with Jf devices to new config tableLuca Coelho
All the QnJ devices have a similar matching to the other Qu devices, but needs a different configuration. Convert the QnJ devices to the new table accordingly. Change-Id: If236ef3d0da3e605a3379922818f5897e0affd7e Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2020-03-27iwlwifi: convert all Qu with Jf devices to the new config tableLuca Coelho
Add new generic iwl_trans structures for these devices and apply the correct cfg depending on the device characteristics. Since we have to match Qu with IWL_CONFIG_ANY, we also need to move the Hr devices to the new table, but for now we keep matching on PCI device and subsystem device IDs. Change-Id: I14e9146a99621ff11ce50bc746a4b88af508fee0 Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2020-03-27iwlwifi: add HW step to new cfg device tableLuca Coelho
We need to use different firmware versions for different HW steps with certain devices. Prepare for this differentiation by adding HW step to the new device table. Change-Id: Ib1afb7b0c89e9dc2d26e6d32ea19e978c17ba1dd Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2020-03-27iwlwifi: remove some unused extern declarations from iwl-config.hLuca Coelho
After the refactoring, a few extern declarations were accidentally left in the iwl-config.h file. Remove them Change-Id: I79745e440ed5a0a90db61b0daaae374ecef09e86 Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2020-03-27iwlwifi: move integrated, extra_phy and soc_latency to trans_cfgLuca Coelho
These values are selected based on the PCI device ID, so the decision to use them can be made early. By moving them to the trans_cfg, we avoid duplicating the large cfg structs for small pieces of data (sometimes a single boolean). This will also allow us to make more decisions based on, for instance, the SoC type in used. The trans_cfg concept changes a bit, because previously it was used only to boot the device before reading further characteristics and now it also contains more data that is associated with the device ID. Change-Id: Ib71b07ea9e322eb74571dc5e8aa58f17eece5c9c Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2020-03-27iwlwifi: mvm: enable SF also when we have HEJohannes Berg
We shouldn't do this just for HT/VHT, but be future-proof and also check for HE. Change-Id: Icaeff714c00a773681dbfee72558afd1c7121c5d Signed-off-by: Johannes Berg <johannes.berg@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2020-03-27iwlwifi: remove redundant iwl9560_2ac_cfg structLuca Coelho
The iwl9560_2ac_cfg struct is used for PNJ devices and the configuration is the same as iwl9260_2ac_cfg, so we can remove the former to avoid redundancy. Change-Id: I17ac1802f00bd80006930b922a9fc21df60e3c16 Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2020-03-27iwlwifi: mvm: rs-fw: fix some indentationJohannes Berg
That closing brace for the switch statement is misplaced, fix it. Change-Id: I39af135a9e3fc64337d2cced43a70cb48fe3b9c1 Signed-off-by: Johannes Berg <johannes.berg@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2020-03-27iwlwifi: scan: support scan req cmd ver 14Shahar S Matityahu
Modify adaptive dwell number of APs override API Instead of using channel to index mapping, add the adaptive dwell override parameters as part of the configuration per channel in the scan request command. Support 2 different override values and use them as follows: 1. 10 APs for friendly GO channels in p2p scan. 2. 2 APs for social channels in p2p scan. Change-Id: I3b461108abf2306c3d054099112f2c3afce1cc92 Signed-off-by: Shahar S Matityahu <shahar.s.matityahu@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2020-03-27iwlwifi: pass trans and NVM data to HE capability parsingJohannes Berg
We'll need this data in the future, pass the values. Change-Id: Iaeff50716e783f5c0bcea86ca1c93ada1560525e Signed-off-by: Johannes Berg <johannes.berg@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2020-03-27iwlwifi: pcie: implement read_config32Luca Coelho
Add the read_config32 op to allow dumping the config space when needed. Change-Id: Ib2d254a38a4bfb95dcc3d04eec91781827a0c623 Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2020-03-27iwlwifi: yoyo: add PCI config space region typeLuca Coelho
Add a new region type that allows us to dump the PCI config space. This is mostly the same as dumping a memory region, but reading from the device's config space instead. In order to make this generic and independent of the trans type, we make a function called iwl_dump_ini_config_iter() that calls a new op in the transport to read its config space. Change-Id: I15151bddf589f13b0e0a45c28b96bbcd73bcfdeb Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2020-03-27iwlwifi: mvm: add soc latency supportShahar S Matityahu
Some devices require longer time to stabilize the power and XTAL. This is especially true for devices integrated in the SoC. Add support for a new firmware API that allows the driver to set the latency value accordingly. Change-Id: I6829a46b89e4e701f80a0e4033f4dd41ee44ed12 Signed-off-by: Shahar S Matityahu <shahar.s.matityahu@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2020-03-26hostap: convert to struct proc_opsYueHaibing
commit 97a32539b956 ("proc: convert everything to "struct proc_ops"") forget do this convering for prism2_download_aux_dump_proc_fops. Fixes: 97a32539b956 ("proc: convert everything to "struct proc_ops"") Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/20200326032432.20384-1-yuehaibing@huawei.com
2020-03-26rtw88: fix non-increase management packet sequence numberTzu-En Huang
In previous setting, management packets' sequence numbers will not increase and always stay at 0. Add hw sequence number support for mgmt packets. The table below shows different sequence number setting in the tx descriptor. seq num ctrl | EN_HWSEQ | DISQSELSEL | HW_SSN_SEL ------------------------------------------------------ sw ctrl | 0 | N/A | N/A hw ctrl per MACID | 1 | 0 | N/A hw ctrl per HWREG | 1 | 1 |HWREG(0/1/2/3) Signed-off-by: Tzu-En Huang <tehuang@realtek.com> Signed-off-by: Yan-Hsuan Chuang <yhchuang@realtek.com> Reviewed-by: Brian Norris <briannorris@chromium.org> Tested-by: Brian Norris <briannorris@chromium.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/20200326020408.25218-1-yhchuang@realtek.com
2020-03-26Merge ath-next from git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.gitKalle Valo
ath.git patches for v5.7. Major changes: ath11k * handle RX fragments * enable PN offload * add support for HE BSS color
2020-03-26brcmfmac: add USB autosuspend feature supportWright Feng
We add enable dynamic suspend (autosuspend) support in host driver, and it can let platform cut down idle power consumption. To support autosuspend feature in host driver, kernel need to be built with CONFIG_USB_SUSPEND and autosuspend need to be turn on. And we also replace wowl feature with adding "needs_remote_wakeup", so that host still can be waken by wireless device. Signed-off-by: Wright Feng <wright.feng@cypress.com> Signed-off-by: Chi-Hsien Lin <chi-hsien.lin@cypress.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1585124429-97371-6-git-send-email-chi-hsien.lin@cypress.com
2020-03-26brcmfmac: increase max hanger slots from 1K to 3K in fws layerMadhan Mohan R
Will enable FMAC to push more packets to bus tx queue and help improve throughput when fws queuing is enabled. This change is required to tune the throughput for passing WMM CERT tests. Signed-off-by: Madhan Mohan R <madhanmohan.r@cypress.com> Signed-off-by: Chi-hsien Lin <chi-hsien.lin@cypress.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1585124429-97371-5-git-send-email-chi-hsien.lin@cypress.com
2020-03-26brcmfmac: fix the incorrect return value in brcmf_inform_single_bss().Raveendran Somu
The function brcmf_inform_single_bss returns the value as success, even when the length exceeds the maximum value. The fix is to send appropriate code on this error. This issue is observed when Cypress test group reported random fmac crashes when running their tests and the path was identified from the crash logs. With this fix the random failure issue in Cypress test group was resolved. Reviewed-by: Arend van Spriel <arend.vanspriel@broadcom.com> Signed-off-by: Raveendran Somu <raveendran.somu@cypress.com> Signed-off-by: Chi-hsien Lin <chi-hsien.lin@cypress.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1585124429-97371-4-git-send-email-chi-hsien.lin@cypress.com
2020-03-26brcmfmac: Fix double freeing in the fmac usb data pathRaveendran Somu
When the brcmf_fws_process_skb() fails to get hanger slot for queuing the skb, it tries to free the skb. But the caller brcmf_netdev_start_xmit() of that funciton frees the packet on error return value. This causes the double freeing and which caused the kernel crash. Signed-off-by: Raveendran Somu <raveendran.somu@cypress.com> Signed-off-by: Chi-hsien Lin <chi-hsien.lin@cypress.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1585124429-97371-3-git-send-email-chi-hsien.lin@cypress.com
2020-03-26brcmfmac: Fix driver crash on USB control transfer timeoutRaveendran Somu
When the control transfer gets timed out, the error status was returned without killing that urb, this leads to using the same urb. This issue causes the kernel crash as the same urb is sumbitted multiple times. The fix is to kill the urb for timeout transfer before returning error Signed-off-by: Raveendran Somu <raveendran.somu@cypress.com> Signed-off-by: Chi-hsien Lin <chi-hsien.lin@cypress.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1585124429-97371-2-git-send-email-chi-hsien.lin@cypress.com
2020-03-26rtl8xxxu: Feed current txrate information for mac80211Chris Chiu
The nl80211 commands such as 'iw link' can't get current txrate information from the driver. This commit fills in the tx rate information from the C2H RA report in the sta_statistics function. Signed-off-by: Chris Chiu <chiu@endlessm.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/20200320063833.1058-3-chiu@endlessm.com
2020-03-26rtl8xxxu: add enumeration for channel bandwidthChris Chiu
There's a data field in H2C and C2H commands which is used to carry channel bandwidth information. Add enumeration to make it more descriptive in code. Signed-off-by: Chris Chiu <chiu@endlessm.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/20200320063833.1058-2-chiu@endlessm.com
2020-03-26rtw88: add a debugfs entry to enable/disable coex mechanismYan-Hsuan Chuang
Sometimes we need to stop the coex mechanism to debug, so that we can manually control the device through various outer commands. Hence, add a new debugfs coex_enable to allow us to enable/disable the coex mechanism when driver is running. To disable coex echo 0 > /sys/kernel/debug/ieee80211/phyX/rtw88/coex_enable To enable coex echo 1 > /sys/kernel/debug/ieee80211/phyX/rtw88/coex_enable To check coex dm is enabled or not cat /sys/kernel/debug/ieee80211/phyX/rtw88/coex_enable Signed-off-by: Yan-Hsuan Chuang <yhchuang@realtek.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/20200313033008.20070-3-yhchuang@realtek.com
2020-03-26rtw88: add a debugfs entry to dump coex's infoYan-Hsuan Chuang
Add a new entry "coex_info" in debugfs to dump coex's states for us to debug on coex's issues. The basic concept for co-existence (coex, usually for WiFi + BT) is to decide a strategy based on the current status of WiFi and BT. So, it means the WiFi driver requires to gather information from BT side and choose a strategy (TDMA/table/HW settings). Althrough we can easily check the current status of WiFi, e.g., from kernel log or just dump the hardware registers, it is still very difficult for us to gather so many different types of WiFi states (such as RFE config, antenna, channel/band, TRX, Power save). Also we will need BT's information that is stored in "struct rtw_coex". So it is necessary for us to have a debugfs that can dump all of the WiFi/BT information required. Note that to debug on coex related issues, we usually need a longer period of time of coex_info dump every 2 seconds (for example, 30 secs, so we should have 15 times of coex_info's dump). Signed-off-by: Yan-Hsuan Chuang <yhchuang@realtek.com> Reviewed-by: Chris Chiu <chiu@endlessm.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/20200313033008.20070-2-yhchuang@realtek.com
2020-03-24net: phy: mscc: consolidate a common RGMII delay implementationVladimir Oltean
It looks like the VSC8584 PHY driver is rolling its own RGMII delay configuration code, despite the fact that the logic is mostly the same. In fact only the register layout and position for the RGMII controls has changed. So we need to adapt and parameterize the PHY-dependent bit fields when calling the new generic function. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-24net: axienet: Allow DMA to beyond 4GBAndre Przywara
With all DMA address accesses wrapped, we can actually support 64-bit DMA if this option was chosen at IP integration time. If the IP has been configured for an address width greater than 32 bits, we assume the full 64 bit DMA width is working. In practise this will be limited by the actual system address bus width, which will ideally be the same as the DMA IP address width. If this is not the case, the actual width can still be configured using a dma-ranges property in the parent of the MAC node. This increases the DMA mask on those systems to let the kernel choose buffers from memory at higher addresses. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-24net: axienet: Autodetect 64-bit DMA capabilityAndre Przywara
When newer revisions of the Axienet IP are configured for a 64-bit bus, we *need* to write to the MSB part of the an address registers, otherwise the IP won't recognise this as a DMA start condition. This is even true when the actual DMA address comes from the lower 4 GB. To autodetect this configuration, at probe time we write all 1's to such an MSB register, and see if any bits stick. If this is configured for a 32-bit bus, those MSB registers are RES0, so reading back 0 indicates that no MSB writes are necessary. On the other hands reading anything other than 0 indicated the need to write the MSB registers, so we set the respective flag. The actual DMA mask stays at 32-bit for now. To help bisecting, a separate patch will enable allocations from higher addresses. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-24net: axienet: Upgrade descriptors to hold 64-bit addressesAndre Przywara
Newer revisions of the AXI DMA IP (>= v7.1) support 64-bit addresses, both for the descriptors itself, as well as for the buffers they are pointing to. This is realised by adding "MSB" words for the next and phys pointer right behind the existing address word, now named "LSB". These MSB words live in formerly reserved areas of the descriptor. If the hardware supports it, write both words when setting an address. The buffer address is handled by two wrapper functions, the two occasions where we set the next pointers are open coded. For now this is guarded by a flag which we don't set yet. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-24net: axienet: Wrap DMA pointer writes to prepare for 64 bitAndre Przywara
Newer versions of the Xilink DMA IP support busses with more than 32 address bits, by introducing an MSB word for the registers holding DMA pointers (tail/current, RX/TX descriptor addresses). On IP configured for more than 32 bits, it is also *required* to write both words, to let the IP recognise this as a start condition for an MM2S request, for instance. Wrap the DMA pointer writes with a separate function, to add this functionality later. For now we stick to the lower 32 bits. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-24net: axienet: Add mii-tool supportAndre Przywara
mii-tool is useful for debugging, and all it requires to work is to wire up the ioctl ops function pointer. Add this to the axienet driver to enable mii-tool. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-24net: axienet: Drop MDIO interrupt registers from ethtools dumpAndre Przywara
Newer revisions of the IP don't have these registers. Since we don't really use them, just drop them from the ethtools dump. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-24net: axienet: Mark eth_irq as optionalAndre Przywara
According to the DT binding, the Ethernet core interrupt is optional. Use platform_get_irq_optional() to avoid the error message when the IRQ is not specified. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-24net: axienet: Check for DMA mapping errorsAndre Przywara
Especially with the default 32-bit DMA mask, DMA buffers are a limited resource, so their allocation can fail. So as the DMA API documentation requires, add error checking code after dma_map_single() calls to catch the case where we run out of "low" memory. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-24net: axienet: Factor out TX descriptor chain cleanupAndre Przywara
Factor out the code that cleans up a number of connected TX descriptors, as we will need it to properly roll back a failed _xmit() call. There are subtle differences between cleaning up a successfully sent chain (unknown number of involved descriptors, total data size needed) and a chain that was about to set up (number of descriptors known), so cater for those variations with some extra parameters. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-24net: axienet: Improve DMA error handlingAndre Przywara
Since 0 is a valid DMA address, we cannot use the physical address to check whether a TX descriptor is valid and is holding a DMA mapping. Use the "cntrl" member of the descriptor to make this decision, as it contains at least the length of the buffer, so 0 points to an uninitialised buffer. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-24net: axienet: Fix DMA descriptor cleanup pathAndre Przywara
When axienet_dma_bd_init() bails out during the initialisation process, it might do so with parts of the structure already allocated and initialised, while other parts have not been touched yet. Before returning in this case, we call axienet_dma_bd_release(), which does not take care of this corner case. This is most obvious by the first loop happily dereferencing lp->rx_bd_v, which we actually check to be non NULL *afterwards*. Make sure we only unmap or free already allocated structures, by: - directly returning with -ENOMEM if nothing has been allocated at all - checking for lp->rx_bd_v to be non-NULL *before* using it - only unmapping allocated DMA RX regions This avoids NULL pointer dereferences when initialisation fails. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-24net: axienet: Propagate failure of DMA descriptor setupAndre Przywara
When we fail allocating the DMA buffers in axienet_dma_bd_init(), we report this error, but carry on with initialisation nevertheless. This leads to a kernel panic when the driver later wants to send a packet, as it uses uninitialised data structures. Make the axienet_device_reset() routine return an error value, as it contains the DMA buffer initialisation. Make sure we propagate the error up the chain and eventually fail the driver initialisation, to avoid relying on non-initialised buffers. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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