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2023-08-02net: tun: change tun_alloc_skb() to allow bigger paged allocationsEric Dumazet
tun_alloc_skb() is currently calling sock_alloc_send_pskb() forcing order-0 page allocations. Switch to PAGE_ALLOC_COSTLY_ORDER, to increase max allocation size by 8x. Also add logic to increase the linear part if needed. Signed-off-by: Eric Dumazet <edumazet@google.com> Cc: Tahsin Erdogan <trdgn@amazon.com> Reviewed-by: Willem de Bruijn <willemb@google.com> Link: https://lore.kernel.org/r/20230801205254.400094-3-edumazet@google.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-08-02net/mlx5e: Make TC and IPsec offloads mutually exclusive on a netdevJianbo Liu
For IPsec packet offload mode, the order of TC offload and IPsec offload on the same netdevice is not aligned with the order in the non-offload software. For example, for RX, the software performs TC first and then IPsec transformation, but the implementation for offload does that in the opposite way. To resolve the difference for now, either IPsec offload or TC offload, not both, is allowed for a specific interface. Signed-off-by: Jianbo Liu <jianbol@nvidia.com> Signed-off-by: Leon Romanovsky <leonro@nvidia.com> Link: https://lore.kernel.org/r/8e2e5e3b0984d785066e8663aaf97b3ba1bb873f.1690802064.git.leon@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-08-02net/mlx5e: Add get IPsec offload stats for uplink representorJianbo Liu
As IPsec offload is supported in switchdev mode, HW stats can be can be obtained from uplink rep. Signed-off-by: Jianbo Liu <jianbol@nvidia.com> Signed-off-by: Leon Romanovsky <leonro@nvidia.com> Link: https://lore.kernel.org/r/b43c91c452f1db9c35c10639a029aa10fd8b7895.1690802064.git.leon@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-08-02net/mlx5e: Modify and restore TC rules for IPSec TX rulesJianbo Liu
After IPsec policy/state TX rules are added, any TC flow rule, which forwards packets to uplink, is modified to forward to IPsec TX tables. As these tables are destroyed dynamically, whenever there is no reference to them, the destinations of this kind of rules must be restored to uplink. There is a special case for packet encapsulation, as the packet_reformat_id in the extended destination is used to reformat packets, but only for the VPORT destination. To forward packet to IPsec table and do encapsulation in one FTE, move the packet_reformat_id to flow context, instead of using the extended destination. As a limitation, multiple encapsulations with table forwarding, and one together with other VPORT destinations, are not allowed, so add a check when offloading TC rules. TC rules are not allowed before IPsec TX rule is added, so only need to restore TC rules after flush IPSec TX rules. As they are saved in the vport_rep rhashtables, we walk all the rules in the rhashtables, and find TC rules with destinations pointing to IPsec tables, and modify them one by one. To avoid concurrent issue, this handling is done under the protection of eswitch mode_lock. Signed-off-by: Jianbo Liu <jianbol@nvidia.com> Signed-off-by: Leon Romanovsky <leonro@nvidia.com> Link: https://lore.kernel.org/r/7bcb2c7e2ecf0e0d06b095c8dcc6a37ea7f02faf.1690802064.git.leon@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-08-02net/mlx5e: Make IPsec offload work together with eswitch and TCJianbo Liu
The eswitch mode is not allowed to change if there are any IPsec rules. Besides, by using mlx5_esw_try_lock() to get eswitch mode lock, IPsec rules are not allowed to be offloaded if there are any TC rules. Signed-off-by: Jianbo Liu <jianbol@nvidia.com> Signed-off-by: Leon Romanovsky <leonro@nvidia.com> Link: https://lore.kernel.org/r/e442b512b21a931fbdfb87d57ae428c37badd58a.1690802064.git.leon@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-08-02net/mlx5: Compare with old_dest param to modify rule destinationJianbo Liu
The rule destination must be compared with the old_dest passed in. Signed-off-by: Jianbo Liu <jianbol@nvidia.com> Reviewed-by: Mark Bloch <mbloch@nvidia.com> Signed-off-by: Leon Romanovsky <leonro@nvidia.com> Link: https://lore.kernel.org/r/24adc60d05d7492359ba343c6da1ebbe9fe284f6.1690802064.git.leon@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-08-02net/mlx5e: Support IPsec packet offload for TX in switchdev modeJianbo Liu
The IPsec encryption is done at the last, so add new prio for IPsec offload in FDB, and put it just lower than the slow path prio and higher than the per-vport prio. Three levels are added for TX. The first one is for ip xfrm policy. The sa table is created in the second level for ip xfrm state. The status table is created at the last to count the number of packets encrypted. The rules, which forward packets to uplink, are changed to forward them to IPsec TX tables first. These rules are restored after those tables are destroyed, which is done immediately when there is no reference to them, just as what does in legacy mode. The support for slow path is added here, by refreshing uplink's channels. But, the handling for TC fast path, which is more complicated, will be added later. Besides, reg c4 is used instead to match reqid. Signed-off-by: Jianbo Liu <jianbol@nvidia.com> Signed-off-by: Leon Romanovsky <leonro@nvidia.com> Link: https://lore.kernel.org/r/cfd0e6ffaf0b8c55ebaa9fb0649b7c504b6b8ec6.1690802064.git.leon@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-08-02net/mlx5e: Refactor IPsec TX tables creationJianbo Liu
Add attribute for IPsec TX creation, pass all needed parameters in it, so tx_create() can be used by eswitch. Signed-off-by: Jianbo Liu <jianbol@nvidia.com> Reviewed-by: Leon Romanovsky <leonro@nvidia.com> Signed-off-by: Leon Romanovsky <leonro@nvidia.com> Link: https://lore.kernel.org/r/24d5ab988b0db2d39b7fde321b44ffe885d47828.1690802064.git.leon@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-08-02net/mlx5e: Handle IPsec offload for RX datapath in switchdev modeJianbo Liu
Reuse tun opts bits in reg c1, to pass IPsec obj id to datapath. As this is only for RX SA and there are only 11 bits, xarray is used to map IPsec obj id to an index, which is between 1 and 0x7ff, and replace obj id to write to reg c1. Signed-off-by: Jianbo Liu <jianbol@nvidia.com> Signed-off-by: Leon Romanovsky <leonro@nvidia.com> Link: https://lore.kernel.org/r/43d60fbcc9cd672a97d7e2a2f7fe6a3d9e9a776d.1690802064.git.leon@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-08-02net/mlx5e: Support IPsec packet offload for RX in switchdev modeJianbo Liu
As decryption must be done first, add new prio for IPsec offload in FDB, and put it just lower than BYPASS prio and higher than TC prio. Three levels are added for RX. The first one is for ip xfrm policy. SA table is created in the second level for ip xfrm state. The status table is created in the last to check the decryption result. If success, packets continue with the next process, or dropped otherwise. For now, the set of reg c1 is removed for swtichdev mode, and the datapath process will be added in the next patch. Signed-off-by: Jianbo Liu <jianbol@nvidia.com> Signed-off-by: Leon Romanovsky <leonro@nvidia.com> Link: https://lore.kernel.org/r/c91063554cf643fb50b99cf093e8a9bf11729de5.1690802064.git.leon@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-08-02net/mlx5e: Refactor IPsec RX tables creation and destructionJianbo Liu
Add attribute for IPsec RX creation, so rx_create() can be used by eswitch in later patch. And move the code for TTC dest connect/disconnect, which are needed only in NIC mode, to individual functions. Signed-off-by: Jianbo Liu <jianbol@nvidia.com> Signed-off-by: Leon Romanovsky <leonro@nvidia.com> Link: https://lore.kernel.org/r/87478d928479b6a4eee41901204546ea05741815.1690802064.git.leon@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-08-02net/mlx5e: Prepare IPsec packet offload for switchdev modeJianbo Liu
As the uplink representor is created only in switchdev mode, add a local variable for IPsec to indicate the device is in this mode. In this mode, IPsec ROCE is disabled, and crypto offload is kept as it is. However, as the tables for packet offload are created in FDB, ipsec->rx_esw and ipsec->tx_esw are added. Signed-off-by: Jianbo Liu <jianbol@nvidia.com> Signed-off-by: Leon Romanovsky <leonro@nvidia.com> Link: https://lore.kernel.org/r/ee242398f3b0a18007749fe79ff6ff19445a0280.1690802064.git.leon@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-08-02net/mlx5e: Change the parameter of IPsec RX skb handle functionJianbo Liu
Refactor the function to pass in reg B value only. Signed-off-by: Jianbo Liu <jianbol@nvidia.com> Signed-off-by: Leon Romanovsky <leonro@nvidia.com> Link: https://lore.kernel.org/r/3b3c53f64660d464893eaecc41298b1ce49c6baa.1690802064.git.leon@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-08-02net/mlx5e: Add function to get IPsec offload namespaceJianbo Liu
Add function to get namespace in different directions. It will be extended for switchdev mode in later patch, but no functionality change for now. Signed-off-by: Jianbo Liu <jianbol@nvidia.com> Signed-off-by: Leon Romanovsky <leonro@nvidia.com> Link: https://lore.kernel.org/r/ac2982c34f1ed3288d4670cacfd7e1b87a8c96d9.1690802064.git.leon@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-08-02pds_core: Fix documentation for pds_client_registerBrett Creeley
The documentation above pds_client_register states that it returns 0 on success and negative on error. However, it actually returns a positive client ID on success and negative on error. Fix the documentation to state exactly that. Signed-off-by: Brett Creeley <brett.creeley@amd.com> Signed-off-by: Shannon Nelson <shannon.nelson@amd.com> Reviewed-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Link: https://lore.kernel.org/r/20230801165833.1622-1-brett.creeley@amd.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-08-02cirrus: cs89x0: fix the return value handle and remove redundant dev_warn() ↵Ruan Jinjie
for platform_get_irq() There is no possible for platform_get_irq() to return 0 and the return value of platform_get_irq() is more sensible to show the error reason. And there is no need to call the dev_warn() function directly to print a custom message when handling an error from platform_get_irq() function as it is going to display an appropriate error message in case of a failure. Signed-off-by: Ruan Jinjie <ruanjinjie@huawei.com> Reviewed-by: Simon Horman <horms@kernel.org> Reviewed-by: Alex Elder <elder@linaro.org> Link: https://lore.kernel.org/r/20230801133121.416319-1-ruanjinjie@huawei.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-08-02net: dsa: hellcreek: Replace bogus commentKurt Kanzenbach
Replace bogus comment about matching the latched timestamp to one of the received frames. That comment is probably copied from mv88e6xxx and true for these switches. However, the hellcreek switch is configured to insert the timestamp directly into the PTP packets. While here, remove the other comments regarding the list splicing and locking as well, because it doesn't add any value. Signed-off-by: Kurt Kanzenbach <kurt@linutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Link: https://lore.kernel.org/r/20230801131647.84697-1-kurt@linutronix.de Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-08-02bnx2x: Remove unnecessary ternary operatorsRuan Jinjie
There are a little ternary operators, the true or false judgement of which is unnecessary in C language semantics. Signed-off-by: Ruan Jinjie <ruanjinjie@huawei.com> Reviewed-by: Simon Horman <horms@kernel.org> Link: https://lore.kernel.org/r/20230801111928.300231-1-ruanjinjie@huawei.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-08-02octeontx2: Remove unnecessary ternary operatorsRuan Jinjie
There are a little ternary operators, the true or false judgement of which is unnecessary in C language semantics. So remove it to clean Code. Signed-off-by: Ruan Jinjie <ruanjinjie@huawei.com> Reviewed-by: Simon Horman <horms@kernel.org> Reviewed-by: Sunil Goutham <sgoutham@marvell.com> Link: https://lore.kernel.org/r/20230801112638.317149-1-ruanjinjie@huawei.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-08-02net: hisilicon: fix the return value handle and remove redundant ↵Ruan Jinjie
netdev_err() for platform_get_irq() There is no possible for platform_get_irq() to return 0 and the return value of platform_get_irq() is more sensible to show the error reason. And there is no need to call the netdev_err() function directly to print a custom message when handling an error from platform_get_irq() function as it is going to display an appropriate error message in case of a failure. Signed-off-by: Ruan Jinjie <ruanjinjie@huawei.com> Reviewed-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Reviewed-by: Dan Carpenter <dan.carpenter@linaro.org> Link: https://lore.kernel.org/r/20230731073858.3633193-1-ruanjinjie@huawei.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-08-02net: Remove duplicated include in mac.cYang Li
./drivers/net/ethernet/freescale/fman/mac.c: linux/of_platform.h is included more than once. Reported-by: Abaci Robot <abaci@linux.alibaba.com> Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=6039 Signed-off-by: Yang Li <yang.lee@linux.alibaba.com> Reviewed-by: Simon Horman <horms@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-08-02net: ti: icssg-prueth: Add Power management supportMD Danish Anwar
Add suspend / resume APIs to support power management in ICSSG ethernet driver. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: MD Danish Anwar <danishanwar@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-08-02net: ti: icssg-prueth: Add ethtool ops for ICSSG Ethernet driverMD Danish Anwar
Add icssg_ethtool.c file. This file will be used for dumping statistics via ethtool for ICSSG ethernet driver. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: MD Danish Anwar <danishanwar@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-08-02net: ti: icssg-prueth: Add Standard network staticsticsMD Danish Anwar
Implement .ndo_get_stats64 to dump standard network interface statistics for ICSSG ethernet driver. Signed-off-by: MD Danish Anwar <danishanwar@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-08-02net: ti: icssg-prueth: Add ICSSG StatsMD Danish Anwar
Add icssg_stats.c to help dump, icssg related driver statistics. ICSSG has hardware registers for providing statistics like total rx bytes, total tx bytes, etc. These registers are of 32 bits and hence in case of 1G link, they overflows in around 32 seconds. The behaviour of these registers is such that they don't roll back to 0 after overflow but rather stay at UINT_MAX. These registers support a feature where the value written to them is subtracted from the register. This feature can be utilized to fix the overflowing of stats. This solution uses a Workqueues based solution where a function gets called before the registers overflow (every 25 seconds in 1G link, 25000 seconds in 100M link), this function saves the register values in local variables and writes the last read value to the register. So any update during the read will be taken care of. Signed-off-by: MD Danish Anwar <danishanwar@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-08-02net: ti: icssg-prueth: Add ICSSG ethernet driverRoger Quadros
This is the Ethernet driver for TI AM654 Silicon rev. 2 with the ICSSG PRU Sub-system running dual-EMAC firmware. The Programmable Real-time Unit and Industrial Communication Subsystem Gigabit (PRU_ICSSG) is a low-latency microcontroller subsystem in the TI SoCs. This subsystem is provided for the use cases like implementation of custom peripheral interfaces, offloading of tasks from the other processor cores of the SoC, etc. Every ICSSG core has two Programmable Real-Time Unit(PRUs), two auxiliary Real-Time Transfer Unit (RT_PRUs), and two Transmit Real-Time Transfer Units (TX_PRUs). Each one of these runs its own firmware. Every ICSSG core has two MII ports connect to these PRUs and also a MDIO port. The cores can run different firmwares to support different protocols and features like switch-dev, timestamping, etc. It uses System DMA to transfer and receive packets and shared memory register emulation between the firmware and driver for control and configuration. This patch adds support for basic EMAC functionality with 1Gbps and 100Mbps link speed. 10M and half duplex mode are not supported currently as they require IEP, the support for which will be added later. Support for switch-dev, timestamp, etc. will be added later by subsequent patch series. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: MD Danish Anwar <danishanwar@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-08-02net: ti: icssg-prueth: Add icssg queues APIs and macrosMD Danish Anwar
Add icssg_queue.c file. This file introduces macros and APIs related to ICSSG queues. These will be used by ICSSG Ethernet driver. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: MD Danish Anwar <danishanwar@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-08-02net: ti: icssg-prueth: Add Firmware config and classification APIs.MD Danish Anwar
Add icssg_config.h / .c and icssg_classifier.c files. These are firmware configuration and classification related files. These will be used by ICSSG ethernet driver. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: MD Danish Anwar <danishanwar@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-08-02net: ti: icssg-prueth: Add mii helper apis and macrosMD Danish Anwar
Add MII helper APIs and MACROs. These APIs and MACROs will be later used by ICSSG Ethernet driver. Also introduce icssg_prueth.h which has definition of prueth related structures. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: MD Danish Anwar <danishanwar@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-08-02net: ti: icssg-prueth: Add Firmware Interface for ICSSG Ethernet driver.MD Danish Anwar
Add firmware interface related headers and macros for ICSSG Ethernet driver. These macros will be later used by the ICSSG ethernet driver. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: MD Danish Anwar <danishanwar@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-08-02net: dsa: mv88e6xxx: Add erratum 3.14 for 88E6390X and 88E6190XAnte Knezic
Fixes XAUI/RXAUI lane alignment errors. Issue causes dropped packets when trying to communicate over fiber via SERDES lanes of port 9 and 10. Errata document applies only to 88E6190X and 88E6390X devices. Requires poking in undocumented registers. Signed-off-by: Ante Knezic <ante.knezic@helmholz.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-08-02octeontx2-pf: TC flower offload support for SPI fieldRatheesh Kannoth
Driver support to offload TC flower rules which matches against SPI field of IPSEC packets (AH/ESP). Signed-off-by: Ratheesh Kannoth <rkannoth@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-08-02net: stmmac: dwmac-oxnas: remove obsolete dwmac glue driverNeil Armstrong
Due to lack of maintenance and stall of development for a few years now, and since no new features will ever be added upstream, remove support for OX810 and OX820 ethernet. Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Daniel Golle <daniel@makrotopia.org> Acked-by: Andy Shevchenko <andy@kernel.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-08-02net: stmmac: XGMAC support for mdio C22 addr > 3Rohan G Thomas
For XGMAC versions < 2.2 number of supported mdio C22 addresses is restricted to 3. From XGMAC version 2.2 there are no restrictions on the C22 addresses, it supports all valid mdio addresses(0 to 31). Signed-off-by: Rohan G Thomas <rohan.g.thomas@intel.com> Acked-by: Jose Abreu <Jose.Abreu@synopsys.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-08-01net: phy: nxp-c45-tja11xx: reset PCS if the link goes downRadu Pirea (NXP OSS)
During PTP testing on early TJA1120 engineering samples I observed that if the link is lost and recovered, the tx timestamps will be randomly lost. To avoid this HW issue, the PCS should be reset. Resetting the PCS will break the link and we should reset the PCS on LINK UP -> LINK DOWN transition, otherwise we will trigger and infinite loop of LINK UP -> LINK DOWN events. Signed-off-by: Radu Pirea (NXP OSS) <radu-nicolae.pirea@oss.nxp.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20230731091619.77961-12-radu-nicolae.pirea@oss.nxp.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-08-01net: phy: nxp-c45-tja11xx: read ext trig ts on TJA1120Radu Pirea (NXP OSS)
On TJA1120, the external trigger timestamp now has a VALID bit. This changes the logic and we can't use the TJA1103 procedure. For TJA1103, we can always read a valid timestamp from the registers, compare the new timestamp with the old timestamp and, if they are not the same, an event occurred. This logic cannot be applied for TJA1120 because the timestamp is 0 if the VALID bit is not set. Signed-off-by: Radu Pirea (NXP OSS) <radu-nicolae.pirea@oss.nxp.com> Link: https://lore.kernel.org/r/20230731091619.77961-11-radu-nicolae.pirea@oss.nxp.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-08-01net: phy: nxp-c45-tja11xx: run cable test with the PHY in test modeRadu Pirea (NXP OSS)
For TJA1120, the enable bit for cable test is not writable if the PHY is not in test mode. Signed-off-by: Radu Pirea (NXP OSS) <radu-nicolae.pirea@oss.nxp.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20230731091619.77961-10-radu-nicolae.pirea@oss.nxp.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-08-01net: phy: nxp-c45-tja11xx: handle FUSA irqRadu Pirea (NXP OSS)
TJA1120 and TJA1103 have a set of functional safety hardware tests executed after every reset, and when the tests are done, the IRQ line is asserted. For the moment, the purpose of these handlers is to acknowledge the IRQ and not to check the FUSA tests status. Signed-off-by: Radu Pirea (NXP OSS) <radu-nicolae.pirea@oss.nxp.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20230731091619.77961-9-radu-nicolae.pirea@oss.nxp.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-08-01net: phy: nxp-c45-tja11xx: read egress ts on TJA1120Radu Pirea (NXP OSS)
The egress timestamp FIFO/circular buffer work different on TJA1120 than TJA1103. For TJA1103 the new timestamp should be manually moved from the FIFO to the hardware buffer before checking if the timestamp is valid. For TJA1120 the hardware will move automatically the new timestamp from the FIFO to the buffer and the user should check the valid bit, read the timestamp and unlock the buffer by writing any of the buffer registers(which are read only). Another change for the TJA1120 is the behaviour of the EGR TS IRQ bit. This bit was a self-clear bit for TJA1103, but now should be cleared before reading the timestamp. Signed-off-by: Radu Pirea (NXP OSS) <radu-nicolae.pirea@oss.nxp.com> Link: https://lore.kernel.org/r/20230731091619.77961-8-radu-nicolae.pirea@oss.nxp.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-08-01net: phy: nxp-c45-tja11xx: enable LTC sampling on both ext_ts edgesRadu Pirea (NXP OSS)
The external trigger configuration for TJA1120 has changed. The PHY supports sampling of the LTC on rising and on falling edge. Signed-off-by: Radu Pirea (NXP OSS) <radu-nicolae.pirea@oss.nxp.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20230731091619.77961-7-radu-nicolae.pirea@oss.nxp.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-08-01net: phy: nxp-c45-tja11xx: add TJA1120 supportRadu Pirea (NXP OSS)
Add TJA1120 driver entry and its driver_data. Signed-off-by: Radu Pirea (NXP OSS) <radu-nicolae.pirea@oss.nxp.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20230731091619.77961-6-radu-nicolae.pirea@oss.nxp.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-08-01net: phy: nxp-c45-tja11xx: use get_featuresRadu Pirea (NXP OSS)
PHY_BASIC_T1_FEATURES are not the right features supported by TJA1103 anymore. For example ethtool reports: [root@alarm ~]# ethtool end0 Settings for end0: Supported ports: [ TP ] Supported link modes: 100baseT1/Full 10baseT1L/Full 10baseT1L/Full is not supported by TJA1103 and supported ports list is not completed. The PHY also have a MII port. genphy_c45_pma_read_abilities implementation can detect the PHY features and they look like this. [root@alarm ~]# ethtool end0 Settings for end0: Supported ports: [ TP MII ] Supported link modes: 100baseT1/Full Supported pause frame use: Symmetric Supports auto-negotiation: No Supported FEC modes: Not reported Advertised link modes: 100baseT1/Full Advertised pause frame use: Symmetric Advertised auto-negotiation: No Advertised FEC modes: Not reported Speed: 100Mb/s Duplex: Full Auto-negotiation: off master-slave cfg: forced master master-slave status: master Port: Twisted Pair PHYAD: 1 Transceiver: external MDI-X: Unknown Supports Wake-on: g Wake-on: d Link detected: yes SQI: 7/7 Signed-off-by: Radu Pirea (NXP OSS) <radu-nicolae.pirea@oss.nxp.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20230731091619.77961-5-radu-nicolae.pirea@oss.nxp.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-08-01net: phy: nxp-c45-tja11xx: prepare the ground for TJA1120Radu Pirea (NXP OSS)
Between TJA1120 and TJA1103 the hardware was improved, but some register addresses were changed and some bit fields were moved from one register to another. Introduce the nxp_c45_reg_field structure and its associated functions to abstract the differences between the PHYs. Remove the defined bits and register addresses that are not common between TJA1103 and TJA1120 and replace them with reg_fields and register addresses from phydev->drv->driver_data. Signed-off-by: Radu Pirea (NXP OSS) <radu-nicolae.pirea@oss.nxp.com> Link: https://lore.kernel.org/r/20230731091619.77961-4-radu-nicolae.pirea@oss.nxp.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-08-01net: phy: nxp-c45-tja11xx: remove RX BIST frame countersRadu Pirea (NXP OSS)
Remove RX BIST frame counters from the PHY statistics. In production mode, these counters are always read as 0. Signed-off-by: Radu Pirea (NXP OSS) <radu-nicolae.pirea@oss.nxp.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20230731091619.77961-3-radu-nicolae.pirea@oss.nxp.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-08-01net: phy: nxp-c45-tja11xx: use phylib master/slave implementationRadu Pirea (NXP OSS)
Remove the custom implementation of master/save setup and read status and use genphy_c45_config_aneg and genphy_c45_read_status since phylib has support for master/slave setup and master/slave status. Signed-off-by: Radu Pirea (NXP OSS) <radu-nicolae.pirea@oss.nxp.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20230731091619.77961-2-radu-nicolae.pirea@oss.nxp.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-08-01virtio_net: enable per queue interrupt coalesce featureGavin Li
Enable per queue interrupt coalesce feature bit in driver and validate its dependency with control queue. Signed-off-by: Gavin Li <gavinl@nvidia.com> Reviewed-by: Dragos Tatulea <dtatulea@nvidia.com> Reviewed-by: Jiri Pirko <jiri@nvidia.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Heng Qi <hengqi@linux.alibaba.com> Acked-by: Jason Wang <jasowang@redhat.com> Link: https://lore.kernel.org/r/20230731070656.96411-4-gavinl@nvidia.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-08-01virtio_net: support per queue interrupt coalesce commandGavin Li
Add interrupt_coalesce config in send_queue and receive_queue to cache user config. Send per virtqueue interrupt moderation config to underlying device in order to have more efficient interrupt moderation and cpu utilization of guest VM. Additionally, address all the VQs when updating the global configuration, as now the individual VQs configuration can diverge from the global configuration. Signed-off-by: Gavin Li <gavinl@nvidia.com> Reviewed-by: Dragos Tatulea <dtatulea@nvidia.com> Reviewed-by: Jiri Pirko <jiri@nvidia.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Heng Qi <hengqi@linux.alibaba.com> Acked-by: Jason Wang <jasowang@redhat.com> Link: https://lore.kernel.org/r/20230731070656.96411-3-gavinl@nvidia.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-08-01virtio_net: extract interrupt coalescing settings to a structureGavin Li
Extract interrupt coalescing settings to a structure so that it could be reused in other data structures. Signed-off-by: Gavin Li <gavinl@nvidia.com> Reviewed-by: Dragos Tatulea <dtatulea@nvidia.com> Reviewed-by: Jiri Pirko <jiri@nvidia.com> Acked-by: Jason Wang <jasowang@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Heng Qi <hengqi@linux.alibaba.com> Link: https://lore.kernel.org/r/20230731070656.96411-2-gavinl@nvidia.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-08-01net/macmace: Replace zero-length array with DECLARE_FLEX_ARRAY() helperAtul Raut
Since zero-length arrays are deprecated, we are replacing them with C99 flexible-array members. As a result, instead of declaring a zero-length array, use the new DECLARE_FLEX_ARRAY() helper macro. This fixes warnings such as: ./drivers/net/ethernet/apple/macmace.c:80:4-8: WARNING use flexible-array member instead (https://www.kernel.org/doc/html/latest/process/deprecated.html#zero-length-and-one-element-arrays) Signed-off-by: Atul Raut <rauji.raut@gmail.com> Link: https://lore.kernel.org/r/20230730231442.15003-1-rauji.raut@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-08-01net: dsa: qca8k: use dsa_for_each macro instead of for loopChristian Marangi
Convert for loop to dsa_for_each macro to save some redundant write on unconnected/unused port and tidy things up. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Link: https://lore.kernel.org/r/20230730074113.21889-5-ansuelsmth@gmail.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
generated by cgit (git 2.34.1) at 2024-06-26 10:09:05 +0000