summaryrefslogtreecommitdiff
path: root/drivers
AgeCommit message (Collapse)Author
2021-11-22drm/amd/display: Revert "retain/release stream pointer in link enc table"Sung Joon Kim
[why] Change causing issue. Need to revert the change. Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Sung Joon Kim <sungkim@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-22drm/amd/display: 3.2.162Aric Cyr
This version brings along following fixes: - Fix issue that secondary display goes blank on Non DCN31. - Adjust flushing data in DMCUB - Revert patches which cause regression in hadnling MPO/Link encoder assignment - Correct the setting within MSA of DP2.0 - Adjustment for DML isolation - Fix FIFO erro in fast boot sequence - Enable DSC over eDP - Adjust the DSC power off sequence Reviewed-by: Aric Cyr <aric.cyr@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Aric Cyr <aric.cyr@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-22drm/amd/display: fixed the DSC power off sequence during Driver PnPYi-Ling Chen
[WHY] After unloading driver, driver would not disable DSC function. At next loading driver, driver would power all DSC engines off. When driver powered the active DSC off, the screen would be gray until reprograming DSC relatived register correcntly. [HOW] 1. Remove DSC Power down code into init_pipes() 2. Depend on the OTG mapping information and DSC status to skip power off for the working DSC. Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Yi-Ling Chen <Yi-Ling.Chen2@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-22drm/amd/display: [FW Promotion] Release 0.0.93Anthony Koo
- Fix ARR39-C issue with scaled integer addition in rb func Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-22drm/amd/display: [FW Promotion] Release 0.0.92Anthony Koo
Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-22drm/amd/display: Visual Confirm Bar Height Adjusthvanzyll
[What] This change allows adjustment to the Visual Confirm height border. [Why] Aids debugging and testing [How] Use the existing infrastructure to implement logic to draw borders Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Harry VanZyllDeJong <hvanzyll@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-22drm/amd/display: Fix eDP will flash when boot to OSBrandon Syu
[WHY] With eDP DSC enabled and set 4K 60Hz, there would be screen corruption when booting to OS or enabling the driver. [HOW] Avoid powering down VDD when we cannot apply eDP fast boot. Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Brandon Syu <Brandon.Syu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-22drm/amd/display: Enable DSC over eDPMikita Lipski
[why] - Adding a DM interface to enable DSC over eDP on Linux - DSC over eDP will allow to power savings by reducing the bandwidth required to support panel's modes - Apply link optimization algorithm to reduce link bandwidth when DSC is enabled [how] - Read eDP panel's DSC capabilities - Apply DSC policy on eDP panel based on its DSC capabilities - Enable DSC encoder's on the pipe - Enable DSC on panel's side by setting DSC_ENABLE DPCD register - Adding link optimization algorithm to reduce link rate or lane count based Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-22drm/amd/display: Fix LTTPR not EnabledAngus Wang
[WHY] Previous LTTPR change has caused a regression that led to an issue where LTTPR is disabled [HOW] Extended changes from previous fix to DCN30X Reviewed-by: Wesley Chalmers <wesley.chalmers@amd.com> Reviewed-by: Martin Leung <Martin.Leung@amd.com> Reviewed-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Angus Wang <angus.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-22drm/amd/display: Reset fifo after enable otgXu, Jinze
[Why] In fast boot sequence, when change dispclk, otg is disabled but digfe is enabled. This may cause dig fifo error. [How] Reset dig fifo after enable otg. Reviewed-by: Jun Lei <Jun.Lei@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: JinZe.Xu <JinZe.Xu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-22drm/amd/display: Code change for DML isolationJun Lei
[why] DML itself is SW only, putting the logic as part of resource makes it hw dependent and thus impossible to compile separately from dc. Separate compilation is critical for unit testing as well as bbox tool development [how] create new dml wrapper. Copy logic from the validation functions into dml wrapper as base implementation. Dml wrapper has internal/static implementations for all helpers, and does not reference other functions. It may reference dc structures/types for convenience. This change now has all the changes for DML isolation squashed into one. Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Jun Lei <jun.lei@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-22drm/amd/display: set MSA vsp/hsp to 0 for positive polarity for DP 128b/132bWenjing Liu
[why] There is a bug in MSA programming sequence that mistakenly set MSA vsp/hsp to 1 for positive polarity. This is incorrect. Reviewed-by: Ariel Bernstein <Eric.Bernstein@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-22drm/amd/display: Revert changes for MPO underflowAngus Wang
[WHY] The previous changes for fixing MPO underflow with multiple display connected caused a regression where the machine runs into a hang when doing multiple driver pnp with multiple displays connected [HOW] Reverted offending change Reviewed-by: Martin Leung <Martin.Leung@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Angus Wang <angus.wang@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-22drm/amd/display: Only flush delta from last command executionNicholas Kazlauskas
[Why] We're currently flushing commands that had been previously been flushed or are currently being processed by the DMCUB when we don't immediately wait for idle after command execution. [How] Avoiding reflushing the data by keeping track of the last wptr. We'll treat this as the actual rptr by creating a copy of the inbox and modifying the copy's rptr. Reviewed-by: Eric Yang <Eric.Yang2@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-22drm/amd/display: Secondary display goes blank on Non DCN31Ahmad Othman
[Why] Due to integration issues with branch merging, a regression happened that prevented secondary displays from lighting up or enabling certain features [How] Separated the new logic to be for DCN31 only and retained pre DCN31 logic for all other ASICs Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Ahmad Othman <Ahmad.Othman@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-22drm/amdgpu: Pin MMIO/DOORBELL BO's in GTT domainRamesh Errabolu
MMIO/DOORBELL BOs encode control data and should be pinned in GTT domain before enabling PCIe connected peer devices in accessing it Signed-off-by: Ramesh Errabolu <Ramesh.Errabolu@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-22drm/amdgpu: Update BO memory accounting to rely on allocation flagRamesh Errabolu
Accounting system to track amount of available memory (system, TTM and VRAM of a device) relies on BO's domain. The change is to rely instead on allocation flag indicating BO type - VRAM, GTT, USERPTR, MMIO or DOORBELL Signed-off-by: Ramesh Errabolu <Ramesh.Errabolu@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-22drm/amd/display: Reduce dmesg error to a debug printLeo (Hanghong) Ma
[Why & How] Dmesg errors are found on dcn3.1 during reset test, but it's not a really failure. So reduce it to a debug print. Signed-off-by: Leo (Hanghong) Ma <hanghong.ma@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-22drm/amd/display: Drop config guard for DC_LOG_DP2Leo (Hanghong) Ma
[Why & How] It doesn't make sense to guard DC_LOG_DP2 by CONFIG_DRM_AMD_DCN, and this also caused build failure for allmodconfig; So drop the guard to fix the compile failure; Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Leo (Hanghong) Ma <hanghong.ma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-17drm/amd/pm: add GFXCLK/SCLK clocks level print support for APUsPerry Yuan
add support that allow the userspace tool like RGP to get the GFX clock value at runtime, the fix follow the old way to show the min/current/max clocks level for compatible consideration. === Test === $ cat /sys/class/drm/card0/device/pp_dpm_sclk 0: 200Mhz * 1: 1100Mhz 2: 1600Mhz then run stress test on one APU system. $ cat /sys/class/drm/card0/device/pp_dpm_sclk 0: 200Mhz 1: 1040Mhz * 2: 1600Mhz The current GFXCLK value is updated at runtime. BugLink: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5260 Reviewed-by: Huang Ray <Ray.Huang@amd.com> Signed-off-by: Perry Yuan <Perry.Yuan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-17drm/amdkfd: replace asic_family with asic_typeGraham Sider
asic_family was a duplicate of asic_type, both of type amd_asic_type. Replace all instances of device_info->asic_family with adev->asic_type and remove asic_family from device_info. Signed-off-by: Graham Sider <Graham.Sider@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-17drm/amdkfd: convert misc checks to IP version checkingGraham Sider
Switch to IP version checking instead of asic_type on various KFD version checks. Signed-off-by: Graham Sider <Graham.Sider@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-17drm/amdkfd: convert switches to IP version checkingGraham Sider
Converts KFD switch statements to use IP version checking instead of asic_type. Signed-off-by: Graham Sider <Graham.Sider@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-17drm/amdkfd: convert KFD_IS_SOC to IP version checkingGraham Sider
Defined as GC HWIP >= IP_VERSION(9, 0, 1). Also defines KFD_GC_VERSION to return GC HWIP version. Signed-off-by: Graham Sider <Graham.Sider@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-17drm/amdgpu: add error print when failing to add IP block(v2)Guchun Chen
Driver initialization is driven by IP version from IP discovery table. So add error print when failing to add ip block during driver initialization, this will be more friendly to user to know which IP version is not correct. [ 40.467361] [drm] host supports REQ_INIT_DATA handshake [ 40.474076] [drm] add ip block number 0 <nv_common> [ 40.474090] [drm] add ip block number 1 <gmc_v10_0> [ 40.474101] [drm] add ip block number 2 <psp> [ 40.474103] [drm] add ip block number 3 <navi10_ih> [ 40.474114] [drm] add ip block number 4 <smu> [ 40.474119] [drm] add ip block number 5 <amdgpu_vkms> [ 40.474134] [drm] add ip block number 6 <gfx_v10_0> [ 40.474143] [drm] add ip block number 7 <sdma_v5_2> [ 40.474147] amdgpu 0000:00:08.0: amdgpu: Fatal error during GPU init [ 40.474545] amdgpu 0000:00:08.0: amdgpu: amdgpu: finishing device. v2: use dev_err to multi-GPU system Signed-off-by: Guchun Chen <guchun.chen@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-17drm/amd/pm: Enhanced reporting also for a stuck commandLuben Tuikov
Also print the message index and parameter of the stuck command. Cc: Alex Deucher <Alexander.Deucher@amd.com> Signed-off-by: Luben Tuikov <luben.tuikov@amd.com> Acked-by: Alex Deucher <Alexander.Deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-17drm/amdgpu: remove unneeded variableran jianping
Fix the following coccicheck review: ./drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c:1174:14-18 :Unneeded variable Remove unneeded variable used to store return value. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: ran jianping <ran.jianping@zte.com.cn> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-17drm/radeon: correct indentationXu Wang
Correct indentation in radeon_driver_load_kms. Signed-off-by: Xu Wang <vulab@iscas.ac.cn> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-17drm/amdkfd: replace trivial funcs with direct accessGraham Sider
These get funcs simply return an adev field. Replace funcs/calls with direct field accesses instead. Signed-off-by: Graham Sider <Graham.Sider@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-17drm/amd/display: log amdgpu_dm_atomic_check() failure causeShirish S
update developers with next level of info about unsupported display configuration query that led to atomic check failure. Signed-off-by: Shirish S <shirish.s@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-17drm/amd/display: Wait for ACK for INBOX0 HW LockAlvin Lee
[Why] In DC we want to wait for the INBOX0 HW Lock command to ACK before continuing. This is to ensure that the lock has been successfully acquired before programming HW in DC. [How] Add interfaces to send messages on INBOX0, poll for their completation and clear the ack. Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Anson Jacob <Anson.Jacob@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-17drm/amd/display: Initialise encoder assignment when initialising dc_stateJimmy Kizito
[Why] Link encoder assignment tracking variables need to be (re)initialised whenever dc_state is (re)initialised. Otherwise variables used for dynamic encoder assignment (especially the link encoder availability pool) are out of sync with dc_state and future encoder assignments are invalid. [How] Initialise encoder assignment variables when creating new dc_state resource. Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Anson Jacob <Anson.Jacob@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Jimmy Kizito <Jimmy.Kizito@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-17drm/amd/display: Query all entries in assignment table during updates.Jimmy Kizito
[Why] Stream ordering and count can vary from one state to the next. Only checking a subset of entries in the encoder assignment table can lead to invalid encoder assignments. [How] Check all entries in encoder assignment table when querying it. Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Anson Jacob <Anson.Jacob@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Jimmy Kizito <Jimmy.Kizito@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-17drm/amd/display: To support sending TPS3 pattern when restoring linkRobin Chen
[Why] Some panels require to use TPS3 pattern to wake up link in PSR mode. [How] To add TPS3 selection information in PSR settings command and pass to DMUB FW. Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Anson Jacob <Anson.Jacob@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Robin Chen <po-tchen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-17drm/amd/display: 3.2.161Aric Cyr
This version brings along following fixes: - Improvements to INBOX0 HW Lock - Add support for sending TPS3 pattern - Fix Coverity Issues - Fixes for DMUB - Fix RGB MPO underflow with multiple displays - WS fixes and code restructure Acked-by: Anson Jacob <Anson.Jacob@amd.com> Signed-off-by: Aric Cyr <aric.cyr@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-17drm/amd/display: Adjust code indentationCharlene Liu
Reviewed-by: Sung joon Kim <Sungjoon.Kim@amd.com> Acked-by: Anson Jacob <Anson.Jacob@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Charlene Liu <Charlene.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-17drm/amd/display: Add hpd pending flag to indicate detection of new hpdMeenakshikumar Somasundaram
[Why] For dpia link, link->hpd_status indicates current state, but driver fails to capture hpd transitions in certain scenarios such as during link training. [How] Added link->hpd_pending flag that captures arrival of new hpd. Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Anson Jacob <Anson.Jacob@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Meenakshikumar Somasundaram <meenakshikumar.somasundaram@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-17drm/amd/display: Fix Coverity IssuesChris Park
[Why] Coverity discovers holes in logic that needs to be addressed for improved code integrity. [How] Address issues found by coverity without changing the actual logic. Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Anson Jacob <Anson.Jacob@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Chris Park <Chris.Park@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-17drm/amd/display: retain/release stream pointer in link enc tableSung Joon Kim
[why] At every reference to stream pointer, we need to increment/decrement the kref_count. Not doing so will result in invalid stream pointer still alive after hibernate cycle. [how] Call stream retain/release whenever the link encoder assignment is set to true/false since it indicates if we want to reference the stream pointer or not. Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Anson Jacob <Anson.Jacob@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Sung Joon Kim <sungkim@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-17drm/amd/display: fix stale info in link encoder assignmentRoy Chan
[Why] The link encoder assignment leaves the old stream data when it was unassigned. When the clear encoder assignment is called, it based on the old stale data to access the de-allocated stream. [How] There should be no need to explicitly clean up the link encoder assignment if the unassign loop does the work properly, the loop should base on the current state to clean up the assignment. Also, the unassignment should better clean up the values in the assignement slots as well. Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Anson Jacob <Anson.Jacob@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Roy Chan <roy.chan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-17drm/amd/display: use link_rate_set above DPCD 1.3 (#1527)Huang, ChiaWen
[Why & How] According to eDP spec, DPCD 1.3 is only for eDP DPCD v1.4 In dpcd_set_link_settings function, the driver is just above v1.3 Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com> Acked-by: Anson Jacob <Anson.Jacob@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: ChiawenHuang <chiawen.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-17drm/amd/display: clean up some formats and logCharlene Liu
[why] reduce az indirect register dump. need add az clock_gating control field used in some project. [how] conditional output indrect register in the log. add clock_gating feild Reviewed-by: Sung joon Kim <Sungjoon.Kim@amd.com> Acked-by: Anson Jacob <Anson.Jacob@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Charlene Liu <Charlene.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-17drm/amd/display: bring dcn31 clk mgr in line with other version styleDmytro Laktyushkin
Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Anson Jacob <Anson.Jacob@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-17drm/amd/display: Fix detection of aligned DMUB firmware meta infoNicholas Kazlauskas
[Why] A built firmware binary may be aligned to 16-bytes with padding at the end as necessary. In the case that padding was applied the meta info will not be detected correctly and we won't be able to allocate the appropriate firmware and tracebuffer sizes. [How] To maintain compatibility with already released firmware where this occurs we need to try every meta offset from 0..15 inclusive. Extract out the meta info checker into a helper function that's called for each of these offsets and exit early when we've found it. Reviewed-by: Eric Yang <Eric.Yang2@amd.com> Acked-by: Anson Jacob <Anson.Jacob@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-17drm/amd/display: Use link_enc_cfg API for queries.Jimmy Kizito
[Why] The link_enc_cfg API operates in one of two modes depending on the stage of application of dc_state to hardware. The API is the safest way to query link encoder assignments. [How] Use results of link encoder assignment query using link_enc_cfg API. Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Anson Jacob <Anson.Jacob@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Jimmy Kizito <Jimmy.Kizito@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-17drm/amd/display: Fix RGB MPO underflow with multiple displaysAngus Wang
[WHY] With RGB MPO enabled, playing a video with multiple displays connected results in underflow when closing the video window [HOW] Reverted the old change to fix this problem, which prevented pipe splits for multiple display configurations and caused high MCLK speeds during idle. Added a two step call to dc_update_planes_and_stream, first time with pipe split disabled and the second time with pipe split enabled, which fixed the underflow issue Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Anson Jacob <Anson.Jacob@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Angus Wang <angus.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-17drm/amd/display: remove dmcub_support cap dependencyCharlene Liu
[why] matching the dmcub_support with all other dcn version. Reviewed-by: Sung joon Kim <Sungjoon.Kim@amd.com> Reviewed-by: Martin Leung <Martin.Leung@amd.com> Acked-by: Anson Jacob <Anson.Jacob@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Charlene Liu <Charlene.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-17drm/amd/display: Pass panel inst to a PSR commandMikita Lipski
[why] PSR set power command wasn't setting panel instance and command version which caused both streams to overwrite the same PSR state. [how] Pass panel instance to the set power command function and to DMUB and set command version enum Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Anson Jacob <Anson.Jacob@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-17drm/amd/display: Add helper for blanking all dp displaysLeo (Hanghong) Ma
[Why & How] 1. The code to blank all dp display have been called many times, so add helpers in dc_link to make it more concise. 2. Add some check to fix the dmesg errors at boot and resume from S3 on dcn3.1 during DQE's promotion test. Reviewed-by: Alvin Lee <alvin.lee2@amd.com> Reviewed-by: Wesley Chalmers <Wesley.Chalmers@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Anson Jacob <Anson.Jacob@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Leo (Hanghong) Ma <hanghong.ma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-17drm/amd/display: remove unnecessary conditional operatorsYe Guojin
Since the variables named is_end_of_payload and hpd_status are already bool type, the ?: conditional operator is unnecessary any more. Clean them up here. Reported-by: Zeal Robot <zealci@zte.com.cn> Reviewed-by: Simon Ser <contact@emersion.fr> Signed-off-by: Ye Guojin <ye.guojin@zte.com.cn> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit (git 2.34.1) at 2025-06-10 19:13:17 +0000