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2023-04-25Merge tag 'soc-dt-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds
Pull ARM SoC devicetree updates from Arnd Bergmann: "The devicetree changes overall are again dominated by the Qualcomm Snapdragon platform that weighs in at over 300 changesets, but there are many updates across other platforms as well, notably Mediatek, NXP, Rockchips, Renesas, TI, Samsung and ST Microelectronics. These all add new features for existing machines, as well as new machines and SoCs. The newly added SoCs are: - Allwinner T113-s, an Cortex-A7 based variant of the RISC-V based D1 chip. - StarFive JH7110, a RISC-V SoC based on the Sifive U74 core like its JH7100 predecessor, but with additional CPU cores and a GPU. - Apple M2 as used in current Macbook Air/Pro and Mac Mini gets added, with comparable support as its M1 predecessor. - Unisoc UMS512 (Tiger T610) is a midrange smartphone SoC - Qualcomm IPQ5332 and IPQ9574 are Wi-Fi 7 networking SoCs, based on the Cortex-A53 and Cortex-A73 cores, respectively. - Qualcomm sa8775p is an automotive SoC derived from the Snapdragon family. Including the initial board support for the added SoC platforms, there are 52 new machines. The largest group are 19 boards industrial embedded boards based on the NXP i.MX6 (32-bit) and i.MX8 (64-bit) families. Others include: - Two boards based on the Allwinner f1c200s ultra-low-cost chip - Three 'Banana Pi' variants based on the Amlogic g12b (A311D, S922X) SoC. - The Gl.Inet mv1000 router based on Marvell Armada 3720 - A Wifi/LTE Dongle based on Qualcomm msm8916 - Two robotics boards based on Qualcomm QRB chips - Three Snapdragon based phones made by Xiaomi - Five developments boards based on various Rockchip SoCs, including the rk3588s-khadas-edge2 and a few NanoPi models - The AM625 Beagleplay industrial SBC Another 14 machines get removed: both boards for the obsolete 'oxnas' platform, three boards for the Renesas r8a77950 SoC that were only for pre-production chips, and various chromebook models based on the Qualcomm Sc7180 'trogdor' design that were never part of products" * tag 'soc-dt-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (836 commits) arm64: dts: rockchip: Add support for volume keys to rk3399-pinephone-pro arm64: dts: rockchip: Add vdd_cpu_big regulators to rk3588-rock-5b arm64: dts: rockchip: Use generic name for es8316 on Pinebook Pro and Rock 5B arm64: dts: rockchip: Drop RTC clock-frequency on rk3588-rock-5b arm64: dts: apple: t8112: Add PWM controller arm64: dts: apple: t600x: Add PWM controller arm64: dts: apple: t8103: Add PWM controller arm64: dts: rockchip: Add pinctrl gpio-ranges for rk356x ARM: dts: nomadik: Replace deprecated spi-gpio properties ARM: dts: aspeed-g6: Add UDMA node ARM: dts: aspeed: greatlakes: add mctp device ARM: dts: aspeed: greatlakes: Add gpio names ARM: dts: aspeed: p10bmc: Change power supply info arm64: dts: mediatek: mt6795-xperia-m5: Add Bosch BMM050 Magnetometer arm64: dts: mediatek: mt6795-xperia-m5: Add Bosch BMA255 Accelerometer arm64: dts: mediatek: mt6795: Add tertiary PWM node arm64: dts: rockchip: add panel to Anbernic RG353 series dt-bindings: arm: Add Data Modul i.MX8M Plus eDM SBC dt-bindings: arm: fsl: Add chargebyte Tarragon dt-bindings: vendor-prefixes: add chargebyte ...
2023-04-25Merge branch 'clk-imx' into clk-nextStephen Boyd
* clk-imx: (25 commits) clk: imx: imx8ulp: update clk flag for system critical clock clk: imx: imx8ulp: Add tpm5 clock as critical gate clock clk: imx: imx8ulp: keep MU0_B clock enabled always clk: imx: imx8ulp: Add divider closest support to get more accurate clock rate clk: imx: imx8ulp: Fix XBAR_DIVBUS and AD_SLOW clock parents clk: imx: imx93: Add nic and A55 clk dt-bindings: clock: imx93: add NIC, A55 and ARM PLL CLK clk: imx: imx93: add mcore_booted module paratemter clk: imx: fracn-gppll: Add 300MHz freq support for imx9 clk: imx: fracn-gppll: support integer pll clk: imx: fracn-gppll: disable hardware select control clk: imx: fracn-gppll: fix the rate table clk: imx: imx8mp: change the 'nand_usdhc_bus' clock to non-critical clk: imx: imx8mp: Add LDB root clock dt-bindings: clock: imx8mp: Add LDB clock entry clk: imx: imx8mp: correct DISP2 pixel clock type clk: imx: drop duplicated macro clk: imx: clk-gpr-mux: Provide clock name in error message clk: imx: Let IMX8MN_CLK_DISP_PIXEL set parent rate clk: imx8mm: Let IMX8MM_CLK_LCDIF_PIXEL set parent rate ...
2023-04-25Merge branches 'clk-of', 'clk-samsung', 'clk-rockchip' and 'clk-qcom' into ↵Stephen Boyd
clk-next * clk-of: clk: add missing of_node_put() in "assigned-clocks" property parsing * clk-samsung: clk: samsung: exynos850: Make PMU_ALIVE_PCLK critical clk: samsung: Convert to platform remove callback returning void clk: samsung: exynos5433: Extract PM support to common ARM64 layer clk: samsung: Extract parent clock enabling to common function clk: samsung: Extract clocks registration to common function clk: samsung: exynos850: Add AUD and HSI main gate clocks clk: samsung: exynos850: Implement CMU_G3D domain clk: samsung: clk-pll: Implement pll0818x PLL type clk: samsung: Set dev in samsung_clk_init() clk: samsung: Don't pass reg_base to samsung_clk_register_pll() clk: samsung: Remove np argument from samsung_clk_init() dt-bindings: clock: exynos850: Add AUD and HSI main gate clocks dt-bindings: clock: exynos850: Add Exynos850 CMU_G3D * clk-rockchip: clk: rockchip: rk3588: make gate linked clocks critical clk: rockchip: rk3399: allow clk_cifout to force clk_cifout_src to reparent * clk-qcom: (57 commits) clk: qcom: gcc-sc8280xp: Add EMAC GDSCs clk: qcom: dispcc-qcm2290: Remove inexistent DSI1PHY clk clk: qcom: add the GPUCC driver for sa8775p dt-bindings: clock: qcom: describe the GPUCC clock for SA8775P clk: qcom: gcc-sm8350: fix PCIe PIPE clocks handling clk: qcom: lpassaudiocc-sc7280: Add required gdsc power domain clks in lpass_cc_sc7280_desc clk: qcom: lpasscc-sc7280: Skip qdsp6ss clock registration dt-bindings: clock: qcom,sc7280-lpasscc: Add qcom,adsp-pil-mode property clk: qcom: rpm: Use managed `of_clk_add_hw_provider()` clk: qcom: Add Global Clock Controller driver for IPQ9574 dt-bindings: clock: Add ipq9574 clock and reset definitions clk: qcom: gpucc-sm6375: Configure CX_GDSC disable wait value clk: qcom: gcc-sm6115: Mark RCGs shared where applicable clk: qcom: dispcc-qcm2290: Add MDSS_CORE reset dt-bindings: clock: dispcc-qcm2290: Add MDSS_CORE reset clk: qcom: apss-ipq-pll: add support for IPQ5332 dt-bindings: clock: qcom,a53pll: add IPQ5332 compatible clk: qcom: apss-ipq-pll: refactor the driver to accommodate different PLL types dt-bindings: mailbox: qcom,apcs-kpss-global: fix SDX55 'if' match dt-bindings: mailbox: qcom,apcs-kpss-global: correct SDX55 clocks ...
2023-04-25Merge branches 'clk-starfive', 'clk-fractional' and 'clk-devmof' into clk-nextStephen Boyd
- Shrink size of clk_fractional_divider a little - Convert various clk drivers to devm_of_clk_add_hw_provider() * clk-starfive: clk: starfive: Delete the redundant dev_set_drvdata() in JH7110 clock drivers clk: starfive: Avoid casting iomem pointers MAINTAINERS: generalise StarFive clk/reset entries reset: starfive: Add StarFive JH7110 reset driver clk: starfive: Add StarFive JH7110 always-on clock driver clk: starfive: Add StarFive JH7110 system clock driver reset: starfive: jh71x0: Use 32bit I/O on 32bit registers reset: starfive: Rename "jh7100" to "jh71x0" for the common code reset: starfive: Extract the common JH71X0 reset code reset: starfive: Factor out common JH71X0 reset code reset: Create subdirectory for StarFive drivers reset: starfive: Replace SOC_STARFIVE with ARCH_STARFIVE clk: starfive: Rename "jh7100" to "jh71x0" for the common code clk: starfive: Rename clk-starfive-jh7100.h to clk-starfive-jh71x0.h clk: starfive: Factor out common JH7100 and JH7110 code clk: starfive: Replace SOC_STARFIVE with ARCH_STARFIVE dt-bindings: clock: Add StarFive JH7110 always-on clock and reset generator dt-bindings: clock: Add StarFive JH7110 system clock and reset generator * clk-fractional: clk: Remove mmask and nmask fields in struct clk_fractional_divider clk: rockchip: Remove values for mmask and nmask in struct clk_fractional_divider clk: imx: Remove values for mmask and nmask in struct clk_fractional_divider clk: Compute masks for fractional_divider clk when needed. * clk-devmof: clk: uniphier: Use managed `of_clk_add_hw_provider()` clk: si5351: Use managed `of_clk_add_hw_provider()` clk: si570: Use managed `of_clk_add_hw_provider()` clk: si514: Use managed `of_clk_add_hw_provider()` clk: lmk04832: Use managed `of_clk_add_hw_provider()` clk: hsdk-pll: Use managed `of_clk_add_hw_provider()` clk: cdce706: Use managed `of_clk_add_hw_provider()` clk: axs10x: Use managed `of_clk_add_hw_provider()` clk: axm5516: Use managed `of_clk_add_hw_provider()` clk: axi-clkgen: Use managed `of_clk_add_hw_provider()`
2023-04-25Merge branches 'clk-xilinx', 'clk-broadcom' and 'clk-platform' into clk-nextStephen Boyd
- BCM63268 timer clock and reset controller - Convert platform clk drivers to remove_new * clk-xilinx: clocking-wizard: Support higher frequency accuracy clk: zynqmp: pll: Remove the limit * clk-broadcom: clk: bcm: Add BCM63268 timer clock and reset driver dt-bindings: clock: Add BCM63268 timer binding dt-bindings: reset: add BCM63268 timer reset definitions dt-bindings: clk: add BCM63268 timer clock definitions * clk-platform: (25 commits) clk: xilinx: Convert to platform remove callback returning void clk: x86: Convert to platform remove callback returning void clk: uniphier: Convert to platform remove callback returning void clk: ti: Convert to platform remove callback returning void clk: tegra: Convert to platform remove callback returning void clk: stm32: Convert to platform remove callback returning void clk: mvebu: Convert to platform remove callback returning void clk: mmp: Convert to platform remove callback returning void clk: keystone: Convert to platform remove callback returning void clk: hisilicon: Convert to platform remove callback returning void clk: stm32mp1: Convert to platform remove callback returning void clk: scpi: Convert to platform remove callback returning void clk: s2mps11: Convert to platform remove callback returning void clk: pwm: Convert to platform remove callback returning void clk: palmas: Convert to platform remove callback returning void clk: hsdk-pll: Convert to platform remove callback returning void clk: fixed-rate: Convert to platform remove callback returning void clk: fixed-mmio: Convert to platform remove callback returning void clk: fixed-factor: Convert to platform remove callback returning void clk: axm5516: Convert to platform remove callback returning void ...
2023-04-25Merge branches 'clk-mediatek', 'clk-sunplus', 'clk-loongson' and ↵Stephen Boyd
'clk-socfpga' into clk-next - Frequency Hopping (FHCTL) on MediaTek MT6795, MT8173, MT8192 and MT8195 SoCs - Converted most Mediatek clock drivers to struct platform_driver - MediaTek clock drivers can be built as modules - Mediatek MT8188 SoC clk drivers - Clock driver for Sunplus SP7021 SoC - Reimplement Loongson-1 clk driver with DT support - Clk driver support for Loongson-2 SoCs - Migrate socfpga clk driver to of_clk_add_hw_provider() * clk-mediatek: (84 commits) clk: mediatek: fhctl: Mark local variables static clk: mediatek: Use right match table, include mod_devicetable clk: mediatek: Add MT8188 adsp clock support clk: mediatek: Add MT8188 imp i2c wrapper clock support clk: mediatek: Add MT8188 wpesys clock support clk: mediatek: Add MT8188 vppsys1 clock support clk: mediatek: Add MT8188 vppsys0 clock support clk: mediatek: Add MT8188 vencsys clock support clk: mediatek: Add MT8188 vdosys1 clock support clk: mediatek: Add MT8188 vdosys0 clock support clk: mediatek: Add MT8188 vdecsys clock support clk: mediatek: Add MT8188 mfgcfg clock support clk: mediatek: Add MT8188 ipesys clock support clk: mediatek: Add MT8188 imgsys clock support clk: mediatek: Add MT8188 ccusys clock support clk: mediatek: Add MT8188 camsys clock support clk: mediatek: Add MT8188 infrastructure clock support clk: mediatek: Add MT8188 peripheral clock support clk: mediatek: Add MT8188 topckgen clock support clk: mediatek: Add MT8188 apmixedsys clock support ... * clk-sunplus: clk: Add Sunplus SP7021 clock driver * clk-loongson: clk: clk-loongson2: add clock controller driver support dt-bindings: clock: add loongson-2 boot clock index MAINTAINERS: remove obsolete file entry in MIPS/LOONGSON1 ARCHITECTURE MIPS: loongson32: Update the clock initialization clk: loongson1: Re-implement the clock driver clk: loongson1: Remove the outdated driver dt-bindings: clock: Add Loongson-1 clock * clk-socfpga: clk: socfpga: arria10: use of_clk_add_hw_provider and improve error handling clk: socfpga: use of_clk_add_hw_provider and improve error handling clk: socfpga: arria10: use of_clk_add_hw_provider and improve error handling clk: socfpga: use of_clk_add_hw_provider and improve error handling clk: socfpga: arria10: use of_clk_add_hw_provider and improve error handling clk: socfpga: use of_clk_add_hw_provider and improve error handling
2023-04-24clk: qcom: gcc-sc8280xp: Add EMAC GDSCsAndrew Halaney
Add the EMAC GDSCs to allow the EMAC hardware to be enabled. Acked-by: Stephen Boyd <sboyd@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Brian Masney <bmasney@redhat.com> Signed-off-by: Andrew Halaney <ahalaney@redhat.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230413191541.1073027-2-ahalaney@redhat.com
2023-04-22dt-bindings: reset: Add binding for MediaTek MT6735 TOPRGU/WDTYassine Oudjana
Add a DT binding for the MT6735 top reset generation unit/watchdog timer. Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Link: https://lore.kernel.org/r/20230302124015.75546-2-y.oudjana@protonmail.com Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
2023-04-18dt-bindings: reset: remove stih415/stih416 resetAlain Volmat
Remove the stih415 and stih416 reset dt-bindings since those two platforms are no more supported. Signed-off-by: Alain Volmat <avolmat@me.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230416200442.61554-1-avolmat@me.com Signed-off-by: Rob Herring <robh@kernel.org>
2023-04-14Merge tag 'qcom-arm64-for-6.4-2' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt More Qualcomm ARM64 Devicetree updated for v6.4 Devicetree for the QCM2210/QCM2290 is introduced. Support for the RB1 board is introduced on QRB2210, RB2 on QRB4210, the AL02 board on IPQ9574, the MI01.6 board is introduced on IPQ5332 and initial support for Xiaomi Mi A3 is introduced on SM6125. Support for the output-enable/disable flag is introduced in the pinctrl-msm driver, and the non-standard "input-enable" is dropped from a range of platforms. A wide range of smaller fixes are introduced, based on Devicetree validation. MSM8953 gains LPASS, MPSS and Wireless subsystem support. The iommus property is removed from PCIe nodes in all platforms, as the only the child devices should be associated with iommu groups, through the existing iommu-map property. A few QUP instances are introduced on the IPQ5332 platform, and support for the MI01.6 board is introduced. The reserved-memory map on Huawei Nexus 6P is updated with the addition of splash screen framebuffer memory and adjustment to the reserved memory region overlapping the smem region. Regulators are introduces for the SA8775P Ride platform. A regulator is marked always-on, for correctness, on Trogdor. Pinconf fixes are introduced to both sc7180 and sc7280 devices. A dedicated reviewers list is added for boards relevant to the Chromebook engineers. A set of pinconf fixes are introduced for sc8280xp, labels are introduced for Soundwire nodes. The sensor core remoteproc and FastRPC thereon, is introduce in SDM845 and enabled for OnePlus 6/6T and Shift Shift6mq. RMTFS, remoteprocs, ath10k and ramoops is introduced for the Lenovo Tab P11. UFS support is introduced on SM6125. SM8150 no longer defines the GPU to be in headless mode by default, GPU speedbins are introduced. GPU speedbins are introduced for SM8250 as well, as is support for display on Xiaomi Mi Pad 5 Pro, with two different panels supported. Soundwire controllers, ADSP audio codec macros and the Inline Crypto Engine support is added to the SM8550 platform. * tag 'qcom-arm64-for-6.4-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (85 commits) arm64: dts: qcom: Add base qrb4210-rb2 board dts arm64: dts: qcom: sm8550: add Soundwire controllers arm64: dts: qcom: sm8250: Add GPU speedbin support arm64: dts: qcom: sm8150: Add GPU speedbin support arm64: dts: qcom: sm8150: Don't start Adreno in headless mode arm64: dts: qcom: ipq5332: add support for the RDP468 variant arm64: dts: qcom: sdm630: move DSI opp-table out of DSI node arm64: dts: qcom: sm6115p-j606f: Enable ATH10K WiFi arm64: dts: qcom: sm6115p-j606f: Enable remoteprocs arm64: dts: qcom: sm6115: Add RMTFS arm64: dts: qcom: sm6115-j606f: Add ramoops node arm64: dts: qcom: msm8916-thwc-ufi001c: add function to pin config arm64: dts: qcom: sm8550: Add the Inline Crypto Engine node arm64: dts: MSM8953: Add lpass nodes arm64: dts: MSM8953: Add mpss nodes arm64: dts: MSM8953: Add wcnss nodes arm64: dts: qcom: sm8350: remove superfluous "input-enable" arm64: dts: qcom: sm8150: remove superfluous "input-enable" arm64: dts: qcom: apq8016: remove superfluous "input-enable" arm64: dts: qcom: sc8280xp-lenovo-thinkpad: correct pin drive-strength ... Link: https://lore.kernel.org/r/20230414031550.2412379-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-14Merge tag 'qcom-arm64-for-6.4' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt Qualcomm ARM64 updates for v6.4 PCI I/O and MEM ranges are corrected across all targets with PCIe enabled. Likewise is CPU clocks defined to be provided from CPUfreq for a wide range of platforms, to satisfy the OPP definitions, and LLCC bank information is corrected for all relevant platforms. IPQ5332 gains SMEM, CPUfreq and support for triggering download mode. The MI01.2 board is introduced. On MSM8916 WCN compatibles are moved to be defined per board, to avoid issues when boards rely on the incorrect defaults. Support for Yiming UZ801 4G modem stick is introduced. XO clock is defined and fed to RPMCC on MSM8953 and MSM8976, to ensure clock trees are properly rooted. DSI clocks feeding into gcc are described on MSM8953. On MSM8996 the external audio components are moved from the SoC dtsi. A few DWC3 quirks are added. On MSM8998 GPIO names are introduced for Sony Xperia XZ Premium, XZ1 and XZ1 Compact. A numbe of boards have GPIO keys properly marked as wakeup-source. The SA8775P platform is extended with CPUfreq, UARTs, I2C controllers, SPI controllers, SPMI and PMICs, PDC support. The associated PMICs gains reset and power key support, as well as thermal zones defined. Nodes are sorted. On top of this the SA8775P Ride board/platform is introduced. On SC7180 and SC7280 a range of fixes coming from DeviceTree validation are introduced, some clearing up unused properties, others correcting errors. A number of Google rev0 boards on SC7180 are dropped, as these are not considered to be in use by anyone anymore. On SC8280XP RTC support is introduced and enabled for the CRD and Lenovo Thinkpad X13s. It gains another UART, upon which Bluetooth is enabled on the Lenovo ThinkPad X13s. The touchpad definition is altered to attempt to probe both devices seen in the wild. A number of bug fixes are also introduced, and the regulator definitions on X13s are corrected. On SDM845 dynamic power coefficients are improved. BWMON compatible is corrected. Xiaomi Pocophone F1 gains notification LED. Sony Xperia XZ2, XZ2 Compact and XZ3 gains display, touchscreen, gpu and remoteproc support. OnePlus 6 and 6T gains hall sensor. GPU clock controller and remoteproc nodes are added for SM6115. CPU clock are defined to come from CPUfreq. Board-specific USB-properties are moved out of the SoC dtsi. On SM6375 L3 scaling, IMEM, RMTFS, RPM sleep stats, Tsens, modem remoteproc and WiFi nodes are added. Tsens thermal zones are defined and additional low power states are defined. Sony Xperia 10 IV gains volume down key support. On SM8150 another UART is introduced, to be used by GNSS on the SA8155 ADP. Support for the Flash LED block in PM8150L is added. On SM8250 TPDM MM and PRNG is defined, MHI region is added to PCIe node. A few bug fixes are introduced after Devicetree validation. The DisplayPort controller on both SM8350 and SM8450 is defined and the related QMP instance is transitioned to the USB3/DP combo variant. IMEM and PIL info is introduced, for post mortem debugging of remoteprocs. On the HDK PMIC GLINK is enabled and role switch is enabled. Some audio resources are corrected. A typo in the USB role property of the Microsoft Surface is corrected, thanks to DeviceTree validation. PCIe controllers and PHYs descriptions are corrected, and pinctrl state definitions are moved from the soc to the board definition. BWMON compatibles are corrected. PM8550B gains the definition of the eUSB2 repeater and this is enabled on the MTP. PMIC GLINK is also defined for the MTP and connected to DWC3, for role switching support. In addition to this, a range of cleanups based on Devicetree validation is introduced. A few clock bindings are introduced, from topic-branches shared with the clock tree, to aid introduction of references to these. * tag 'qcom-arm64-for-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (256 commits) arm64: dts: qcom: sc8280xp-x13s: Add bluetooth arm64: dts: qcom: sc8280xp: Define uart2 arm64: dts: qcom: sc8280xp: Add "mhi" region to the PCIe nodes arm64: dts: qcom: sm8250: Add "mhi" region to the PCIe nodes arm64: dts: qcom: sdm845: Add "mhi" region to the PCIe nodes arm64: dts: qcom: sa8775p-ride: set gpio-line-names for PMIC GPIOs arm64: dts: qcom: sa8775p: add PMIC GPIO controller nodes arm64: dts: qcom: sa8775p: pmic: add thermal zones arm64: dts: qcom: sa8775p: pmic: add support for the pmm8654 RESIN input arm64: dts: qcom: sa8775p: pmic: add the power key arm64: dts: qcom: sa8775p: add the Power On device node arm64: dts: qcom: sa8775p: add support for the on-board PMICs arm64: dts: qcom: sa8775p: add the spmi node arm64: dts: qcom: sa8775p: add the pdc node arm64: dts: qcom: sa8775p: sort soc nodes by reg property arm64: dts: qcom: sa8775p: pad reg properties to 8 digits arm64: dts: qcom: sc8280xp: correct Soundwire wakeup interrupt name arm64: dts: qcom: sdm845-tama: Enable GPI_DMA0/1 arm64: dts: qcom: sdm845-tama: Enable GPU arm64: dts: qcom: sdm845-tama: Enable remoteprocs ... Link: https://lore.kernel.org/r/20230410170233.5931-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-14Merge tag 'ti-k3-dt-for-v6.4' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/dt TI K3 device tree updates for v6.4 New features: * Overlays for CPSW9G and CPSW5G on J721e-evm, J7200-evm * Add support for AM625 based BeaglePlay, AM62-LP-SK * Audio, RTC, watchdog support for AM625 * McSPI for J7200,j721e, j721s2, J784s4 * ADC for j721s2 * Crypto acceleration, CPSW2G for J784s4 Non critical fixes: AM62, AM62a: * Fix schematics error to increase DDR to 4GB on AM62a-SK * L2Cache size fix (AM62a/AM625) * ti,vbus-divider property to USB1 on AM625-SK * Gpio count fix for AM625 J7200,j721e, j721s2, J784s4, AM68, AM69: * ti,sci-dev-id for J784s4 NAVSS nodes * j721e-sk: Drop application specific firmware name * am68-sk: Fix the gpio expander lines for production version Cleanups: * Pinmux header move to dt folder (next kernel PR, we will drop the uapi header). * j721e: ti,strobe-sel property cleanup for descoped HS400 MMC operation * tag 'ti-k3-dt-for-v6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: (34 commits) arm64: dts: ti: k3-j784s4-evm: Add eMMC mmc0 support arm64: dts: ti: Enable audio on SK-AM62(-LP) arm64: dts: ti: k3-am62-main: Add McASP nodes arm64: dts: ti: k3-j784s4: Add MCSPI nodes arm64: dts: ti: k3-j721s2: Add MCSPI nodes arm64: dts: ti: k3-j7200: Add MCSPI nodes arm64: dts: ti: k3-j721e: Add MCSPI nodes arm64: ti: dts: Add support for AM62x LP SK arm64: dts: ti: Refractor AM625 SK dts dt-bindings: arm: ti: k3: Add compatible for AM62x LP SK arm64: dts: ti: k3-am625-sk: Add ti,vbus-divider property to usbss1 arm64: dts: ti: k3-am68-sk-base-board: Update IO EXP GPIO lines for Rev E2 arm64: dts: ti: Add k3-am625-beagleplay dt-bindings: arm: ti: Add BeaglePlay arm64: dts: ti: k3-j7200: Add overlay to enable CPSW5G ports in QSGMII mode arm64: dts: ti: j7200-main: Add CPSW5G nodes arm64: dts: ti: k3-j721e: Add overlay to enable CPSW9G ports in QSGMII mode arm64: dts: ti: k3-j721e: Add CPSW9G nodes arm64: dts: ti: k3-j784s4-evm: Enable MCU CPSW2G arm64: dts: ti: k3-j721s2-common-proc-board: Add pinmux information for ADC ... Link: https://lore.kernel.org/r/20230410140521.3u3fftgnejakqnzj@shakable Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-14Merge tag 'renesas-dts-for-v6.4-tag2' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt Renesas DTS updates for v6.4 (take two) - Add PWM support for the R-Car H1 and H2 SoCs, - Add slide switch and I2C support for the Marzen development board, - Add SCI (serial) and Camera support for the RZ/G2L SoC and the RZ/G2L SMARC EVK development board, - Add IOMMU support for the R-Car V4H SoC, - Miscellaneous fixes and improvements. * tag 'renesas-dts-for-v6.4-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: arm64: dts: renesas: r8a779a0: Revise renesas,ipmmu-main arm64: dts: renesas: falcon-csi-dsi: Set bus-type for MAX96712 arm64: dts: renesas: r8a779g0: Add iommus to MMC node arm64: dts: renesas: r8a779g0: Add iommus to DMAC nodes arm64: dts: renesas: r8a779g0: Add IPMMU nodes arm64: dts: renesas: r8a779f0: Revise renesas,ipmmu-main arm64: dts: renesas: rzg2l-smarc: Enable CRU, CSI support arm64: dts: renesas: r9a07g044: Add CSI and CRU nodes arm64: dts: renesas: r9a07g044: Enable SCI0 using DT overlay ARM: dts: r8a7790: Add PWM device nodes ARM: dts: r8a7790: Add TPU device node ARM: dts: marzen: Enable I2C support ARM: dts: marzen: Add slide switches ARM: dts: r8a7779: Add PWM support dt-bindings: clock: r8a7779: Add PWM module clock arm64: dts: renesas: rzg2l: Add clock-names and reset-names to DMAC nodes Link: https://lore.kernel.org/r/cover.1681113117.git.geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-14Merge tag 'riscv-dt-for-v6.4' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/dt RISC-V Devicetrees for v6.4 Microchip: A "fix" for the system controller's regs on PolarFire SoC, adding a missing reg property. The patch had been sitting there for months and I only re-found it recently, so you can guess how much of a "fix" it actually is. It'll become needed when the system controller's QSPI gets added in the future, but at present there's no urgency as the driver can handle both the current and "fixed" versions. StarFive: Basic support for the JH7110 & the associated first-party dev board, the VisionFive v2 (in two forms). There's a bunch of dt-bindings required for this too, all of which have had input from the DT folk. There's enough in this tag to boot to a console w/ an initramfs but little more. The SoC supports some of the "new" bit manipulation instructions, which is a good test for the recently added Zbb support in the kernel. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> * tag 'riscv-dt-for-v6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux: riscv: dts: starfive: Add StarFive JH7110 VisionFive 2 board device tree riscv: dts: starfive: Add StarFive JH7110 pin function definitions riscv: dts: starfive: Add initial StarFive JH7110 device tree dt-bindings: riscv: Add SiFive S7 compatible dt-bindings: interrupt-controller: Add StarFive JH7110 plic dt-bindings: timer: Add StarFive JH7110 clint dt-bindings: clock: Add StarFive JH7110 always-on clock and reset generator dt-bindings: clock: Add StarFive JH7110 system clock and reset generator riscv: dts: microchip: fix the mpfs' mailbox regs riscv: dts: microchip: add mpfs specific macb reset support Link: https://lore.kernel.org/r/20230406-shank-impromptu-3d483bbc249f@spud Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-14Merge tag 'qcom-drivers-for-6.4' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers Qualcomm driver updates for v6.4 The Qualcomm SCM driver will now always clear the download bit, avoiding entering download mode on a clean reboot because the bootloader left it set. The vmid bitmap passed to qcom_scm_assign_mem() is transitioned to a well defined size. SM6375 support is added, and SC8180X, QDU1000/QRU1000, IPQ5332 and IPQ9574 compatibles are documented. GENI gains support for newer hardware with deeper FIFOs. The BWMON driver is updated to better handle the two register blocks, which are not consistent between MSM8998 and newer platforms. The LLCC driver no longer assumes a fixes stride across the various banks, and instead acquire the bank placement from DeviceTree. EDAC support for polling is introduced. EDAC support on SDM845 is disabled, as its been observed that accessing relevant registers is not permitted on most devices. PMIC GLINK is reworked to support defining which auxiliary children to spawn per platform, support for spawning a UCSI child is added and SM8450 and SM8550 is introduced. The RPM power-domain driver is cleaned up by moving and generalizing structures that are common between platforms, rather than duplicating everything. Macros are replaced with just direct definition of the relevant structures. Support for defining parent relationships between the power-domains is introduced, like it has been in rpmhpd for a long time. Number of processors has gone up, so max processor count in SMEM is bumped again. Error handling in SMSM is cleaned up using dev_err_probe(). Socinfo is taught about IPQ9574, QCM2290, QRB2210, QRB4210, SM7150, SA8775P and a number of PMICs. * tag 'qcom-drivers-for-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (51 commits) dt-bindings: firmware: document Qualcomm SC8180X SCM dt-bindings: sram: qcom,imem: document SM6375 IMEM soc: qcom: icc-bwmon: Handle global registers correctly soc: qcom: icc-bwmon: Remove unused struct member soc: qcom: smsm: Use dev_err_probe() firmware: qcom_scm: Add SM6375 compatible soc: qcom: llcc: Add configuration data for SM7150 dt-bindings: arm: msm: Add LLCC for SM7150 dt-bindings: soc: qcom: smd-rpm: re-add missing qcom,rpm-msm8994 soc: qcom: pmic_glink: register ucsi aux device dt-bindings: soc: qcom: qcom,pmic-glink: document SM8550 compatible dt-bindings: soc: qcom: qcom,pmic-glink: document SM8450 compatible firmware: qcom_scm: Clear download bit during reboot dt-bindings: soc: qcom: aoss: Document QDU1000/QRU1000 compatible dt-bindings: firmware: qcom,scm: Update QDU1000/QRU1000 compatible dt-bindings: soc: qcom: smd-rpm: Add IPQ9574 compatible firmware: qcom_scm: Use fixed width src vm bitmap dt-bindings: firmware: qcom,scm: document IPQ5332 SCM dt-bindings: scm: Add compatible for IPQ9574 soc: qcom: rpmpd: Remove useless comments ... Link: https://lore.kernel.org/r/20230410152421.4477-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-13dt-bindings: clock: qcom: describe the GPUCC clock for SA8775PBartosz Golaszewski
Add the compatible for the Qualcomm Graphics Clock control module present on sa8775p platforms. It matches the generic QCom GPUCC description. Add device-specific DT bindings defines as well. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230411125910.401075-2-brgl@bgdev.pl
2023-04-09dt-bindings: clock: imx93: add NIC, A55 and ARM PLL CLKPeng Fan
Add i.MX93 NIC, A55 and ARM PLL CLK. Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230403095300.3386988-7-peng.fan@oss.nxp.com Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
2023-04-09dt-bindings: clock: imx8mp: Add LDB clock entryPeng Fan
Add LDB clock entry for i.MX8MP Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20230403094633.3366446-2-peng.fan@oss.nxp.com Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
2023-04-07dt-bindings: firmware: qcom: scm: add SSC_Q6 and ADSP_Q6 VMIDsDylan Van Assche
SSC_Q6 and ADSP_Q6 are used in the FastRPC driver for accessing the secure world. Signed-off-by: Dylan Van Assche <me@dylanvanassche.be> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230406173148.28309-3-me@dylanvanassche.be
2023-04-07Merge branch '20230316072940.29137-2-quic_devipriy@quicinc.com' into HEADBjorn Andersson
Merge the IPQ9574 Global Clock Controller Devicetree binding, to make available the clock definitions used in the Devicetree source.
2023-04-07Merge branch '20230316072940.29137-2-quic_devipriy@quicinc.com' into clk-for-6.4Bjorn Andersson
Merge IPQ9574 Global Clock Controller binding through a topic branch to allow it also be introduced in the Devicetree source tree.
2023-04-07dt-bindings: clock: Add ipq9574 clock and reset definitionsDevi Priya
Add clock and reset ID definitions for ipq9574 Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Co-developed-by: Anusha Rao <quic_anusha@quicinc.com> Signed-off-by: Anusha Rao <quic_anusha@quicinc.com> Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230316072940.29137-2-quic_devipriy@quicinc.com
2023-04-07dt-bindings: thermal: mediatek: Add AP domain to LVTS thermal controllers ↵Balsam CHIHI
for mt8195 Add AP Domain to LVTS thermal controllers dt-binding definition for mt8195. Signed-off-by: Balsam CHIHI <bchihi@baylibre.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by: Chen-Yu Tsai <wenst@chromium.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20230307154524.118541-2-bchihi@baylibre.com
2023-04-05dt-bindings: clock: Add StarFive JH7110 always-on clock and reset generatorEmil Renner Berthing
Add bindings for the always-on clock and reset generator (AONCRG) on the JH7110 RISC-V SoC by StarFive Ltd. Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Signed-off-by: Hal Feng <hal.feng@starfivetech.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-04-05dt-bindings: clock: Add StarFive JH7110 system clock and reset generatorEmil Renner Berthing
Add bindings for the system clock and reset generator (SYSCRG) on the JH7110 RISC-V SoC by StarFive Ltd. Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Signed-off-by: Hal Feng <hal.feng@starfivetech.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-04-04Merge branch '20230208091340.124641-1-konrad.dybcio@linaro.org' into HEADBjorn Andersson
Introduce SM6115 GPUCC devicetree bindings, to make it possible to use clock defines in the devicetree source.
2023-04-04Merge branch '20230316-topic-qcm_dispcc_reset-v1-1-dd3708853014@linaro.org' ↵Bjorn Andersson
into clk-for-6.4 Merge dt-binding include file additions through topic branch, to allow them to be made available in DT source tree as well.
2023-04-04dt-bindings: clock: dispcc-qcm2290: Add MDSS_CORE resetKonrad Dybcio
Add the MDSS_CORE reset which can be asserted to reset the state of the entire MDSS. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230316-topic-qcm_dispcc_reset-v1-1-dd3708853014@linaro.org
2023-03-31dt-bindings: clock: mediatek: Add new MT8188 clockGarmin.Chang
Add the new binding documentation for system clock and functional clock on MediaTek MT8188. Signed-off-by: Garmin.Chang <Garmin.Chang@mediatek.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230331123621.16167-2-Garmin.Chang@mediatek.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-03-30dt-bindings: clock: r8a7779: Add PWM module clockGeert Uytterhoeven
Add the module clock used by the PWM Timers on the Renesas R-Car H1 (R8A7779) SoC. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/1397b517fccbe716a71cfae770512ed577730a25.1679329211.git.geert+renesas@glider.be
2023-03-27dt-bindings: reset: add BCM63268 timer reset definitionsÁlvaro Fernández Rojas
Add missing timer reset definitions for BCM63268. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230322171515.120353-3-noltari@gmail.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-03-27dt-bindings: clk: add BCM63268 timer clock definitionsÁlvaro Fernández Rojas
Add missing timer clock definitions for BCM63268. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230322171515.120353-2-noltari@gmail.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-03-27dt-bindings: clock: add loongson-2 boot clock indexYinbo Zhu
The Loongson-2 boot clock was used to spi and lio peripheral and this patch was to add boot clock index number. Signed-off-by: Yinbo Zhu <zhuyinbo@loongson.cn> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230323025229.2971-1-zhuyinbo@loongson.cn Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-03-21dt-bindings: clock: Add Loongson-1 clockKeguang Zhang
Add devicetree binding document and related header file for the Loongson-1 clock. Signed-off-by: Keguang Zhang <keguang.zhang@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230321111817.71756-2-keguang.zhang@gmail.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-03-21ASoC: cs35l45: Support for GPIO pins configuration.Vlad.Karpovich
Adds device tree configuration for cs35l45 GPIOs Signed-off-by: Vlad Karpovich <vkarpovi@opensource.cirrus.com> Link: https://lore.kernel.org/r/20230315154722.3911463-1-vkarpovi@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-20dt-bindings: pinctrl: k3: Deprecate header with register constantsNishanth Menon
For convenience (less code duplication), the pin controller pin configuration register values were defined in the bindings header. These are not some IDs or other abstraction layer but raw numbers used in the registers. These constants do not fit the purpose of bindings. They do not provide any abstraction, any hardware and driver independent ID. In fact, the Linux pinctrl-single driver actually do not use the bindings header at all. All of the constants were moved already to headers local to DTS (residing in DTS directory), so remove any references to the bindings header and add a warning that it is deprecated. Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/linux-arm-kernel/71c7feff-4189-f12f-7353-bce41a61119d@linaro.org/ Link: https://lore.kernel.org/r/20230315155228.1566883-4-nm@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2023-03-15Merge branch '20230223180935.60546-1-otto.pflueger@abscue.de' into clk-for-6.4Bjorn Andersson
Merge MSM8917 Global Clock Controller and RPM clock controller bindings through topic branch, to make it possible to introduce in Devicetree source depending on these.
2023-03-15dt-bindings: clock: Add MSM8917 global clock controllerOtto Pflüger
Add a device tree binding to describe clocks, resets and power domains provided by the global clock controller on MSM8917 SoCs and the very similar QM215 SoCs. Add the new compatibles to qcom,gcc-msm8909.yaml. There is no need to create another YAML file because the bindings are identical (MSM8917 GCC requires the same parent clocks as the MSM8909 GCC). Signed-off-by: Otto Pflüger <otto.pflueger@abscue.de> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230223180935.60546-2-otto.pflueger@abscue.de
2023-03-15Merge branch '20230307062232.4889-1-quic_kathirav@quicinc.com' into clk-for-6.4Bjorn Andersson
Merge the IPQ5332 Global Clock Controller binding through a topic branch to make it possible to include in Devicetree source as well.
2023-03-15dt-bindings: clock: Add Qualcomm IPQ5332 GCCKathiravan T
Add binding for the Qualcomm IPQ5332 Global Clock Controller. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230307062232.4889-4-quic_kathirav@quicinc.com
2023-03-15dt-bindings: arm: qcom,ids: Add Soc ID for SM7150David Wronek
Add the ID for the Qualcomm SM7150 SoC. Signed-off-by: David Wronek <davidwronek@gmail.com> Signed-off-by: Danila Tikhonov <danila@jiaxyga.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230305191745.386862-2-danila@jiaxyga.com
2023-03-15dt-bindings: arm: qcom,ids: Add IDs for QRB4210Bhupesh Sharma
Add the ID for QRB4210 variant. Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230315160151.2166861-2-bhupesh.sharma@linaro.org
2023-03-15dt-bindings: arm: qcom,ids: Add IDs for IPQ9574 and its variantsVaradarajan Narayanan
Add SOC ID for Qualcomm IPQ9574, IPQ9570, IPQ9554, IPQ9550, IPQ9514 and IPQ9510 Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Kathiravan T <quic_kathirav@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/1678774414-14414-2-git-send-email-quic_varada@quicinc.com
2023-03-15dt-bindings: arm: qcom,ids: Add IDs for QCM2290/QRB2210Konrad Dybcio
Add the missing IDs for scuba and its QRB variant. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230314-topic-scuba_socinfo-v2-1-44fa1256aa6d@linaro.org
2023-03-13Merge branch '20230213165318.127160-2-danila@jiaxyga.com' into clk-for-6.4Bjorn Andersson
Merge SM7180 Global Clock Controller binding through a dedicated topic branch, so that it can be introduced into the Devicetree source tree as well in the same kernel release.
2023-03-13dt-bindings: clock: Add SM7150 GCC clocksDanila Tikhonov
Add device tree bindings for global clock subsystem clock controller for Qualcomm Technology Inc's SM7150 SoCs. Co-developed-by: David Wronek <davidwronek@gmail.com> Signed-off-by: David Wronek <davidwronek@gmail.com> Signed-off-by: Danila Tikhonov <danila@jiaxyga.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230213165318.127160-2-danila@jiaxyga.com
2023-03-13dt-bindings: arm: qcom: add the SoC ID for SA8775PBartosz Golaszewski
Add the SoC ID entry for SA8775P. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Eric Chanudet <echanude@redhat.com> Tested-by: Eric Chanudet <echanude@redhat.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230209095753.447347-3-brgl@bgdev.pl
2023-03-13dt-bindings: clock: Add Qcom SM6115 GPUCCKonrad Dybcio
Add device tree bindings for graphics clock controller for Qualcomm Technology Inc's SM6115 SoCs. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230208091340.124641-10-konrad.dybcio@linaro.org
2023-03-13dt-bindings: clock: Add Qcom SM6375 GPUCCKonrad Dybcio
Add device tree bindings for graphics clock controller for Qualcomm Technology Inc's SM6375 SoCs. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230208091340.124641-8-konrad.dybcio@linaro.org
2023-03-13dt-bindings: clock: Add Qcom SM6125 GPUCCKonrad Dybcio
Add device tree bindings for graphics clock controller for Qualcomm Technology Inc's SM6125 SoCs. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230208091340.124641-6-konrad.dybcio@linaro.org
generated by cgit (git 2.34.1) at 2025-09-23 16:50:48 +0000