Age | Commit message (Collapse) | Author |
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'clk-microchip' into clk-next
* clk-remove:
clk: starfive: jh7110-vout: Convert to platform remove callback returning void
clk: starfive: jh7110-isp: Convert to platform remove callback returning void
clk: imx: imx8-acm: Convert to platform remove callback returning void
* clk-amlogic:
clk: meson: Add missing clocks to axg_clk_regmaps
* clk-qcom: (62 commits)
clk: qcom: gcc-ipq5018: fix register offset for GCC_UBI0_AXI_ARES reset
clk: qcom: gcc-ipq5018: fix 'halt_reg' offset of 'gcc_pcie1_pipe_clk'
clk: qcom: gcc-ipq5018: fix 'enable_reg' offset of 'gcc_gmac0_sys_clk'
clk: qcom: camcc-x1e80100: Fix missing DT_IFACE enum in x1e80100 camcc
clk: qcom: mmcc-msm8974: fix terminating of frequency table arrays
clk: qcom: mmcc-apq8084: fix terminating of frequency table arrays
clk: qcom: camcc-sc8280xp: fix terminating of frequency table arrays
clk: qcom: gcc-ipq9574: fix terminating of frequency table arrays
clk: qcom: gcc-ipq8074: fix terminating of frequency table arrays
clk: qcom: gcc-ipq6018: fix terminating of frequency table arrays
clk: qcom: gcc-ipq5018: fix terminating of frequency table arrays
clk: qcom: dispcc-sdm845: Adjust internal GDSC wait times
dt-bindings: clk: qcom: drop the SC7180 Modem subsystem clock controller
clk: qcom: drop the SC7180 Modem subsystem clock driver
clk: qcom: Use qcom_branch_set_clk_en()
clk: qcom: branch: Add a helper for setting the enable bit
clk: qcom: dispcc-sm8250: Make clk_init_data and pll_vco const
clk: qcom: gcc-sc8180x: Add missing UFS QREF clocks
clk: qcom: gcc-msm8953: add more resets
clk: qcom: videocc-*: switch to module_platform_driver
...
* clk-parent:
clk: Fix clk_core_get NULL dereference
* clk-microchip:
clk: microchip: mpfs: convert MSSPLL outputs to clk_divider
clk: microchip: mpfs: add missing MSSPLL outputs
clk: microchip: mpfs: setup for using other mss pll outputs
clk: microchip: mpfs: split MSSPLL in two
dt-bindings: can: mpfs: add missing required clock
dt-bindings: clock: mpfs: add more MSSPLL output definitions
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'clk-allwinner' into clk-next
* clk-aspeed:
clk: ast2600: Add FSI parent clock with correct rate
dt-bindings: clock: ast2600: Add FSI clock
* clk-keystone:
clk: keystone: sci-clk: Adding support for non contiguous clocks
* clk-mobileye:
dt-bindings: reset: mobileye,eyeq5-reset: add bindings
dt-bindings: clock: mobileye,eyeq5-clk: add bindings
clk: fixed-factor: add fwname-based constructor functions
clk: fixed-factor: add optional accuracy support
* clk-allwinner:
clk: sunxi: usb: fix kernel-doc warnings
clk: sunxi: sun9i-cpus: fix kernel-doc warnings
clk: sunxi: a20-gmac: fix kernel-doc warnings
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and 'clk-bulk' into clk-next
- Add a devm_clk_bulk_get_all_enable() API to get and enable all clks
for a device
- Fix some static checker errors in the hisilicon clk driver
* clk-renesas: (25 commits)
clk: renesas: r8a779h0: Add RPC-IF clock
clk: renesas: r8a779h0: Add SYS-DMAC clocks
clk: renesas: r8a779h0: Add SDHI clock
clk: renesas: r8a779h0: Add EtherAVB clocks
clk: renesas: r9a07g04[34]: Fix typo for sel_shdi variable
clk: renesas: r9a07g04[34]: Use SEL_SDHI1_STS status configuration for SD1 mux
clk: renesas: r8a779f0: Correct PFC/GPIO parent clock
clk: renesas: r8a779g0: Correct PFC/GPIO parent clocks
clk: renesas: r8a779h0: Add I2C clocks
clk: renesas: r8a779h0: Add watchdog clock
clk: renesas: r8a779h0: Add PFC/GPIO clocks
clk: renesas: r8a779g0: Fix PCIe clock name
clk: renesas: cpg-mssr: Add support for R-Car V4M
clk: renesas: rcar-gen4: Add support for FRQCRC1
clk: renesas: r9a07g043: Add clock and reset entries for CRU
clk: renesas: r9a08g045: Add clock and reset support for watchdog
dt-bindings: clock: Add R8A779H0 V4M CPG Core Clock Definitions
dt-bindings: clock: renesas,cpg-mssr: Document R-Car V4M support
dt-bindings: power: Add r8a779h0 SYSC power domain definitions
dt-bindings: power: renesas,rcar-sysc: Document R-Car V4M support
...
* clk-cleanup:
clk: zynq: Prevent null pointer dereference caused by kmalloc failure
clk: fractional-divider: Use bit operations consistently
clk: fractional-divider: Move mask calculations out of lock
clk: ti: dpll3xxx: use correct function names in kernel-doc
clk: clocking-wizard: Remove redundant initialization of pointer div_addr
clk: keystone: sci-clk: match func name comment to actual
clk: cdce925: Remove redundant assignment to variable 'rate'
MAINTAINERS: drop Sekhar Nori
* clk-hisilicon:
clk: hisilicon: Use devm_kcalloc() instead of devm_kzalloc()
clk: hisilicon: hi3559a: Fix an erroneous devm_kfree()
clk: hisilicon: hi3519: Release the correct number of gates in hi3519_clk_unregister()
* clk-mediatek:
clk: mediatek: clk-mt8173-apmixedsys: Use common error handling code in clk_mt8173_apmixed_probe()
clk: mediatek: add infracfg reset controller for mt7988
dt-bindings: reset: mediatek: add MT7988 infracfg reset IDs
dt-bindings: clock: mediatek: convert SSUSBSYS to the json-schema clock
dt-bindings: clock: mediatek: convert PCIESYS to the json-schema clock
dt-bindings: clock: mediatek: convert hifsys to the json-schema clock
clk: mediatek: mt7981-topckgen: flag SGM_REG_SEL as critical
clk: mediatek: mt8183: Correct parent of CLK_INFRA_SSPM_32K_SELF
clk: mediatek: mt7622-apmixedsys: Fix an error handling path in clk_mt8135_apmixed_probe()
clk: mediatek: mt8135: Fix an error handling path in clk_mt8135_apmixed_probe()
* clk-bulk:
clk: Provide managed helper to get and enable bulk clocks
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git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm
Pull pmdomain updates from Ulf Hansson:
"Core:
- Log a message when unused PM domains gets disabled
- Scale down parent/child performance states in the reverse order
Providers:
- qcom: rpmpd: Add power domains support for MSM8974, MSM8974PRO,
PMA8084 and PM8841
- renesas: rcar-gen4-sysc: Reduce atomic delays
- renesas: rcar-sysc: Adjust the waiting time to cover the worst case
- renesas: r8a779h0-sysc: Add support for the r8a779h0 PM domains
- imx: imx8mp-blk-ctrl: Add the fdcc clock to the hdmimix domains
- imx: imx8mp-blk-ctrl: Error out if domains are missing in DT
Improve support for multiple PM domains:
- Add two helper functions to attach/detach multiple PM domains
- Convert a couple of drivers to use the new helper functions"
* tag 'pmdomain-v6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm: (22 commits)
pmdomain: renesas: rcar-gen4-sysc: Reduce atomic delays
pmdomain: renesas: Adjust the waiting time to cover the worst case
pmdomain: qcom: rpmpd: Add MSM8974PRO+PMA8084 power domains
pmdomain: qcom: rpmpd: Add MSM8974+PM8841 power domains
pmdomain: core: constify of_phandle_args in add device and subdomain
pmdomain: core: constify of_phandle_args in xlate
media: venus: Convert to dev_pm_domain_attach|detach_list() for vcodec
remoteproc: qcom_q6v5_adsp: Convert to dev_pm_domain_attach|detach_list()
remoteproc: imx_rproc: Convert to dev_pm_domain_attach|detach_list()
remoteproc: imx_dsp_rproc: Convert to dev_pm_domain_attach|detach_list()
PM: domains: Add helper functions to attach/detach multiple PM domains
pmdomain: imx8mp-blk-ctrl: imx8mp_blk: Add fdcc clock to hdmimix domain
pmdomain: mediatek: Use devm_platform_ioremap_resource() in init_scp()
pmdomain: renesas: r8a779h0-sysc: Add r8a779h0 support
pmdomain: imx8mp-blk-ctrl: Error out if domains are missing in DT
pmdomain: ti: Add a null pointer check to the omap_prm_domain_init
pmdomain: renesas: rcar-gen4-sysc: Remove unneeded includes
pmdomain: core: Print a message when unused power domains are disabled
pmdomain: qcom: rpmpd: Keep one RPM handle for all RPMPDs
pmdomain: core: Scale down parent/child performance states in reverse order
...
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git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC driver updates from Arnd Bergmann:
"This is the usual mix of updates for drivers that are used on (mostly
ARM) SoCs with no other top-level subsystem tree, including:
- The SCMI firmware subsystem gains support for version 3.2 of the
specification and updates to the notification code
- Feature updates for Tegra and Qualcomm platforms for added hardware
support
- A number of platforms get soc_device additions for identifying
newly added chips from Renesas, Qualcomm, Mediatek and Google
- Trivial improvements for firmware and memory drivers amongst
others, in particular 'const' annotations throughout multiple
subsystems"
* tag 'soc-drivers-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (96 commits)
tee: make tee_bus_type const
soc: qcom: aoss: add missing kerneldoc for qmp members
soc: qcom: geni-se: drop unused kerneldoc struct geni_wrapper param
soc: qcom: spm: fix building with CONFIG_REGULATOR=n
bus: ti-sysc: constify the struct device_type usage
memory: stm32-fmc2-ebi: keep power domain on
memory: stm32-fmc2-ebi: add MP25 RIF support
memory: stm32-fmc2-ebi: add MP25 support
memory: stm32-fmc2-ebi: check regmap_read return value
dt-bindings: memory-controller: st,stm32: add MP25 support
dt-bindings: bus: imx-weim: convert to YAML
watchdog: s3c2410_wdt: use exynos_get_pmu_regmap_by_phandle() for PMU regs
soc: samsung: exynos-pmu: Add regmap support for SoCs that protect PMU regs
MAINTAINERS: Update SCMI entry with HWMON driver
MAINTAINERS: samsung: gs101: match patches touching Google Tensor SoC
memory: tegra: Fix indentation
memory: tegra: Add BPMP and ICC info for DLA clients
memory: tegra: Correct DLA client names
dt-bindings: memory: renesas,rpc-if: Document R-Car V4M support
firmware: arm_scmi: Update the supported clock protocol version
...
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It's common for routers to have LED indicating link on the WAN port.
Some devices however have an extra LED that's meant to be used if WAN
connection is actually "online" (there is Internet access available).
It was suggested to add #define for such use case.
Link: https://lore.kernel.org/linux-devicetree/80e92209-5578-44e7-bd4b-603a29053ddf@collabora.com/T/#u
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20240223112223.1368-1-zajec5@gmail.com
Signed-off-by: Lee Jones <lee@kernel.org>
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Most wireless routers and access points can operate in multiple bands
simultaneously. Vendors often equip their devices with per-band LEDs.
Add defines for those very common functions to allow cleaner & clearer
bindings.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20240117151736.27440-1-zajec5@gmail.com
Signed-off-by: Lee Jones <lee@kernel.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt
Initial support for the rk3568 Qnap TS433 NAS, the rk3588-based Tiger SoM
from Theobroma-Systems and the rk3588-based Toybrick TB-RK3588X.
Some fixes to conform to dt-bindings for i2s (rk3588, rk356x) and
rk356x video-decoder (missing interrupt-names).
Correcting the vendor in the compatible for OrangePi RK3399 and BananaPi
R2 Pro (discussed with DT-maintainers beforehand of course).
The VO1-GRF syscon needs its clock to work, and that clock also needed to
be actually exported forst, so we're sharing a branch with the Rockchip
clock-tree (that already got merged into the main clock-tree for 6.9) for
this small shared code.
And as another step on the long road to graphics output on rk3588, 6.9 will
get the hdmi-phy via the phy-tree, so here the dts node is added.
* tag 'v6.9-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: Fix name for UART pin header on qnap-ts433
arm64: dts: rockchip: Add basic support for QNAP TS-433
dt-bindings: arm: rockchip: Add QNAP TS-433
arm64: dts: rockchip: add Haikou baseboard with RK3588-Q7 SoM
arm64: dts: rockchip: add RK3588-Q7 (Tiger) SoM
dt-bindings: arm: rockchip: Add Theobroma-Systems RK3588 Q7 with baseboard
arm64: dts: rockchip: drop rockchip,trcm-sync-tx-only from rk3588 i2s
arm64: dts: rockchip: fix reset-names for rk356x i2s2 controller
arm64: dts: rockchip: add missing interrupt-names for rk356x vdpu
arm64: dts: rockchip: add clock to vo1-grf syscon on rk3588
dt-bindings: arm: rockchip: Add Toybrick TB-RK3588X
arm64: dts: rockchip: Add devicetree support for TB-RK3588X board
arm64: dts: rockchip: adjust vendor on orangepi rk3399 board
arm64: dts: rockchip: adjust vendor on Banana Pi R2 Pro board
dt-bindings: arm: rockchip: Correct vendor for Banana Pi R2 Pro
dt-bindings: arm: rockchip: Correct vendor for Orange Pi RK3399 board
arm64: dts: rockchip: Add HDMI0 PHY to rk3588
dt-bindings: clock: rk3588: add missing PCLK_VO1GRF
dt-bindings: clock: rk3588: drop CLK_NR_CLKS
clk: rockchip: rk3588: fix CLK_NR_CLKS usage
Link: https://lore.kernel.org/r/3695004.ElGaqSPkdT@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt
STM32 DT for v6.9, round 1
Highlights:
----------
- MCU:
- Add DSI support on stm32f769.
- Add display support on stm32f769-disco.
- Add stm32f769-disco-mb1166-reva09 board support which belongs to
the novatek NT35510 panel.
- MPU:
- STM32MP13:
- Add CRC support an enable it on stm32mp135f-dk.
- Enable CRYP on stm32mp135f-dk.
- STMP32MP15:
- Fix DSI peripheral clock: use bus clock instead of kernel clock
for pclk.
- LXA: driver powerboard lines as open drain.
- LXA: reduce RGMII drive strenght to reduce EMI emmissions.
- STM32MP25:
- Add video encoder / video decoder support.
* tag 'stm32-dt-for-v6.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
arm64: dts: st: add video encoder support to stm32mp255
arm64: dts: st: add video decoder support to stm32mp255
ARM: dts: stm32: enable crypto accelerator on stm32mp135f-dk
ARM: dts: stm32: enable CRC on stm32mp135f-dk
ARM: dts: stm32: add CRC on stm32mp131
ARM: dts: add stm32f769-disco-mb1166-reva09
ARM: dts: stm32: add display support on stm32f769-disco
ARM: dts: stm32: rename mmc_vcard to vcc-3v3 on stm32f769-disco
ARM: dts: stm32: add DSI support on stm32f769
dt-bindings: mfd: stm32f7: Add binding definition for DSI
dt-bindings: nt35510: document 'port' property
ARM: dts: stm32: lxa-tac: reduce RGMII interface drive strength
ARM: dts: stm32: fix DSI peripheral clock on stm32mp15 boards
ARM: dts: stm32: lxa-tac: drive powerboard lines as open-drain
Link: https://lore.kernel.org/r/a7ae1058-e24d-4a6b-900f-401f0e3ae17c@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt
Qualcomm ARM64 DeviceTree updates for v6.9
Four variants of Samsung Galaxy Core Prime and Grand Prime, built on
MSM8916, and the Hardware Development Kit (HDK) for SM8550, are
introduced.
On X Elite audio and compute remoteprocs, IPCC, PCIe, AOSS QMP, SMP2P,
TCSR, USB, display, audio, and soundwire support is introduced, and
enabled across the CRD and QCP devices.
For SM8650 PCIe controllers are moved to GIC-ITS and msi-map-mask is
defined. Missing qlink-logging reserved-memory region is added for the
modem remoteproc. FastRPC compute contexts are marked dma-coherent.
Audio, USB Type-C and PM8010 support is introduced across MTP and QRD
devices.
GPU cooling devices are hooked up across MSM8916, MSM8939, SC8180X,
SDM630, SDM845, SM6115, SM8150, SM8250, SM8350, and SM8550.
UFS PHY clocks are corrected across MSM8996, MSM8998, SC8180X, SC8280XP,
SDM845, SM6115, SM6125, SM8150, SM8250, SM8350, SM8550, and SM8650.
PCI MSI interrupts are wired up across SM8150, SM8250, SM8350, SM8450,
SM8550, SM8650, SC7280, and SC8180X
On IPQ6018 QUP5 I2C, tsens sand thermal zones are defined. The Inline
Crypto Engine (ICE) is enabled for IPQ9574.
On MSM8953 the GPU and its IOMMU is introduced, the reset for the
display subsystem is also wired up.
VLS CLAMP registers are specified for USB3 PHYs on MSM8998, QCM2290, and
SM6115.
USB Type-C port management is enabled on QRB4210 RB2.
On the SA8295P ADP the MAX20411 regulator powering the GPU rails is
introduced and the GPU is enabled. The first PCI instance on SA8540P
Ride is disabled for now, as a fix for the interrupt storm produced here
has not been presented.
On SA8775P the firmware memory map has changed and is updated. Safety
IRQ is added to the Ethernet controller.
On SC7180 UFS support is introduced and the cros-ec-spi is marked as
wakeup source.
For SC7280 capacity and DPC properties are added, cryptobam definition
is improved to work in more firmware environments, more Chrome-specific
properties are moved out from main dtsi, and cros-ec-spi is maked as a
wakeup source. Slimbus definition is added to the platform.
A missing reserved-memory range is added to Fairphone FP5, PMIC GLINK
and Venus are enabled. LEDs are introduced and voltage settings
corrected on the QCM6490 IDP, and RB3gen2 sees the same voltage changes
and GCC protected clocks are introduced to make the board boot properly.
RPMh sleep stats and a variety of cleanups and fixes are introduced for
SC8180X.
On SC8280XP the additional tsens instances are introduced. Camera
Subsystem and Camera Control Interface (CCI) are added. PMIC die-temp
vadc channels are introduced on the CRD, to allow ADC channels to be
tied to the shared PMIC temp-alarms, to actually report temperature.
On SDM630 USB QMP PHY support is introduced and enabled on the Inforce
IFC6560 board. On the various Sony Xperia XA2 variants WLED is enabled
and configured.
On SM6350 display subsystem interconnects and tsens-based thermal zones
are added. On SM7125 UFS support is added.
On Fairphone FP4, on SM7225, display and GPU are enabled, and firmware
paths are corrected.
SM8150 PCIe controller definitions are corrected.
As with SM8650, the SM8550 the fastrpc compute contexts are marked
dm-coherent, and PCIe controllers are moved to use GIC-ITS. The UFS
controller frequency definition is moved to the generic opp-table.
Touchscreen is enabled on the QRD device.
As usual, a variety of smaller cleanups and corrections to match
DeviceTree bindings and style guidelines are introduced across the
various files.
* tag 'qcom-arm64-for-6.9' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (176 commits)
arm64: dts: qcom: sm6115: fix USB PHY configuration
arm64: dts: sm8650: Add msi-map-mask for PCIe nodes
arm64: dts: qcom: replace underscores in node names
dt-bindings: arm: qcom: Add Samsung Galaxy Tab 4 10.1 LTE
arm64: dts: qcom: pm4125: define USB-C related blocks
arm64: dts: qcom: sa8540p-ride: disable pcie2a node
arm64: dts: qcom: sc7280: add slimbus DT node
arm64: dts: qcom: sc7280: Add capacity and DPC properties
arm64: dts: qcom: pmi632: Add PBS client and use in LPG node
arm64: dts: qcom: sm8550: Use GIC-ITS for PCIe0 and PCIe1
arm64: dts: qcom: sm8150: correct PCIe wake-gpios
arm64: dts: qcom: sdm845-db845c: correct PCIe wake-gpios
arm64: dts: qcom: sm7225-fairphone-fp4: Enable display and GPU
arm64: dts: qcom: sm6350: Remove "disabled" state of GMU
arm64: dts: qcom: msm8916-samsung-fortuna/rossa: Add fuel gauge
arm64: dts: qcom: sm6350: Add interconnect for MDSS
arm64: dts: qcom: msm8916-samsung-fortuna/rossa: Add initial device trees
arm64: dts: qcom: sm8550: Switch UFS from opp-table-hz to opp-v2
arm64: dts: qcom: sc8180x: describe all PCI MSI interrupts
arm64: dts: qcom: minor whitespace cleanup
...
Link: https://lore.kernel.org/r/20240225050146.484422-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Add dt-bindings and interconnect driver support for the Qualcomm SM7150 SoC.
* icc-sm7150
dt-bindings: interconnect: Add Qualcomm SM7150 DT bindings
interconnect: qcom: Add SM7150 driver support
Link: https://lore.kernel.org/r/20240222174250.80493-1-danila@jiaxyga.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
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The Qualcomm SM7150 platform has several bus fabrics that could be
controlled and tuned dynamically according to the bandwidth demand.
Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240222174250.80493-2-danila@jiaxyga.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
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https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt
Samsung DTS ARM64 changes for v6.9
Mostly work around Google GS101 SoC and Pixel phone (Oriole) adding
support for:
1. Multi Core Timer (MCT) clocksource.
2. Several clock controllers (DTS and DT bindings) and use new clocks in
several other device nodes.
3. More serial-interface instances: USI8 and USI12 with I2C.
Exynos850:
1. SPI and DMA controllers (PL330).
* tag 'samsung-dt64-6.9' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: fsd: Add fifosize for UART in Device Tree
arm64: dts: exynos: gs101: minor whitespace cleanup
arm64: dts: exynos: gs101: enable i2c bus 12 on gs101-oriole
arm64: dts: exynos: gs101: define USI12 with I2C configuration
arm64: dts: exynos: gs101: enable cmu-peric1 clock controller
dt-bindings: clock: google,gs101-clock: add PERIC1 clock management unit
arm64: dts: exynos: Add SPI nodes for Exynos850
arm64: dts: exynos: Add PDMA node for Exynos850
arm64: dts: exynos: gs101: use correct clocks for usi_uart
arm64: dts: exynos: gs101: use correct clocks for usi8
arm64: dts: exynos: gs101: sysreg_peric0 needs a clock
arm64: dts: exynos: gs101: enable eeprom on gs101-oriole
arm64: dts: exynos: gs101: define USI8 with I2C configuration
arm64: dts: exynos: gs101: update USI UART to use peric0 clocks
arm64: dts: exynos: gs101: enable cmu-peric0 clock controller
arm64: dts: exynos: gs101: remove reg-io-width from serial
arm64: dts: exynos: gs101: define Multi Core Timer (MCT) node
dt-bindings: clock: exynos850: Add PDMA clocks
dt-bindings: clock: google,gs101-clock: add PERIC0 clock management unit
Link: https://lore.kernel.org/r/20240218182141.31213-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Add binding definition for MIPI DSI Host controller.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Lee Jones <lee@kernel.org>
Reviewed-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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Add PCLK_VO1GRF to complement PCLK_VO0GRF. This will be needed
for HDMI support.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20240126182919.48402-4-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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CLK_NR_CLKS should not be part of the binding. Let's drop it, since
the kernel code no longer uses it either.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20240126182919.48402-3-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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* icc-cleanup
interconnect: qcom: sm8550: Remove bogus per-RSC BCMs and nodes
dt-bindings: interconnect: Remove bogus interconnect nodes
interconnect: qcom: x1e80100: Remove bogus per-RSC BCMs and nodes
interconnect: qcom: sa8775p: constify pointer to qcom_icc_node
interconnect: qcom: sm8250: constify pointer to qcom_icc_node
interconnect: qcom: sm6115: constify pointer to qcom_icc_node
interconnect: qcom: sa8775p: constify pointer to qcom_icc_bcm
interconnect: qcom: x1e80100: constify pointer to qcom_icc_bcm
dt-bindings: interconnect: qcom,rpmh: Fix bouncing @codeaurora address
interconnect: constify of_phandle_args in xlate
Signed-off-by: Georgi Djakov <djakov@kernel.org>
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Document CPU clock management unit compatibles and add corresponding
clock indices. Exynos850 has two CPU clusters (CL0 and CL1), each
containing 4 Cortex-A55 cores. CPU PLLs are generating main CPU clocks
for each cluster, and there are alternate ("switch") clocks that can be
used temporarily while re-configuring the PLL for the new rate. ACLK,
ATCLK, PCLKDBG and PERIPHCLK clocks are driving corresponding buses.
CLK_CLUSTERx_SCLK are actual leaf CPU clocks and should be used to
change CPU rates. Also some CoreSight clocks can be derived from
DBG_USER (debug clock).
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20240224202053.25313-2-semen.protsenko@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Add DT schema bindings for the EyeQ5 clock controller driver.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com>
Link: https://lore.kernel.org/r/20240221-mbly-clk-v7-3-31d4ce3630c3@bootlin.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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Add a definition for the FSI clock.
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240215220759.976998-2-eajames@linux.ibm.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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Add reset constants for using as index in driver and dts.
Value is starting again from 0 because resets are used in another device
than existing constants.
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20240201182409.39878-2-linux@fw-web.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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Add bindings for the reset generator on the SOPHGO SG2042 RISC-V SoC.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Inochi Amaoto <inochiama@outlook.com>
Link: https://lore.kernel.org/r/35c348437b6e18972ccaf90d9c38040caccd1f11.1706577450.git.unicorn_wang@outlook.com
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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Add Qualcomm SM8475/SM8475P/SM8475_2 (cape) SoC IDs.
Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240212201428.87151-2-danila@jiaxyga.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Documentation/process/license-rules.rst and checkpatch expect the SPDX
identifier syntax for multiple licenses to use capital "OR". Correct it
to keep consistent format and avoid copy-paste issues.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240208105327.129159-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Rob Herring <robh@kernel.org>
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According to the R-Car V4H Series Hardware User’s Manual Rev.1.00, the
parent clock of the Pin Function (PFC/GPIO) module clocks is the CP
clock.
Fix this by adding the missing CP clock, and correcting the PFC parents.
Fixes: f2afa78d5a0c0b0b ("dt-bindings: clock: Add r8a779g0 CPG Core Clock Definitions")
Fixes: 36ff366033f0dde1 ("clk: renesas: r8a779g0: Add PFC/GPIO clocks")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/5401fccd204dc90b44f0013e7f53b9eff8df8214.1706197297.git.geert+renesas@glider.be
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Add the compatibles and indexes for the rpmpd in MSM8974, both with the
standard PM8841+PM8941 PMICs but also devices found with PMA8084.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240210-msm8974-rpmpd-v2-1-595e2ff80ea1@z3ntu.xyz
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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clk-for-6.9
Merge the two SC8180X reset defines through a topic branch, to allow
them being picked up in the DeviceTree source tree as well.
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clk-for-6.9
Merge MSM8953 GCC DeviceTree binding update through topic branch, to
allow it to be merged into DeviceTree source tree as well.
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Add dt-schema documentation and clock IDs for the Connectivity
Peripheral 1 (PERIC1) clock management unit.
Signed-off-by: André Draszik <andre.draszik@linaro.org>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20240201161258.1013664-3-andre.draszik@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Merge clock topic branch that introduces the SC8180X CLK_REF enable
clocks.
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Add missing QREF clocks for UFS MEM and UFS CARD controllers.
Fixes: 0fadcdfdcf57 ("dt-bindings: clock: Add SC8180x GCC binding")
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20240131-ufs-phy-clock-v3-3-58a49d2f4605@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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arm64-for-6.9
Merge MSM8953 GCC DeviceTree binding update from topic branch, to get
access to newly introduced MDSS reset constants.
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Add new defines for some more BCRs found on MSM8953.
Signed-off-by: Vladimir Lypak <vladimir.lypak@gmail.com>
[luca: expand commit message, add more resets]
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Link: https://lore.kernel.org/r/20240125-msm8953-mdss-reset-v2-1-fd7824559426@z3ntu.xyz
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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'20240202-x1e80100-clock-controllers-v4-5-7fb08c861c7c@linaro.org' into clk-for-6.9
Merge X1E clock bindings through a topic branch, to make the defines
available for inclusion in DeviceTree branches as well.
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Add bindings documentation for the X1E80100 Camera Clock Controller.
Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20240202-x1e80100-clock-controllers-v4-5-7fb08c861c7c@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Add bindings documentation for the X1E80100 TCSR Clock Controller.
Co-developed-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20240202-x1e80100-clock-controllers-v4-4-7fb08c861c7c@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Add bindings documentation for the X1E80100 Graphics Clock Controller.
Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20240202-x1e80100-clock-controllers-v4-3-7fb08c861c7c@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Add bindings documentation for the X1E80100 Display Clock Controller.
Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20240202-x1e80100-clock-controllers-v4-2-7fb08c861c7c@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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There are 3 undocumented outputs of the MSSPLL that are used for the CAN
bus, "user crypto" module and eMMC. Add their clock IDs so that they can
be hooked up in DT.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
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The downstream kernel has infrastructure for passing votes from different
interconnect nodes onto different RPMh RSCs. This neither implemented, not
is going to be implemented upstream (in favor of a different solution
using ICC tags through the same node).
Unfortunately, as it happens, meaningless (in the upstream context) parts
of the vendor driver were copied, ending up causing havoc - since all
"per-RSC" (in quotes because they all point to the main APPS one) BCMs
defined within the driver overwrite the value in RPMh on every
aggregation.
To both avoid keeping bogus code around and possibly introducing
impossible-to-track-down bugs (busses shutting down for no reason), get
rid of the duplicated ICC node definitions.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240102-topic-x1e_fixes-v1-2-70723e08d5f6@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
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Add bindings for Qualcomm MSM8909 Network-On-Chip interconnect devices.
[Stephan: Drop separate mm-snoc that exists downstream since it's
actually the same NoC as SNoC in hardware]
Signed-off-by: Adam Skladowski <a39.skl@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Stephan Gerhold <stephan.gerhold@kernkonzept.com>
Link: https://lore.kernel.org/r/20231220-icc-msm8909-v2-1-3b68bbed2891@kernkonzept.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
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Add all Clock Pulse Generator Core Clock Outputs for the Renesas R-Car
V4M (R8A779H0) SoC.
Signed-off-by: Duy Nguyen <duy.nguyen.rh@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/11acbd2a30b58607474e9c32eb798b3a00e85e73.1706194617.git.geert+renesas@glider.be
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Add power domain indices for the Renesas R-Car V4M (R8A779H0) SoC.
Signed-off-by: Duy Nguyen <duy.nguyen.rh@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/c5cbef71178cada761e9da7bcbb6f21334f93ef8.1706194617.git.geert+renesas@glider.be
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Add gcc video axic, axi0 and axi1 resets for the global clock controller
on sm8150.
Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240111-sm8150-dfs-support-v2-2-6edb44c83d3b@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Add the ID for the Qualcomm QCM8550 and QCS8550 SoC, QCS8550 is a QCS
version of QCM8550.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
Link: https://lore.kernel.org/r/20240119100621.11788-3-quic_tengfan@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Add constants for Peripheral DMA (PDMA) clocks in CMU_CORE controller:
- PDMA_ACLK: clock for PDMA0 (regular DMA)
- SPDMA_ACLK: clock for PDMA1 (secure DMA)
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20240120012948.8836-2-semen.protsenko@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Add dt-schema documentation for the Connectivity Peripheral 0 (PERIC0)
clock management unit.
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Link: https://lore.kernel.org/r/20240119111132.1290455-2-tudor.ambarus@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine
Pull dmaengine updates from Vinod Koul:
"New support:
- Loongson LS2X APB DMA controller
- sf-pdma: mpfs-pdma support
- Qualcomm X1E80100 GPI dma controller support
Updates:
- Xilinx XDMA updates to support interleaved DMA transfers
- TI PSIL threads for AM62P and J722S and cfg register regions
description
- axi-dmac Improving the cyclic DMA transfers
- Tegra Support dma-channel-mask property
- Remaining platform remove callback returning void conversions
Driver fixes for:
- Xilinx xdma driver operator precedence and initialization fix
- Excess kernel-doc warning fix in imx-sdma xilinx xdma drivers
- format-overflow warning fix for rz-dmac, sh usb dmac drivers
- 'output may be truncated' fix for shdma, fsl-qdma and dw-edma
drivers"
* tag 'dmaengine-fix-6.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: (58 commits)
dmaengine: dw-edma: increase size of 'name' in debugfs code
dmaengine: fsl-qdma: increase size of 'irq_name'
dmaengine: shdma: increase size of 'dev_id'
dmaengine: xilinx: xdma: Fix kernel-doc warnings
dmaengine: usb-dmac: Avoid format-overflow warning
dmaengine: sh: rz-dmac: Avoid format-overflow warning
dmaengine: imx-sdma: fix Excess kernel-doc warnings
dmaengine: xilinx: xdma: Fix initialization location of desc in xdma_channel_isr()
dmaengine: xilinx: xdma: Fix operator precedence in xdma_prep_interleaved_dma()
dmaengine: xilinx: xdma: statify xdma_prep_interleaved_dma
dmaengine: xilinx: xdma: Workaround truncation compilation error
dmaengine: pl330: issue_pending waits until WFP state
dmaengine: xilinx: xdma: Implement interleaved DMA transfers
dmaengine: xilinx: xdma: Prepare the introduction of interleaved DMA transfers
dmaengine: xilinx: xdma: Add transfer error reporting
dmaengine: xilinx: xdma: Add error checking in xdma_channel_isr()
dmaengine: xilinx: xdma: Rework xdma_terminate_all()
dmaengine: xilinx: xdma: Ease dma_pool alignment requirements
dmaengine: xilinx: xdma: Add necessary macro definitions
dmaengine: xilinx: xdma: Get rid of unused code
...
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git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm
Pull pmdomain updates from Ulf Hansson:
"Core:
- Move the generic PM domain and its governor to the pmdomain
subsystem
- Drop the unused pm_genpd_opp_to_performance_state()
Providers:
- Convert some providers to let the ->remove() callback return void
- amlogic: Add support for G12A ISP power domain
- arm: Move the SCPI power-domain driver to the pmdomain subsystem
- arm: Move Kconfig options to the pmdomain subsystem
- qcom: Update part number to X1E80100 for the rpmhpd"
* tag 'pmdomain-v6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm:
PM: domains: Move genpd and its governor to the pmdomain subsystem
PM: domains: Drop redundant header for genpd
PM: domains: Drop the unused pm_genpd_opp_to_performance_state()
PM: domains: fix domain_governor kernel-doc warnings
pmdomain: xilinx/zynqmp: Convert to platform remove callback returning void
pmdomain: qcom-cpr: Convert to platform remove callback returning void
pmdomain: imx93-pd: Convert to platform remove callback returning void
pmdomain: imx93-blk-ctrl: Convert to platform remove callback returning void
pmdomain: imx8mp-blk-ctrl: Convert to platform remove callback returning void
pmdomain: imx8m-blk-ctrl: Convert to platform remove callback returning void
pmdomain: imx-gpcv2: Convert to platform remove callback returning void
pmdomain: imx-gpc: Convert to platform remove callback returning void
pmdomain: imx-pgc: Convert to platform remove callback returning void
pmdomain: amlogic: meson-ee-pwrc: add support for G12A ISP power domain
dt-bindings: power: meson-g12a-power: document ISP power domain
firmware: arm_scpi: Move power-domain driver to the pmdomain dir
pmdomain: arm_scmi: Move Kconfig options to the pmdomain subsystem
pmdomain: qcom: rpmhpd: Update part number to X1E80100
dt-bindings: power: rpmpd: Update part number to X1E80100
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git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"Only a couple new SoCs have support added this time, primarily for
Qualcomm SM8650 based on the diffstat. Otherwise this is a collection
of non-critical fixes and cleanups to various clk drivers and their DT
bindings.
Nothing is changed in the core clk framework this time, although
there's a patch to fix a basic clk type initialization function. In
general, this pile looks to be on the smaller side.
New Drivers:
- Global, display, gpu, tcsr, and rpmh clocks on Qualcomm SM8650
- Mediatek MT7988 SoC clocks
Updates:
- Update Zynqmp driver for Versal NET platforms
- Add clk driver for Versal clocking wizard IP
- Support for stm32mp25 clks
- Add glitch free PLL setting support to si5351 clk driver
- Add DSI clocks on Amlogic g12/sm1
- Add CSI and ISP clocks on Amlogic g12/sm1
- Document bindings for i.MX93 ANATOP clock driver
- Free clk_node in i.MX SCU driver for resource with different owner
- Update the LVDS clocks to be compatible with i.MX SCU firmware 1.15
- Fix the name of the fvco in i.MX pll14xx by renaming it to fout
- Add EtherNet TSN and PCIe clocks on the Renesas R-Car V4H SoC
- Add interrupt controller and Ethernet clocks and resets on Renesas
RZ/G3S
- Check reset monitor registers on Renesas RZ/G2L-alike SoCs
- Reuse reset functionality in the Renesas RZ/G2L clock driver
- Global and RPMh clock support for the Qualcomm X1E80100 SoC
- Support for the Stromer APCS PLL found in Qualcomm IPQ5018
- Add a new type of branch clock, with support for controlling
separate memory control bits, to the Qualcomm clk driver
- Use above new branch type in Qualcomm ECPRI clk driver for QDU1000
and QRU1000
- Add a number of missing clocks related to CSI2 on Qualcomm MSM8939
- Add support for the camera clock controller on Qualcomm SC8280XP
- Correct PLL configuration in GPU and video clock controllers for
Qualcomm SM8150
- Add runtime PM support and a few missing resets to Qualcomm SM8150
video clock controller
- Fix configuration of various GCC GDSCs on Qualcomm SM8550
- Mark shared RCGs appropriately in the Qualcomm SM8550 GCC driver
- Fix up GPU and display clock controllers PLL configuration settings
on Qualcomm SM8550
- Cleanup variable init in Allwinner nkm module
- Convert various DT bindings to YAML
- A few kernel-doc fixes for Samsung SoC clock controllers"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (93 commits)
clk: mediatek: add drivers for MT7988 SoC
clk: mediatek: add pcw_chg_bit control for PLLs of MT7988
dt-bindings: clock: mediatek: add clock controllers of MT7988
dt-bindings: reset: mediatek: add MT7988 ethwarp reset IDs
dt-bindings: clock: mediatek: add MT7988 clock IDs
clk: mediatek: mt8188-topckgen: Refactor parents for top_dp/edp muxes
clk: mediatek: mt8195-topckgen: Refactor parents for top_dp/edp muxes
clk: mediatek: clk-mux: Support custom parent indices for muxes
dt-bindings: clock: sophgo: Add clock controller of CV1800 series SoC
clk: starfive: jh7100: Add CLK_SET_RATE_PARENT to gmac_tx
clk: starfive: Add flags argument to JH71X0__MUX macro
clk: imx: pll14xx: change naming of fvco to fout
clk: imx: clk-imx8qxp: fix LVDS bypass, pixel and phy clocks
clk: imx: scu: Fix memory leak in __imx_clk_gpr_scu()
clk: fixed-rate: fix clk_hw_register_fixed_rate_with_accuracy_parent_hw
clk: qcom: dispcc-sm8650: Add test_ctl parameters to PLL config
clk: qcom: gpucc-sm8650: Add test_ctl parameters to PLL config
clk: qcom: dispcc-sm8550: Use the correct PLL configuration function
clk: qcom: dispcc-sm8550: Update disp PLL settings
clk: qcom: gpucc-sm8550: Update GPU PLL settings
...
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