| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2017-05-19 | drm/pl111: Register the clock divider and use it. | Eric Anholt | |
| This is required for the panel to work on bcm911360, where CLCDCLK is the fixed 200Mhz AXI41 clock. The rate set is still passed up to the CLCDCLK, for platforms that have a settable rate on that one. v2: Set SET_RATE_PARENT (caught by Linus Walleij), depend on COMMON_CLK. v3: Mark the clk_ops static (caught by Stephen). Signed-off-by: Eric Anholt <eric@anholt.net> Link: http://patchwork.freedesktop.org/patch/msgid/20170508193348.30236-1-eric@anholt.net Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> | |||
| 2017-05-08 | video: ARM CLCD: Move registers to a separate header. | Eric Anholt | |
| We'd like to reuse these register definitions for the DRM CLCD driver, but there's a bunch of fbdev-specific code in the current header. v2: Add #ifndef guard. Signed-off-by: Eric Anholt <eric@anholt.net> Link: http://patchwork.freedesktop.org/patch/msgid/20170413031746.12921-1-eric@anholt.net | |||
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index : linux-arm.git | |
| Russell King's ARM Linux kernel tree | Russell King |
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