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path: root/include/linux/clk/at91_pmc.h
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2015-04-11clk: at91: change to using endian agnositc IOBen Dooks
Change to using endian agnostic _relaxed IO accessors instead of __raw Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> -- CC: Andrew Victor <linux@maxim.org.za> CC: Nicolas Ferre <nicolas.ferre@atmel.com> CC: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com> CC: Mike Turquette <mturquette@linaro.org> (maintainer:COMMON CLK FRAMEWORK) CC: Stephen Boyd <sboyd@codeaurora.org> (maintainer:COMMON CLK FRAMEWORK) CC: linux-kernel@vger.kernel.org (open list:COMMON CLK FRAMEWORK) Signed-off-by: Michael Turquette <mturquette@linaro.org>
2014-09-22clk: at91: add a driver for the h32mx clockAlexandre Belloni
Newer SoCs have two different AHB interconnect. The AHB 32 bits Matrix interconnect (h32mx) has a clock that can be setup at the half of the h64mx clock (which is mck). The h32mx clock can not exceed 90 MHz. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-05-07clk: at91: add slow clks driverBoris BREZILLON
AT91 slow clk is a clk multiplexer. In some SoCs (sam9x5, sama5, sam9g45 families) this multiplexer can choose among 2 sources: an internal RC oscillator circuit and an oscillator using an external crystal. In other Socs (sam9260 family) the multiplexer source is hardcoded with the OSCSEL signal. Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-12-02clk: at91: add PMC pll clocksBoris BREZILLON
This patch adds new at91 pll clock implementation using common clk framework. The pll clock layout describe the PLLX register layout. There are four pll clock layouts: - at91rm9200 - at91sam9g20 - at91sam9g45 - sama5d3 PLL clocks are given characteristics: - min/max clock source rate - ranges of valid clock output rates - values to set in out and icpll fields for each supported output range These characteristics are checked during rate change to avoid over/underclocking. These characteristics are described in atmel's SoC datasheet in "Electrical Characteristics" paragraph. Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-12-02ARM: at91: move at91_pmc.h to include/linux/clk/at91_pmc.hBoris BREZILLON
This patch moves at91_pmc.h header from machine specific directory (arch/arm/mach-at91/include/mach/at91_pmc.h) to clk include directory (include/linux/clk/at91_pmc.h). We need this to avoid reference to machine specific headers in clk drivers. Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com> Acked-by: Felipe Balbi <balbi@ti.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>