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2017-10-25locking/atomics: COCCINELLE/treewide: Convert trivial ACCESS_ONCE() patterns ↵Mark Rutland
to READ_ONCE()/WRITE_ONCE() Please do not apply this to mainline directly, instead please re-run the coccinelle script shown below and apply its output. For several reasons, it is desirable to use {READ,WRITE}_ONCE() in preference to ACCESS_ONCE(), and new code is expected to use one of the former. So far, there's been no reason to change most existing uses of ACCESS_ONCE(), as these aren't harmful, and changing them results in churn. However, for some features, the read/write distinction is critical to correct operation. To distinguish these cases, separate read/write accessors must be used. This patch migrates (most) remaining ACCESS_ONCE() instances to {READ,WRITE}_ONCE(), using the following coccinelle script: ---- // Convert trivial ACCESS_ONCE() uses to equivalent READ_ONCE() and // WRITE_ONCE() // $ make coccicheck COCCI=/home/mark/once.cocci SPFLAGS="--include-headers" MODE=patch virtual patch @ depends on patch @ expression E1, E2; @@ - ACCESS_ONCE(E1) = E2 + WRITE_ONCE(E1, E2) @ depends on patch @ expression E; @@ - ACCESS_ONCE(E) + READ_ONCE(E) ---- Signed-off-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: davem@davemloft.net Cc: linux-arch@vger.kernel.org Cc: mpe@ellerman.id.au Cc: shuah@kernel.org Cc: snitzer@redhat.com Cc: thor.thayer@linux.intel.com Cc: tj@kernel.org Cc: viro@zeniv.linux.org.uk Cc: will.deacon@arm.com Link: http://lkml.kernel.org/r/1508792849-3115-19-git-send-email-paulmck@linux.vnet.ibm.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-08-23ALSA: fireface: Use common error handling code in pcm_open()Markus Elfring
Add a jump target so that a bit of exception handling can be better reused at the end of this function. This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Reviewed-by: Takashi Sakamoto <o-takashi@sakamocchi.jp> Signed-off-by: Takashi Iwai <tiwai@suse.de>
2017-08-22ALSA: firewire: add const qualifier to identifiers for read-only symbolsTakashi Sakamoto
Drivers in ALSA firewire stack still includes some symbols which can be moved to a section for read-only symbols. Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp> Signed-off-by: Takashi Iwai <tiwai@suse.de>
2017-06-08ALSA: firewire: arrange common PCM info/constraints for AMDTP engine ↵Takashi Sakamoto
applications In ALSA firewire stack, 8 drivers uses IEC 61883-1/6 engine for data transmission. They have common PCM info/constraints and duplicated codes. This commit unifies the codes into fireiwre-lib. Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp> Signed-off-by: Takashi Iwai <tiwai@suse.de>
2017-06-07ALSA: fireface: constify ALSA specific operationsTakashi Sakamoto
ALSA fireface driver has ALSA specific operations for MIDI/PCM data. Structured data for the operations can be constified. Additionally, The structured data can be function local. Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp> Signed-off-by: Takashi Iwai <tiwai@suse.de>
2017-06-07ALSA: firewire: process packets in 'struct snd_pcm_ops.ack' callbackTakashi Sakamoto
In recent commit for ALSA PCM core, some arrangement is done for 'struct snd_pcm_ops.ack' callback. This is called when appl_ptr is explicitly moved in intermediate buffer for PCM frames, except for some cases described later. For drivers in ALSA firewire stack, usage of this callback has a merit to reduce latency between time of PCM frame queueing and handling actual packets in recent isochronous cycle, because no need to wait for software IRQ context from isochronous context of OHCI 1394. If this works well in a case that mapped page frame is used for the intermediate buffer, user process should execute some commands for ioctl(2) to tell the number of handled PCM frames in the intermediate buffer just after handling them. Therefore, at present, with a combination of below conditions, this doesn't work as expected and user process should wait for the software IRQ context as usual: - when ALSA PCM core judges page frame mapping is available for status data (struct snd_pcm_mmap_status) and control data (struct snd_pcm_mmap_control). - user process handles PCM frames by loop just with 'snd_pcm_mmap_begin()' and 'snd_pcm_mmap_commit()'. - user process uses PCM hw plugin in alsa-lib to operate I/O without 'sync_ptr_ioctl' option. Unfortunately, major use case include these three conditions. Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp> Signed-off-by: Takashi Iwai <tiwai@suse.de>
2017-04-20ALSA: fireface: obsolete usage of ktime_set() for zero assignmentTakashi Sakamoto
In development period for Linux v4.10, ktime_t became an alias of s64, instead of union. I forgot it. We can just assign zero, instead of usage of ktime_set(0, 0). Fixes: 19174295788 ("ALSA: fireface: add transaction support") Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp> Signed-off-by: Takashi Iwai <tiwai@suse.de>
2017-04-05ALSA: fireface: add support for Fireface 400Takashi Sakamoto
Fireface 400 is a second model of RME Fireface series, released in 2006. This commit adds support for this model. This model supports 8 analog channels, 2 S/PDIF channels and 8 ADAT channels in both of tx/rx packet. The number of ADAT channels differs depending on each mode of sampling transmission frequency. $ python2 linux-firewire-utils/src/crpp < /sys/bus/firewire/devices/fw1/config_rom ROM header and bus information block ----------------------------------------------------------------- 400 04107768 bus_info_length 4, crc_length 16, crc 30568 (should be 61311) 404 31333934 bus_name "1394" 408 20009002 irmc 0, cmc 0, isc 1, bmc 0, cyc_clk_acc 0, max_rec 9 (1024) 40c 000a3501 company_id 000a35 | 410 1bd0862a device_id 011bd0862a | EUI-64 000a35011bd0862a root directory ----------------------------------------------------------------- 414 000485ec directory_length 4, crc 34284 418 03000a35 vendor 41c 0c0083c0 node capabilities per IEEE 1394 420 8d000006 --> eui-64 leaf at 438 424 d1000001 --> unit directory at 428 unit directory at 428 ----------------------------------------------------------------- 428 000314c4 directory_length 3, crc 5316 42c 12000a35 specifier id 430 13000002 version 434 17101800 model eui-64 leaf at 438 ----------------------------------------------------------------- 438 000261a8 leaf_length 2, crc 25000 43c 000a3501 company_id 000a35 | 440 1bd0862a device_id 011bd0862a | EUI-64 000a35011bd0862a Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp> Signed-off-by: Takashi Iwai <tiwai@suse.de>
2017-04-05ALSA: fireface: add hwdep interfaceTakashi Sakamoto
This commit adds hwdep interface so as the other drivers for audio and music units on IEEE 1394 have. This interface is designed for mixer/control applications. By using this interface, an application can get information about firewire node, can lock/unlock kernel streaming and can get notification at starting/stopping kernel streaming. Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp> Signed-off-by: Takashi Iwai <tiwai@suse.de>
2017-04-05ALSA: fireface: add support for PCM functionalityTakashi Sakamoto
This commit adds PCM functionality to transmit/receive PCM frames on isochronous packet streaming. This commit enables userspace applications to start/stop packet streaming via ALSA PCM interface. Sampling rate requested by applications is used as sampling transmission frequency of IEC 61883-1/6packet streaming. As I described in followed commits, units in this series manages sampling clock frequency independently of sampling transmission frequency, and they supports resampling between their packet streaming/data block processing layer and sampling data processing layer. This commit take this driver to utilize these features for usability. When internal clock is selected as source signal of sampling clock, this driver allows user space applications to start PCM substreams at any rate which packet streaming engine supports as sampling transmission frequency. In this case, this driver expects units to perform resampling PCM frames for rx/tx packets when sampling clock frequency and sampling transmission frequency are mismatched. This is for daily use cases. When any external clock is selected as the source signal, this driver gets configured sampling rate from units, then restricts available sampling rate to the rate for PCM applications. This is for studio use cases. Models in this series supports 64.0/128.0 kHz of sampling rate, however these frequencies are not supported by IEC 61883-6 as sampling transmission frequency. Therefore, packet streaming engine of ALSA firewire stack can't handle them. When units are configured to use any external clock as source signal of sampling clock and one of these unsupported rate is configured as rate of the sampling clock, this driver returns EIO to user space applications. Anyway, this driver doesn't voluntarily configure parameters of sampling clock. It's better for users to work with appropriate user space implementations to configure the parameters in advance of usage. Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp> Signed-off-by: Takashi Iwai <tiwai@suse.de>
2017-04-05ALSA: fireface: add stream management functionalityTakashi Sakamoto
This commit adds management functionality for packet streaming. As long as investigating Fireface 400, there're three modes depending on sampling transmission frequency. The number of data channels in each data block is different depending on the mode. The set of available data channels for each mode might be different for each protocol and model. The length of registers for the number of isochronous channel is just three bits, therefore 0-7ch are available. When bus reset occurs on IEEE 1394 bus, the device discontinues to transmit packets. This commit aborts PCM substreams at bus reset handler. As I described in followed commits, The device manages its sampling clock independently of sampling transmission frequency against IEC 61883-6. Thus, it's a lower cost to change the sampling transmission frequency, while data fetch between streaming layer and DSP require larger buffer for resampling. As a result, device latency might tend to be larger than ASICs for IEC 61883-1/6 such as DM1000/DM1100/DM1500 (BeBoB), DiceII/TCD2210/TCD2220/TCD3070 and OXFW970/971. Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp> Signed-off-by: Takashi Iwai <tiwai@suse.de>
2017-04-05ALSA: fireface: add unique data processing layerTakashi Sakamoto
As long as investigating Fireface 400, format of payload of each isochronous packet is not IEC 61883-1/6, thus its format of data block is not AM824. The remarkable points of the format are: * The payload just consists of some data channels of quadlet size without CIP header. * Each data channels includes data aligned to little endian order. * One data channel consists of two parts; 8 bit ancillary field and 24 bit PCM frame. Due to lack of CIP headers, rx/tx packets include no CIP headers and different way to check packet discontinuity. For tx packet, the ancillary field is used for counter. However, the way of counting is different depending on positions of data channels. At 44.1 kHz, ancillary field in: * 1st/6th/9th/10th/14th/17th data channels: not used for this purpose. * 2nd/18th data channels: incremented every data block (0x00-0xff). * 3rd/4th/5th/11th/12th/13th data channels: incremented every 256 data blocks (0x00-0x07). * 7th/8th/15th/16th data channels: incremented per the number of data blocks in a packet. The increment can occur per packet (0x00-0xff). For tx packet, tag of each isochronous packet is used for this purpose. The value of tag cyclically changes between 0, 1, 2 and 3 in this order. The interval is different depending on sampling transmission frequency. At 44.1/48.0 kHz, it's 256 data blocks. At 88.2 kHz, it's 96 data blocks. The number of data blocks in tx packet is exactly the same as SYT_INTERVAL. There's no empty packet or no-data packet, thus the throughput is not 8,000 packets per sec. On the other hand, the one in rx packet is 8,000 packets per sec, thus the number of data blocks is different between each packet, depending on sampling transmission frequency: * 44.1 kHz: 5 or 6 * 48.0 kHz: 5 or 6 or 7 * 88.2 kHz: 10 or 11 or 12 This commit adds data processing layer to satisfy the above specification in a policy of 'best effort'. Although PCM frames are handled for intermediate buffer to user space, the ancillary data is not handled at all to reduce CPU usage, thus counter is not checked. 0 is always used for tag of isochronous packet. Furthermore, the packet streaming layer is responsible for calculation of the number of data blocks for each packet, thus it's not exactly the same sequence from the above observation. Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp> Signed-off-by: Takashi Iwai <tiwai@suse.de>
2017-04-05ALSA: fireface: add proc node to help debuggingTakashi Sakamoto
Drivers can retrieve the state and configuration of clock by read transactions. This commit allows protocol abstraction layer to to dump the information for debugging, via proc interface. Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp> Signed-off-by: Takashi Iwai <tiwai@suse.de>
2017-04-05ALSA: fireface: add support for MIDI functionalityTakashi Sakamoto
In previous commit, fireface driver supports unique transaction mechanism for MIDI feature. This commit adds MIDI functionality for userspace applications. As I wrote in a followed commit, user space applications get some requirement from this driver. It should not touch a register to which units transmit MIDI messages. It should configure a register in which MIDI transmission is controlled. Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp> Signed-off-by: Takashi Iwai <tiwai@suse.de>
2017-04-05ALSA: fireface: add transaction supportTakashi Sakamoto
As long as investigating Fireface 400, MIDI messages are transferred by asynchronous communication over IEEE 1394 bus. Fireface 400 receives MIDI messages by write transactions to two addresses; 0x'0000'0801'8000 and 0x'0000'0801'9000. Each of two seems to correspond to MIDI port 1 and 2. Fireface 400 transfers MIDI messages by write transactions to certain addresses which configured by drivers. The drivers can decide upper 4 byte of the addresses by write transactions to 0x'0000'0801'03f4. For the rest part of the address, drivers can select from below options: * 0x'0000'0000 * 0x'0000'0080 * 0x'0000'0100 * 0x'0000'0180 Selected options are represented in register 0x'0000'0801'051c as bit flags. Due to this mechanism, drivers are restricted to use addresses on 'Memory space' of IEEE 1222, even if transactions to the address have some side effects. This commit adds transaction support for MIDI messaging, based on my assumption that the similar mechanism is used on the other protocols. To receive asynchronous transactions, the driver allocates a range of address in 'Memory space'. I apply a strategy to use 0x'0000'0000 as lower 4 byte of the address. When getting failure from Linux FireWire subsystem, this driver retries to allocate addresses. Unfortunately, read transaction to address 0x'0000'0801'051c returns zero always, however write transactions have effects to the other features such as status of sampling clock. For this reason, this commit delegates a task to configure this register to user space applications. The applications should set 3rd bit in LSB in little endian order. Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp> Signed-off-by: Takashi Iwai <tiwai@suse.de>
2017-04-05ALSA: fireface: add an abstraction layer for model-specific protocolsTakashi Sakamoto
As of 2016, RME discontinued its Fireface series, thus it's OK for us to focus on released firmwares to drive known units. As long as investigating Fireface 400 with Windows driver and comparing the result to FFADO implementation, I can see these firmwares have different register assignments. On the other hand, according to manuals of each models, features relevant to packet streaming seem to be common, because GUIs for these models have the same options. It's reasonable to assume an abstraction layer of protocols to communicate to each models. This commit adds the abstraction layer for the protocols. This layer includes some functions to operate common features of models in this series. In IEC 61883-1/6, the sequence of packet can transfer timing information to synchronize receivers to transmitters. Units of each node on IEEE 1394 bus can generate transmitter's timing clock by handling value of SYT field in CIP header with high-precision clock. For audio and music units on IEEE 1394 bus, this recovered clock is designed to used for sampling clock to capture/generate PCM frames on DSP/ADC/DAC. (Actually, in this world, there's no units to implement this specification as is, as long as I know). Fireface series doesn't use this mechanism. Besides, It doesn't use isochronous packet with CIP header. It uses internal crystal unit as its initial sampling clock. When detecting input signals which can be available for sampling clock (e.g. ADAT input), drivers can configure units to use the signals as source of sampling clock. When something goes wrong, e.g. frequency mismatching between the signal and configured value, units fallback to the other detected signals alternatively. When detecting no alternatives, internal crystal unit is used as source of sampling clock. On manual of Fireface 400, this mechanism is described as 'Autosync'. On the units, packet streaming is controlled by write transactions to certain registers. Format of the packet, e.g. the number of data channels in a data block, is also configured by the same manner. For this purpose, .begin_session and .finish_session is added. The remarkable point of this protocol is to allow drivers to configure arbitrary sampling transmission frequency; e.g. 12.345 Hz. As long as I know, there's no actual DAC/ADC chips which support this kind of capability. I think a pair of packet streaming layer and data block processing layer is isolated from sampling data processing layer in a point of governed clock. In short, between these parts, resampling layer exists. Actually, for Fireface 400, write transactions to 0x'0000'8010'051c has an effect to change sampling clock frequency with base frequencies (32.0/44.1/48.0 kHz) and its multipliers (x2/x4), regardless of sampling transmission frequency. For this reason, the abstraction layer doesn't handle parameters for sampling clock. Instead, each implementation of .begin_session is expected to configure sampling transmission frequency. For packet streaming layer, it's enough to get current selection of source signals for the sampling clock and its frequency. In the abstraction layer, when internal crystal is selected, drivers can sets arbitrary sampling frequency, else they should follow configured frequency. For this purpose, .get_clock is added. Drivers are allows to bank up data fetching from a pair of packet streaming/data block processing layer and sampling data processing layer. This feature seems to suppress noises at starting/stopping packet streaming. For this purpose, .switch_fetching_mode is added. As I described in the above, units have remarkable mechanism to manage sampling clock and process sampling data. For debugging purpose, .dump_sync_status and .dump_clock_config are added. I don't have a need to common interface to represent the status and configuration, developers can add actual implementation of the abstraction layer as they like. Unlike PCM frames, MIDI messages are transferred by asynchronous communication over IEEE 1394 bus, thus target addresses are important for this feature. The .midi_high_addr_reg, .midi_rx_port_0_reg and .midi_rx_port_1_reg are for this purpose. I'll describe them in following commit. Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp> Signed-off-by: Takashi Iwai <tiwai@suse.de>
2017-04-05ALSA: fireface: add model specific structureTakashi Sakamoto
RME Fireface series has several models and their specifications are different. Currently, we find no way to retrieve the specifications from actual devices and need to implement them in this driver. This commit adds a structure to describe model specific data. This structure has an identical name for each unit, and maximum number of data channels in each mode. I'll describe about the mode in following commits. Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp> Signed-off-by: Takashi Iwai <tiwai@suse.de>
2017-04-05ALSA: fireface: postpone sound card registrationTakashi Sakamoto
Just after appearing on IEEE 1394 bus, this unit generates several bus resets. This is due to loading firmware from on-board flash memory and initialize hardware. It's better to postpone sound card registration. This commit schedules workqueue to process actual probe processing 2 seconds after the last bus-reset. The card instance is kept at unit probe callback and released at card free callback. Therefore, when the actual probe processing fails, the memory block is wasted. This is due to simplify driver implementation. Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp> Signed-off-by: Takashi Iwai <tiwai@suse.de>
2017-04-05ALSA: fireface: add skeleton for RME Fireface seriesTakashi Sakamoto
This commit adds a new driver for RME Fireface series. This commit just creates/removes card instance according to IEEE 1394 bus event. More functions will be added in following commits. Three types of firmware have released by RME GmbH; for Fireface 400, for Fireface 800 and for UCX/802/UFX. It's reasonable that these models use different protocol for communication. Currently, I've investigated Fireface 400 and nothing others. Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp> Signed-off-by: Takashi Iwai <tiwai@suse.de>