From 28dcfba1a0d622b0330ae3f4a9d7c7f2c245de7a Mon Sep 17 00:00:00 2001 From: Sergio Paracuellos Date: Sat, 8 May 2021 09:09:28 +0200 Subject: phy: ralink: Kconfig: enable COMPILE_TEST on mt7621-pci-phy driver After use the clock apis and avoid custom architecture code this driver can properly be enabled for COMPILE_TEST. Signed-off-by: Sergio Paracuellos Link: https://lore.kernel.org/r/20210508070930.5290-5-sergio.paracuellos@gmail.com Signed-off-by: Vinod Koul --- drivers/phy/ralink/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/phy/ralink/Kconfig b/drivers/phy/ralink/Kconfig index ecc309ba9fee..c2373b30b8a6 100644 --- a/drivers/phy/ralink/Kconfig +++ b/drivers/phy/ralink/Kconfig @@ -4,7 +4,7 @@ # config PHY_MT7621_PCI tristate "MediaTek MT7621 PCI PHY Driver" - depends on RALINK && OF + depends on (RALINK && OF) || COMPILE_TEST select GENERIC_PHY select REGMAP_MMIO help -- cgit