From 2f8ba037c45925b372194df4bc27fca85fbeeffb Mon Sep 17 00:00:00 2001 From: Dinh Nguyen Date: Wed, 25 Jan 2023 14:07:00 -0600 Subject: arm64: dts: socfpga: change address-cells to support 64-bit addressing Update the address-cells and size-cells to 2 in order to support 64-bit addressing. Signed-off-by: Dinh Nguyen --- arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 5 ++--- arch/arm64/boot/dts/intel/socfpga_agilex.dtsi | 4 ++-- 2 files changed, 4 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi index b488e8d185f3..41c9eb51d0ee 100644 --- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi @@ -134,9 +134,8 @@ ranges = <0 0 0 0xffffffff>; base_fpga_region { - #address-cells = <0x1>; - #size-cells = <0x1>; - + #address-cells = <0x2>; + #size-cells = <0x2>; compatible = "fpga-region"; fpga-mgr = <&fpga_mgr>; }; diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi index f22302a19796..f9674cc46764 100644 --- a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi +++ b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi @@ -139,8 +139,8 @@ ranges = <0 0 0 0xffffffff>; base_fpga_region { - #address-cells = <0x1>; - #size-cells = <0x1>; + #address-cells = <0x2>; + #size-cells = <0x2>; compatible = "fpga-region"; fpga-mgr = <&fpga_mgr>; }; -- cgit