From 39319cac50a28ea8801710148024186472d2cf08 Mon Sep 17 00:00:00 2001 From: Pali Rohár Date: Thu, 18 Aug 2022 01:00:36 +0200 Subject: ARM: dts: dove: Add definitions for PCIe error interrupts MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit First PCIe controller on Dove SoC reports error interrupt via IRQ 15 and second PCIe controller via IRQ 17. Signed-off-by: Pali Rohár Reviewed-by: Andrew Lunn Signed-off-by: Gregory CLEMENT --- arch/arm/boot/dts/dove.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi index 96ba47c061a7..00a36fba2fd2 100644 --- a/arch/arm/boot/dts/dove.dtsi +++ b/arch/arm/boot/dts/dove.dtsi @@ -122,8 +122,8 @@ bus-range = <0x00 0xff>; #interrupt-cells = <1>; - interrupt-names = "intx"; - interrupts = <16>; + interrupt-names = "intx", "error"; + interrupts = <16>, <15>; interrupt-map-mask = <0 0 0 7>; interrupt-map = <0 0 0 1 &pcie0_intc 0>, <0 0 0 2 &pcie0_intc 1>, @@ -151,8 +151,8 @@ bus-range = <0x00 0xff>; #interrupt-cells = <1>; - interrupt-names = "intx"; - interrupts = <18>; + interrupt-names = "intx", "error"; + interrupts = <18>, <17>; interrupt-map-mask = <0 0 0 7>; interrupt-map = <0 0 0 1 &pcie1_intc 0>, <0 0 0 2 &pcie1_intc 1>, -- cgit