From 638c885185dc2e2b17e59bfe8e9d27b18ed8fade Mon Sep 17 00:00:00 2001 From: Paul Burton Date: Sun, 24 May 2015 16:11:23 +0100 Subject: MIPS: JZ4740: register an irq_domain for the interrupt controller When probing the interrupt controller, register an IRQ domain such that the interrupts can be translated by devicetree code & thus used from devicetree. Signed-off-by: Paul Burton Cc: Lars-Peter Clausen Cc: Thomas Gleixner Cc: Jason Cooper Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: Brian Norris Patchwork: https://patchwork.linux-mips.org/patch/10140/ Signed-off-by: Ralf Baechle --- arch/mips/jz4740/irq.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/mips/jz4740/irq.c b/arch/mips/jz4740/irq.c index ed5191569b95..ddcf78a24e5b 100644 --- a/arch/mips/jz4740/irq.c +++ b/arch/mips/jz4740/irq.c @@ -85,6 +85,7 @@ static int __init jz4740_intc_of_init(struct device_node *node, { struct irq_chip_generic *gc; struct irq_chip_type *ct; + struct irq_domain *domain; int parent_irq; parent_irq = irq_of_parse_and_map(node, 0); @@ -113,6 +114,11 @@ static int __init jz4740_intc_of_init(struct device_node *node, irq_setup_generic_chip(gc, IRQ_MSK(32), 0, 0, IRQ_NOPROBE | IRQ_LEVEL); + domain = irq_domain_add_legacy(node, num_chips * 32, JZ4740_IRQ_BASE, 0, + &irq_domain_simple_ops, NULL); + if (!domain) + pr_warn("unable to register IRQ domain\n"); + setup_irq(parent_irq, &jz4740_cascade_action); return 0; } -- cgit