From 7b43b8fdc9a6283c0b9405542c4406cfa1e5689a Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Mon, 3 Jun 2019 17:12:32 +0900 Subject: memory: move jedec_ddr_data.c from lib/ to drivers/memory/ jedec_ddr_data.c exports 3 symbols, and all of them are only referenced from drivers/memory/{emif.c,of_memory.c} drivers/memory/ is a better location than lib/. I removed the Kconfig prompt "JEDEC DDR data" because it is only select'ed by TI_EMIF, and there is no other user. There is no good reason in making it a user-configurable CONFIG option. Signed-off-by: Masahiro Yamada Signed-off-by: Olof Johansson --- drivers/memory/Kconfig | 8 +++ drivers/memory/Makefile | 1 + drivers/memory/jedec_ddr_data.c | 135 ++++++++++++++++++++++++++++++++++++++++ lib/Kconfig | 8 --- lib/Makefile | 2 - lib/jedec_ddr_data.c | 135 ---------------------------------------- 6 files changed, 144 insertions(+), 145 deletions(-) create mode 100644 drivers/memory/jedec_ddr_data.c delete mode 100644 lib/jedec_ddr_data.c diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig index 392ad4f5c570..477f0f130e5b 100644 --- a/drivers/memory/Kconfig +++ b/drivers/memory/Kconfig @@ -8,6 +8,14 @@ menuconfig MEMORY if MEMORY +config DDR + bool + help + Data from JEDEC specs for DDR SDRAM memories, + particularly the AC timing parameters and addressing + information. This data is useful for drivers handling + DDR SDRAM controllers. + config ARM_PL172_MPMC tristate "ARM PL172 MPMC driver" depends on ARM_AMBA && OF diff --git a/drivers/memory/Makefile b/drivers/memory/Makefile index 91ae4eb0e913..9d5c409a1591 100644 --- a/drivers/memory/Makefile +++ b/drivers/memory/Makefile @@ -3,6 +3,7 @@ # Makefile for memory devices # +obj-$(CONFIG_DDR) += jedec_ddr_data.o ifeq ($(CONFIG_DDR),y) obj-$(CONFIG_OF) += of_memory.o endif diff --git a/drivers/memory/jedec_ddr_data.c b/drivers/memory/jedec_ddr_data.c new file mode 100644 index 000000000000..6d2cbf1d567f --- /dev/null +++ b/drivers/memory/jedec_ddr_data.c @@ -0,0 +1,135 @@ +/* + * DDR addressing details and AC timing parameters from JEDEC specs + * + * Copyright (C) 2012 Texas Instruments, Inc. + * + * Aneesh V + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include + +/* LPDDR2 addressing details from JESD209-2 section 2.4 */ +const struct lpddr2_addressing + lpddr2_jedec_addressing_table[NUM_DDR_ADDR_TABLE_ENTRIES] = { + {B4, T_REFI_15_6, T_RFC_90}, /* 64M */ + {B4, T_REFI_15_6, T_RFC_90}, /* 128M */ + {B4, T_REFI_7_8, T_RFC_90}, /* 256M */ + {B4, T_REFI_7_8, T_RFC_90}, /* 512M */ + {B8, T_REFI_7_8, T_RFC_130}, /* 1GS4 */ + {B8, T_REFI_3_9, T_RFC_130}, /* 2GS4 */ + {B8, T_REFI_3_9, T_RFC_130}, /* 4G */ + {B8, T_REFI_3_9, T_RFC_210}, /* 8G */ + {B4, T_REFI_7_8, T_RFC_130}, /* 1GS2 */ + {B4, T_REFI_3_9, T_RFC_130}, /* 2GS2 */ +}; +EXPORT_SYMBOL_GPL(lpddr2_jedec_addressing_table); + +/* LPDDR2 AC timing parameters from JESD209-2 section 12 */ +const struct lpddr2_timings + lpddr2_jedec_timings[NUM_DDR_TIMING_TABLE_ENTRIES] = { + /* Speed bin 400(200 MHz) */ + [0] = { + .max_freq = 200000000, + .min_freq = 10000000, + .tRPab = 21000, + .tRCD = 18000, + .tWR = 15000, + .tRAS_min = 42000, + .tRRD = 10000, + .tWTR = 10000, + .tXP = 7500, + .tRTP = 7500, + .tCKESR = 15000, + .tDQSCK_max = 5500, + .tFAW = 50000, + .tZQCS = 90000, + .tZQCL = 360000, + .tZQinit = 1000000, + .tRAS_max_ns = 70000, + .tDQSCK_max_derated = 6000, + }, + /* Speed bin 533(266 MHz) */ + [1] = { + .max_freq = 266666666, + .min_freq = 10000000, + .tRPab = 21000, + .tRCD = 18000, + .tWR = 15000, + .tRAS_min = 42000, + .tRRD = 10000, + .tWTR = 7500, + .tXP = 7500, + .tRTP = 7500, + .tCKESR = 15000, + .tDQSCK_max = 5500, + .tFAW = 50000, + .tZQCS = 90000, + .tZQCL = 360000, + .tZQinit = 1000000, + .tRAS_max_ns = 70000, + .tDQSCK_max_derated = 6000, + }, + /* Speed bin 800(400 MHz) */ + [2] = { + .max_freq = 400000000, + .min_freq = 10000000, + .tRPab = 21000, + .tRCD = 18000, + .tWR = 15000, + .tRAS_min = 42000, + .tRRD = 10000, + .tWTR = 7500, + .tXP = 7500, + .tRTP = 7500, + .tCKESR = 15000, + .tDQSCK_max = 5500, + .tFAW = 50000, + .tZQCS = 90000, + .tZQCL = 360000, + .tZQinit = 1000000, + .tRAS_max_ns = 70000, + .tDQSCK_max_derated = 6000, + }, + /* Speed bin 1066(533 MHz) */ + [3] = { + .max_freq = 533333333, + .min_freq = 10000000, + .tRPab = 21000, + .tRCD = 18000, + .tWR = 15000, + .tRAS_min = 42000, + .tRRD = 10000, + .tWTR = 7500, + .tXP = 7500, + .tRTP = 7500, + .tCKESR = 15000, + .tDQSCK_max = 5500, + .tFAW = 50000, + .tZQCS = 90000, + .tZQCL = 360000, + .tZQinit = 1000000, + .tRAS_max_ns = 70000, + .tDQSCK_max_derated = 5620, + }, +}; +EXPORT_SYMBOL_GPL(lpddr2_jedec_timings); + +const struct lpddr2_min_tck lpddr2_jedec_min_tck = { + .tRPab = 3, + .tRCD = 3, + .tWR = 3, + .tRASmin = 3, + .tRRD = 2, + .tWTR = 2, + .tXP = 2, + .tRTP = 2, + .tCKE = 3, + .tCKESR = 3, + .tFAW = 8 +}; +EXPORT_SYMBOL_GPL(lpddr2_jedec_min_tck); diff --git a/lib/Kconfig b/lib/Kconfig index 90623a0e1942..e09b3e081a53 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -531,14 +531,6 @@ config LRU_CACHE config CLZ_TAB bool -config DDR - bool "JEDEC DDR data" - help - Data from JEDEC specs for DDR SDRAM memories, - particularly the AC timing parameters and addressing - information. This data is useful for drivers handling - DDR SDRAM controllers. - config IRQ_POLL bool "IRQ polling library" help diff --git a/lib/Makefile b/lib/Makefile index fb7697031a79..cb66bc9c5b2f 100644 --- a/lib/Makefile +++ b/lib/Makefile @@ -206,8 +206,6 @@ obj-$(CONFIG_SIGNATURE) += digsig.o lib-$(CONFIG_CLZ_TAB) += clz_tab.o -obj-$(CONFIG_DDR) += jedec_ddr_data.o - obj-$(CONFIG_GENERIC_STRNCPY_FROM_USER) += strncpy_from_user.o obj-$(CONFIG_GENERIC_STRNLEN_USER) += strnlen_user.o diff --git a/lib/jedec_ddr_data.c b/lib/jedec_ddr_data.c deleted file mode 100644 index 6d2cbf1d567f..000000000000 --- a/lib/jedec_ddr_data.c +++ /dev/null @@ -1,135 +0,0 @@ -/* - * DDR addressing details and AC timing parameters from JEDEC specs - * - * Copyright (C) 2012 Texas Instruments, Inc. - * - * Aneesh V - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include - -/* LPDDR2 addressing details from JESD209-2 section 2.4 */ -const struct lpddr2_addressing - lpddr2_jedec_addressing_table[NUM_DDR_ADDR_TABLE_ENTRIES] = { - {B4, T_REFI_15_6, T_RFC_90}, /* 64M */ - {B4, T_REFI_15_6, T_RFC_90}, /* 128M */ - {B4, T_REFI_7_8, T_RFC_90}, /* 256M */ - {B4, T_REFI_7_8, T_RFC_90}, /* 512M */ - {B8, T_REFI_7_8, T_RFC_130}, /* 1GS4 */ - {B8, T_REFI_3_9, T_RFC_130}, /* 2GS4 */ - {B8, T_REFI_3_9, T_RFC_130}, /* 4G */ - {B8, T_REFI_3_9, T_RFC_210}, /* 8G */ - {B4, T_REFI_7_8, T_RFC_130}, /* 1GS2 */ - {B4, T_REFI_3_9, T_RFC_130}, /* 2GS2 */ -}; -EXPORT_SYMBOL_GPL(lpddr2_jedec_addressing_table); - -/* LPDDR2 AC timing parameters from JESD209-2 section 12 */ -const struct lpddr2_timings - lpddr2_jedec_timings[NUM_DDR_TIMING_TABLE_ENTRIES] = { - /* Speed bin 400(200 MHz) */ - [0] = { - .max_freq = 200000000, - .min_freq = 10000000, - .tRPab = 21000, - .tRCD = 18000, - .tWR = 15000, - .tRAS_min = 42000, - .tRRD = 10000, - .tWTR = 10000, - .tXP = 7500, - .tRTP = 7500, - .tCKESR = 15000, - .tDQSCK_max = 5500, - .tFAW = 50000, - .tZQCS = 90000, - .tZQCL = 360000, - .tZQinit = 1000000, - .tRAS_max_ns = 70000, - .tDQSCK_max_derated = 6000, - }, - /* Speed bin 533(266 MHz) */ - [1] = { - .max_freq = 266666666, - .min_freq = 10000000, - .tRPab = 21000, - .tRCD = 18000, - .tWR = 15000, - .tRAS_min = 42000, - .tRRD = 10000, - .tWTR = 7500, - .tXP = 7500, - .tRTP = 7500, - .tCKESR = 15000, - .tDQSCK_max = 5500, - .tFAW = 50000, - .tZQCS = 90000, - .tZQCL = 360000, - .tZQinit = 1000000, - .tRAS_max_ns = 70000, - .tDQSCK_max_derated = 6000, - }, - /* Speed bin 800(400 MHz) */ - [2] = { - .max_freq = 400000000, - .min_freq = 10000000, - .tRPab = 21000, - .tRCD = 18000, - .tWR = 15000, - .tRAS_min = 42000, - .tRRD = 10000, - .tWTR = 7500, - .tXP = 7500, - .tRTP = 7500, - .tCKESR = 15000, - .tDQSCK_max = 5500, - .tFAW = 50000, - .tZQCS = 90000, - .tZQCL = 360000, - .tZQinit = 1000000, - .tRAS_max_ns = 70000, - .tDQSCK_max_derated = 6000, - }, - /* Speed bin 1066(533 MHz) */ - [3] = { - .max_freq = 533333333, - .min_freq = 10000000, - .tRPab = 21000, - .tRCD = 18000, - .tWR = 15000, - .tRAS_min = 42000, - .tRRD = 10000, - .tWTR = 7500, - .tXP = 7500, - .tRTP = 7500, - .tCKESR = 15000, - .tDQSCK_max = 5500, - .tFAW = 50000, - .tZQCS = 90000, - .tZQCL = 360000, - .tZQinit = 1000000, - .tRAS_max_ns = 70000, - .tDQSCK_max_derated = 5620, - }, -}; -EXPORT_SYMBOL_GPL(lpddr2_jedec_timings); - -const struct lpddr2_min_tck lpddr2_jedec_min_tck = { - .tRPab = 3, - .tRCD = 3, - .tWR = 3, - .tRASmin = 3, - .tRRD = 2, - .tWTR = 2, - .tXP = 2, - .tRTP = 2, - .tCKE = 3, - .tCKESR = 3, - .tFAW = 8 -}; -EXPORT_SYMBOL_GPL(lpddr2_jedec_min_tck); -- cgit