From 8fb7256af86fcdebcefcff39b3043aa1619229a7 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Thu, 22 Sep 2022 18:29:22 +0200 Subject: arm64: dts: verdin-imx8mm: improve pcie node Slight improvement of pcie node to be more in-line with what we add on the Verdin iMX8M Plus. Signed-off-by: Marcel Ziswiler Signed-off-by: Shawn Guo --- arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi index 484d58d303f3..7bc51249a502 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi @@ -653,7 +653,8 @@ assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>, <&clk IMX8MM_SYS_PLL2_250M>; assigned-clock-rates = <10000000>, <250000000>; - clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk IMX8MM_CLK_PCIE1_AUX>, + clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, + <&clk IMX8MM_CLK_PCIE1_AUX>, <&clk IMX8MM_CLK_PCIE1_PHY>; clock-names = "pcie", "pcie_aux", "pcie_bus"; pinctrl-names = "default"; @@ -664,6 +665,7 @@ &pcie_phy { clocks = <&clk IMX8MM_CLK_PCIE1_PHY>; + clock-names = "ref"; fsl,clkreq-unsupported; fsl,refclk-pad-mode = ; fsl,tx-deemph-gen1 = <0x2d>; -- cgit