From 9a8f26a25b8c18e6975295645af8720e09bf90a1 Mon Sep 17 00:00:00 2001 From: "Russell King (Oracle)" Date: Thu, 7 Apr 2022 15:50:08 +0100 Subject: net: dsa: mt7530: populate supported_interfaces and mac_capabilities MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Populate the supported interfaces and MAC capabilities for mt7530, mt7531 and mt7621 DSA switches. Filling this in will enable phylink to pre-check the PHY interface mode against the the supported interfaces bitmap prior to calling the validate function, and will eventually allow us to convert to using the generic validation. Tested-by: Marek Behún Signed-off-by: Russell King (Oracle) --- drivers/net/dsa/mt7530.c | 74 ++++++++++++++++++++++++++++++++++++++++++++++++ drivers/net/dsa/mt7530.h | 2 ++ 2 files changed, 76 insertions(+) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 831ccbecb0c2..f67d4b40e71c 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -2390,6 +2390,32 @@ mt7531_setup(struct dsa_switch *ds) return 0; } +static void mt7530_mac_port_get_caps(struct dsa_switch *ds, int port, + struct phylink_config *config) +{ + switch (port) { + case 0 ... 4: /* Internal phy */ + __set_bit(PHY_INTERFACE_MODE_GMII, + config->supported_interfaces); + break; + + case 5: /* 2nd cpu port with phy of port 0 or 4 / external phy */ + phy_interface_set_rgmii(config->supported_interfaces); + __set_bit(PHY_INTERFACE_MODE_MII, + config->supported_interfaces); + __set_bit(PHY_INTERFACE_MODE_GMII, + config->supported_interfaces); + break; + + case 6: /* 1st cpu port */ + __set_bit(PHY_INTERFACE_MODE_RGMII, + config->supported_interfaces); + __set_bit(PHY_INTERFACE_MODE_TRGMII, + config->supported_interfaces); + break; + } +} + static bool mt7530_phy_mode_supported(struct dsa_switch *ds, int port, const struct phylink_link_state *state) @@ -2426,6 +2452,37 @@ static bool mt7531_is_rgmii_port(struct mt7530_priv *priv, u32 port) return (port == 5) && (priv->p5_intf_sel != P5_INTF_SEL_GMAC5_SGMII); } +static void mt7531_mac_port_get_caps(struct dsa_switch *ds, int port, + struct phylink_config *config) +{ + struct mt7530_priv *priv = ds->priv; + + switch (port) { + case 0 ... 4: /* Internal phy */ + __set_bit(PHY_INTERFACE_MODE_GMII, + config->supported_interfaces); + break; + + case 5: /* 2nd cpu port supports either rgmii or sgmii/8023z */ + if (mt7531_is_rgmii_port(priv, port)) { + phy_interface_set_rgmii(config->supported_interfaces); + break; + } + fallthrough; + + case 6: /* 1st cpu port supports sgmii/8023z only */ + __set_bit(PHY_INTERFACE_MODE_SGMII, + config->supported_interfaces); + __set_bit(PHY_INTERFACE_MODE_1000BASEX, + config->supported_interfaces); + __set_bit(PHY_INTERFACE_MODE_2500BASEX, + config->supported_interfaces); + + config->mac_capabilities |= MAC_2500FD; + break; + } +} + static bool mt7531_phy_mode_supported(struct dsa_switch *ds, int port, const struct phylink_link_state *state) @@ -2904,6 +2961,18 @@ mt7531_cpu_port_config(struct dsa_switch *ds, int port) return 0; } +static void mt753x_phylink_get_caps(struct dsa_switch *ds, int port, + struct phylink_config *config) +{ + struct mt7530_priv *priv = ds->priv; + + /* This switch only supports full-duplex at 1Gbps */ + config->mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE | + MAC_10 | MAC_100 | MAC_1000FD; + + priv->info->mac_port_get_caps(ds, port, config); +} + static void mt7530_mac_port_validate(struct dsa_switch *ds, int port, unsigned long *supported) @@ -3139,6 +3208,7 @@ static const struct dsa_switch_ops mt7530_switch_ops = { .port_vlan_del = mt7530_port_vlan_del, .port_mirror_add = mt753x_port_mirror_add, .port_mirror_del = mt753x_port_mirror_del, + .phylink_get_caps = mt753x_phylink_get_caps, .phylink_validate = mt753x_phylink_validate, .phylink_mac_link_state = mt753x_phylink_mac_link_state, .phylink_mac_config = mt753x_phylink_mac_config, @@ -3156,6 +3226,7 @@ static const struct mt753x_info mt753x_table[] = { .phy_read = mt7530_phy_read, .phy_write = mt7530_phy_write, .pad_setup = mt7530_pad_clk_setup, + .mac_port_get_caps = mt7530_mac_port_get_caps, .phy_mode_supported = mt7530_phy_mode_supported, .mac_port_validate = mt7530_mac_port_validate, .mac_port_get_state = mt7530_phylink_mac_link_state, @@ -3167,6 +3238,7 @@ static const struct mt753x_info mt753x_table[] = { .phy_read = mt7530_phy_read, .phy_write = mt7530_phy_write, .pad_setup = mt7530_pad_clk_setup, + .mac_port_get_caps = mt7530_mac_port_get_caps, .phy_mode_supported = mt7530_phy_mode_supported, .mac_port_validate = mt7530_mac_port_validate, .mac_port_get_state = mt7530_phylink_mac_link_state, @@ -3179,6 +3251,7 @@ static const struct mt753x_info mt753x_table[] = { .phy_write = mt7531_ind_phy_write, .pad_setup = mt7531_pad_setup, .cpu_port_config = mt7531_cpu_port_config, + .mac_port_get_caps = mt7531_mac_port_get_caps, .phy_mode_supported = mt7531_phy_mode_supported, .mac_port_validate = mt7531_mac_port_validate, .mac_port_get_state = mt7531_phylink_mac_link_state, @@ -3241,6 +3314,7 @@ mt7530_probe(struct mdio_device *mdiodev) */ if (!priv->info->sw_setup || !priv->info->pad_setup || !priv->info->phy_read || !priv->info->phy_write || + !priv->info->mac_port_get_caps || !priv->info->phy_mode_supported || !priv->info->mac_port_validate || !priv->info->mac_port_get_state || !priv->info->mac_port_config) diff --git a/drivers/net/dsa/mt7530.h b/drivers/net/dsa/mt7530.h index 91508e2feef9..e285b68ba354 100644 --- a/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h @@ -769,6 +769,8 @@ struct mt753x_info { int (*phy_write)(struct mt7530_priv *priv, int port, int regnum, u16 val); int (*pad_setup)(struct dsa_switch *ds, phy_interface_t interface); int (*cpu_port_config)(struct dsa_switch *ds, int port); + void (*mac_port_get_caps)(struct dsa_switch *ds, int port, + struct phylink_config *config); bool (*phy_mode_supported)(struct dsa_switch *ds, int port, const struct phylink_link_state *state); void (*mac_port_validate)(struct dsa_switch *ds, int port, -- cgit