From 27c7004a9ea6cab1d7f9261b6eb7ce6417e85570 Mon Sep 17 00:00:00 2001 From: Vaibhav Hiremath Date: Sun, 5 May 2013 00:18:04 +0530 Subject: ARM: OMAP2+: AM33xx: Add missing reset status info to GFX hwmod GFX has a reset status register (PRM_GFX.RM_GFX_RSTST), so update the GFX hwmod data with .rstst_off and .st_shift information. Signed-off-by: Vaibhav Hiremath Cc: Paul Walmsley Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c index 075f7cc51026..1e2a6fb835c2 100644 --- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c @@ -329,7 +329,7 @@ static struct omap_hwmod_class am33xx_gfx_hwmod_class = { }; static struct omap_hwmod_rst_info am33xx_gfx_resets[] = { - { .name = "gfx", .rst_shift = 0 }, + { .name = "gfx", .rst_shift = 0, .st_shift = 0}, }; static struct omap_hwmod_irq_info am33xx_gfx_irqs[] = { @@ -347,6 +347,7 @@ static struct omap_hwmod am33xx_gfx_hwmod = { .omap4 = { .clkctrl_offs = AM33XX_CM_GFX_GFX_CLKCTRL_OFFSET, .rstctrl_offs = AM33XX_RM_GFX_RSTCTRL_OFFSET, + .rstst_offs = AM33XX_RM_GFX_RSTST_OFFSET, .modulemode = MODULEMODE_SWCTRL, }, }, -- cgit From 1919f0f7db055b90a45c2de2ea49c6bd3789b203 Mon Sep 17 00:00:00 2001 From: Roger Quadros Date: Thu, 17 Jan 2013 13:30:28 +0200 Subject: ARM: OMAP3: clock data: get rid of unused USB host clock aliases and dummies We don't need multiple aliases for the OMAP USB host clocks and neither the dummy clocks so remove them. CC: Paul Walmsley CC: Rajendra Nayak CC: Benoit Cousson CC: Mike Turquette Signed-off-by: Roger Quadros [paul@pwsan.com: updated against v3.10-rc4] Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/cclock3xxx_data.c | 11 ----------- 1 file changed, 11 deletions(-) diff --git a/arch/arm/mach-omap2/cclock3xxx_data.c b/arch/arm/mach-omap2/cclock3xxx_data.c index 45cd26430d1f..334b76745900 100644 --- a/arch/arm/mach-omap2/cclock3xxx_data.c +++ b/arch/arm/mach-omap2/cclock3xxx_data.c @@ -3329,11 +3329,7 @@ static struct omap_clk omap36xx_am35xx_omap3430es2plus_clks[] = { CLK(NULL, "cpefuse_fck", &cpefuse_fck), CLK(NULL, "ts_fck", &ts_fck), CLK(NULL, "usbtll_fck", &usbtll_fck), - CLK("usbhs_omap", "usbtll_fck", &usbtll_fck), - CLK("usbhs_tll", "usbtll_fck", &usbtll_fck), CLK(NULL, "usbtll_ick", &usbtll_ick), - CLK("usbhs_omap", "usbtll_ick", &usbtll_ick), - CLK("usbhs_tll", "usbtll_ick", &usbtll_ick), CLK("omap_hsmmc.2", "ick", &mmchs3_ick), CLK(NULL, "mmchs3_ick", &mmchs3_ick), CLK(NULL, "mmchs3_fck", &mmchs3_fck), @@ -3343,7 +3339,6 @@ static struct omap_clk omap36xx_am35xx_omap3430es2plus_clks[] = { CLK(NULL, "usbhost_120m_fck", &usbhost_120m_fck), CLK(NULL, "usbhost_48m_fck", &usbhost_48m_fck), CLK(NULL, "usbhost_ick", &usbhost_ick), - CLK("usbhs_omap", "usbhost_ick", &usbhost_ick), }; /* @@ -3463,12 +3458,6 @@ static struct omap_clk omap3xxx_clks[] = { CLK(NULL, "utmi_p2_gfclk", &dummy_ck), CLK(NULL, "xclk60mhsp1_ck", &dummy_ck), CLK(NULL, "xclk60mhsp2_ck", &dummy_ck), - CLK(NULL, "usb_host_hs_utmi_p1_clk", &dummy_ck), - CLK(NULL, "usb_host_hs_utmi_p2_clk", &dummy_ck), - CLK("usbhs_omap", "usb_tll_hs_usb_ch0_clk", &dummy_ck), - CLK("usbhs_omap", "usb_tll_hs_usb_ch1_clk", &dummy_ck), - CLK("usbhs_tll", "usb_tll_hs_usb_ch0_clk", &dummy_ck), - CLK("usbhs_tll", "usb_tll_hs_usb_ch1_clk", &dummy_ck), CLK(NULL, "init_60m_fclk", &dummy_ck), CLK(NULL, "gpt1_fck", &gpt1_fck), CLK(NULL, "aes2_ick", &aes2_ick), -- cgit From 563ce4d51a555b45f5d43ff9cf127da8dac9f64d Mon Sep 17 00:00:00 2001 From: Philip Avinash Date: Thu, 6 Jun 2013 15:52:36 +0200 Subject: ARM: AM33XX: clk: Add clock node for EHRPWM TBCLK EHRPWM module requires explicit clock gating of TBCLK from control module. Hence add TBCLK clock node in clock tree for EHRPWM modules. Signed-off-by: Philip Avinash [bigeasy: remove CK_AM33XX] Signed-off-by: Sebastian Andrzej Siewior Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/cclock33xx_data.c | 30 ++++++++++++++++++++++++++++++ arch/arm/mach-omap2/control.h | 8 ++++++++ 2 files changed, 38 insertions(+) diff --git a/arch/arm/mach-omap2/cclock33xx_data.c b/arch/arm/mach-omap2/cclock33xx_data.c index af3544ce4f02..0346de56436c 100644 --- a/arch/arm/mach-omap2/cclock33xx_data.c +++ b/arch/arm/mach-omap2/cclock33xx_data.c @@ -862,6 +862,33 @@ static struct clk_hw_omap wdt1_fck_hw = { DEFINE_STRUCT_CLK(wdt1_fck, wdt_ck_parents, gpio_fck_ops); +static const char *pwmss_clk_parents[] = { + "dpll_per_m2_ck", +}; + +static const struct clk_ops ehrpwm_tbclk_ops = { + .enable = &omap2_dflt_clk_enable, + .disable = &omap2_dflt_clk_disable, +}; + +DEFINE_CLK_OMAP_MUX_GATE(ehrpwm0_tbclk, "l4ls_clkdm", + NULL, NULL, 0, + AM33XX_CTRL_REGADDR(AM33XX_PWMSS_TBCLK_CLKCTRL), + AM33XX_PWMSS0_TBCLKEN_SHIFT, + NULL, pwmss_clk_parents, ehrpwm_tbclk_ops); + +DEFINE_CLK_OMAP_MUX_GATE(ehrpwm1_tbclk, "l4ls_clkdm", + NULL, NULL, 0, + AM33XX_CTRL_REGADDR(AM33XX_PWMSS_TBCLK_CLKCTRL), + AM33XX_PWMSS1_TBCLKEN_SHIFT, + NULL, pwmss_clk_parents, ehrpwm_tbclk_ops); + +DEFINE_CLK_OMAP_MUX_GATE(ehrpwm2_tbclk, "l4ls_clkdm", + NULL, NULL, 0, + AM33XX_CTRL_REGADDR(AM33XX_PWMSS_TBCLK_CLKCTRL), + AM33XX_PWMSS2_TBCLKEN_SHIFT, + NULL, pwmss_clk_parents, ehrpwm_tbclk_ops); + /* * clkdev */ @@ -942,6 +969,9 @@ static struct omap_clk am33xx_clks[] = { CLK(NULL, "clkout2_div_ck", &clkout2_div_ck), CLK(NULL, "timer_32k_ck", &clkdiv32k_ick), CLK(NULL, "timer_sys_ck", &sys_clkin_ck), + CLK("48300200.ehrpwm", "tbclk", &ehrpwm0_tbclk), + CLK("48302200.ehrpwm", "tbclk", &ehrpwm1_tbclk), + CLK("48304200.ehrpwm", "tbclk", &ehrpwm2_tbclk), }; diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h index e6c328128a0a..35d17a6ec06b 100644 --- a/arch/arm/mach-omap2/control.h +++ b/arch/arm/mach-omap2/control.h @@ -358,6 +358,14 @@ #define AM33XX_CONTROL_STATUS_SYSBOOT1_WIDTH 0x2 #define AM33XX_CONTROL_STATUS_SYSBOOT1_MASK (0x3 << 22) +/* AM33XX PWMSS Control register */ +#define AM33XX_PWMSS_TBCLK_CLKCTRL 0x664 + +/* AM33XX PWMSS Control bitfields */ +#define AM33XX_PWMSS0_TBCLKEN_SHIFT 0 +#define AM33XX_PWMSS1_TBCLKEN_SHIFT 1 +#define AM33XX_PWMSS2_TBCLKEN_SHIFT 2 + /* CONTROL OMAP STATUS register to identify OMAP3 features */ #define OMAP3_CONTROL_OMAP_STATUS 0x044c -- cgit