From abd0bf70a820ec797b0b93ddbc7818c8f40e9d95 Mon Sep 17 00:00:00 2001 From: Russell King Date: Sun, 29 Mar 2020 12:24:59 +0100 Subject: gpio: mvebu: fix PWM period calculation The period of a PWM signal is the sum of the on and off durations. The calculation being used by gpio-mvebu is not correct, resulting in the period being miscalculated and invalid. Fix this. Signed-off-by: Russell King --- drivers/gpio/gpio-mvebu.c | 24 ++++++++++-------------- 1 file changed, 10 insertions(+), 14 deletions(-) diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c index 433e2c3f3fd5..6862053343e6 100644 --- a/drivers/gpio/gpio-mvebu.c +++ b/drivers/gpio/gpio-mvebu.c @@ -660,8 +660,8 @@ static void mvebu_pwm_get_state(struct pwm_chip *chip, spin_lock_irqsave(&mvpwm->lock, flags); - val = (unsigned long long) - readl_relaxed(mvebu_pwmreg_blink_on_duration(mvpwm)); + u = readl_relaxed(mvebu_pwmreg_blink_on_duration(mvpwm)); + val = u; val *= NSEC_PER_SEC; do_div(val, mvpwm->clk_rate); if (val > UINT_MAX) @@ -671,21 +671,17 @@ static void mvebu_pwm_get_state(struct pwm_chip *chip, else state->duty_cycle = 1; - val = (unsigned long long) - readl_relaxed(mvebu_pwmreg_blink_off_duration(mvpwm)); + val = u; + u = readl_relaxed(mvebu_pwmreg_blink_off_duration(mvpwm)); + val += u; val *= NSEC_PER_SEC; do_div(val, mvpwm->clk_rate); - if (val < state->duty_cycle) { + if (val > UINT_MAX) + state->period = UINT_MAX; + else if (val) + state->period = val; + else state->period = 1; - } else { - val -= state->duty_cycle; - if (val > UINT_MAX) - state->period = UINT_MAX; - else if (val) - state->period = val; - else - state->period = 1; - } regmap_read(mvchip->regs, GPIO_BLINK_EN_OFF + mvchip->offset, &u); if (u) -- cgit