From ba68c7eff599705b5fe3b42895dd7d2757cb368a Mon Sep 17 00:00:00 2001 From: Jon Hunter Date: Sat, 15 Dec 2012 01:35:39 -0700 Subject: ARM: OMAP4: Update timer clock aliases Commit "ARM: dts: OMAP4: Update timer addresses" updated the device-tree names of the OMAP4 timers 5-7 because the default address for the timers was changed from the L3 address to the MPU private address. When booting with device-tree, this introduces a regression when attempting to set the parent clock of timers 5-7 to the sys_clk_div_ck. Therefore, update the clock aliases for timer 5-7 to reflect the updated device-tree name for the timers. Signed-off-by: Jon Hunter [paul@pwsan.com: updated to apply after the CCF conversion] Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/cclock44xx_data.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-omap2/cclock44xx_data.c b/arch/arm/mach-omap2/cclock44xx_data.c index aa56c3e5bb34..a1f0b55b78e3 100644 --- a/arch/arm/mach-omap2/cclock44xx_data.c +++ b/arch/arm/mach-omap2/cclock44xx_data.c @@ -1935,10 +1935,10 @@ static struct omap_clk omap44xx_clks[] = { CLK("4803e000.timer", "timer_sys_ck", &sys_clkin_ck, CK_443X), CLK("48086000.timer", "timer_sys_ck", &sys_clkin_ck, CK_443X), CLK("48088000.timer", "timer_sys_ck", &sys_clkin_ck, CK_443X), - CLK("49038000.timer", "timer_sys_ck", &syc_clk_div_ck, CK_443X), - CLK("4903a000.timer", "timer_sys_ck", &syc_clk_div_ck, CK_443X), - CLK("4903c000.timer", "timer_sys_ck", &syc_clk_div_ck, CK_443X), - CLK("4903e000.timer", "timer_sys_ck", &syc_clk_div_ck, CK_443X), + CLK("40138000.timer", "timer_sys_ck", &syc_clk_div_ck, CK_443X), + CLK("4013a000.timer", "timer_sys_ck", &syc_clk_div_ck, CK_443X), + CLK("4013c000.timer", "timer_sys_ck", &syc_clk_div_ck, CK_443X), + CLK("4013e000.timer", "timer_sys_ck", &syc_clk_div_ck, CK_443X), CLK(NULL, "cpufreq_ck", &dpll_mpu_ck, CK_443X), }; -- cgit