From 3b2fb67ada60cdde30dca01e0c06b45f7391f8b2 Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Mon, 30 Sep 2019 11:33:31 +0200 Subject: dt-bindings: pwm: mediatek: Remove gratuitous compatible string for MT7629 The MT7629 is, in fact, not compatible with the MT7622 because the former has a single PWM channel while the former has 6. Remove the gratuitous compatible string for MT7629. Reported-by: Sam Shih Signed-off-by: Thierry Reding --- Documentation/devicetree/bindings/pwm/pwm-mediatek.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt b/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt index c8501530173c..053e9b5880f1 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt +++ b/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt @@ -6,7 +6,7 @@ Required properties: - "mediatek,mt7622-pwm": found on mt7622 SoC. - "mediatek,mt7623-pwm": found on mt7623 SoC. - "mediatek,mt7628-pwm": found on mt7628 SoC. - - "mediatek,mt7629-pwm", "mediatek,mt7622-pwm": found on mt7629 SoC. + - "mediatek,mt7629-pwm": found on mt7629 SoC. - "mediatek,mt8516-pwm": found on mt8516 SoC. - reg: physical base address and length of the controller's registers. - #pwm-cells: must be 2. See pwm.txt in this directory for a description of -- cgit From 1b98ad3b3be98f2c99f4d63679511eb97a26b8bb Mon Sep 17 00:00:00 2001 From: Colin Ian King Date: Wed, 2 Oct 2019 11:08:44 +0100 Subject: pwm: sun4i: Drop redundant assignment to variable pval Variable pval is being assigned a value that is never read. The assignment is redundant and hence can be removed. Addresses-Coverity: ("Unused value") Signed-off-by: Colin Ian King Signed-off-by: Thierry Reding --- drivers/pwm/pwm-sun4i.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/pwm/pwm-sun4i.c b/drivers/pwm/pwm-sun4i.c index 6f5840a1a82d..53970d4ba695 100644 --- a/drivers/pwm/pwm-sun4i.c +++ b/drivers/pwm/pwm-sun4i.c @@ -156,7 +156,6 @@ static int sun4i_pwm_calculate(struct sun4i_pwm_chip *sun4i_pwm, if (sun4i_pwm->data->has_prescaler_bypass) { /* First, test without any prescaler when available */ prescaler = PWM_PRESCAL_MASK; - pval = 1; /* * When not using any prescaler, the clock period in nanoseconds * is not an integer so round it half up instead of -- cgit From 4205e356285ef0e8127d531fcff845eb01108b20 Mon Sep 17 00:00:00 2001 From: Fabrice Gasnier Date: Fri, 4 Oct 2019 14:53:51 +0200 Subject: dt-bindings: pwm-stm32: Document pinctrl sleep state Add documentation for pinctrl sleep state that can be used by STM32 timers PWM. Signed-off-by: Fabrice Gasnier Reviewed-by: Rob Herring Signed-off-by: Thierry Reding --- Documentation/devicetree/bindings/pwm/pwm-stm32.txt | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/pwm/pwm-stm32.txt b/Documentation/devicetree/bindings/pwm/pwm-stm32.txt index a8690bfa5e1f..f1620c1feebf 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-stm32.txt +++ b/Documentation/devicetree/bindings/pwm/pwm-stm32.txt @@ -5,8 +5,9 @@ See ../mfd/stm32-timers.txt for details about the parent node. Required parameters: - compatible: Must be "st,stm32-pwm". -- pinctrl-names: Set to "default". -- pinctrl-0: List of phandles pointing to pin configuration nodes for PWM module. +- pinctrl-names: Set to "default". An additional "sleep" state can be + defined to set pins in sleep state when in low power. +- pinctrl-n: List of phandles pointing to pin configuration nodes for PWM module. For Pinctrl properties see ../pinctrl/pinctrl-bindings.txt - #pwm-cells: Should be set to 3. This PWM chip uses the default 3 cells bindings defined in pwm.txt. @@ -32,7 +33,8 @@ Example: compatible = "st,stm32-pwm"; #pwm-cells = <3>; pinctrl-0 = <&pwm1_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&pwm1_sleep_pins>; + pinctrl-names = "default", "sleep"; st,breakinput = <0 1 5>; }; }; -- cgit From 0f9d2ecba883d0788a34414a608055479be81ccd Mon Sep 17 00:00:00 2001 From: Fabrice Gasnier Date: Fri, 4 Oct 2019 14:53:52 +0200 Subject: pwm: stm32: Split breakinput apply routine to ease PM support Split breakinput routine that configures STM32 timers 'break' safety feature upon probe, into two routines: - stm32_pwm_apply_breakinputs() sets all the break inputs into registers. - stm32_pwm_probe_breakinputs() probes the device tree break input settings before calling stm32_pwm_apply_breakinputs() This is a precursor patch to ease PM support. Registers content may get lost during low power. So, break input settings applied upon probe need to be restored upon resume (e.g. by calling stm32_pwm_apply_breakinputs()). Signed-off-by: Fabrice Gasnier Signed-off-by: Thierry Reding --- drivers/pwm/pwm-stm32.c | 50 ++++++++++++++++++++++++++++++------------------- 1 file changed, 31 insertions(+), 19 deletions(-) diff --git a/drivers/pwm/pwm-stm32.c b/drivers/pwm/pwm-stm32.c index 359b08596d9e..dd0b27783d02 100644 --- a/drivers/pwm/pwm-stm32.c +++ b/drivers/pwm/pwm-stm32.c @@ -19,6 +19,12 @@ #define CCMR_CHANNEL_MASK 0xFF #define MAX_BREAKINPUT 2 +struct stm32_breakinput { + u32 index; + u32 level; + u32 filter; +}; + struct stm32_pwm { struct pwm_chip chip; struct mutex lock; /* protect pwm config/enable */ @@ -26,15 +32,11 @@ struct stm32_pwm { struct regmap *regmap; u32 max_arr; bool have_complementary_output; + struct stm32_breakinput breakinputs[MAX_BREAKINPUT]; + unsigned int num_breakinputs; u32 capture[4] ____cacheline_aligned; /* DMA'able buffer */ }; -struct stm32_breakinput { - u32 index; - u32 level; - u32 filter; -}; - static inline struct stm32_pwm *to_stm32_pwm_dev(struct pwm_chip *chip) { return container_of(chip, struct stm32_pwm, chip); @@ -512,11 +514,27 @@ static int stm32_pwm_set_breakinput(struct stm32_pwm *priv, return (bdtr & bke) ? 0 : -EINVAL; } -static int stm32_pwm_apply_breakinputs(struct stm32_pwm *priv, +static int stm32_pwm_apply_breakinputs(struct stm32_pwm *priv) +{ + unsigned int i; + int ret; + + for (i = 0; i < priv->num_breakinputs; i++) { + ret = stm32_pwm_set_breakinput(priv, + priv->breakinputs[i].index, + priv->breakinputs[i].level, + priv->breakinputs[i].filter); + if (ret < 0) + return ret; + } + + return 0; +} + +static int stm32_pwm_probe_breakinputs(struct stm32_pwm *priv, struct device_node *np) { - struct stm32_breakinput breakinput[MAX_BREAKINPUT]; - int nb, ret, i, array_size; + int nb, ret, array_size; nb = of_property_count_elems_of_size(np, "st,breakinput", sizeof(struct stm32_breakinput)); @@ -531,20 +549,14 @@ static int stm32_pwm_apply_breakinputs(struct stm32_pwm *priv, if (nb > MAX_BREAKINPUT) return -EINVAL; + priv->num_breakinputs = nb; array_size = nb * sizeof(struct stm32_breakinput) / sizeof(u32); ret = of_property_read_u32_array(np, "st,breakinput", - (u32 *)breakinput, array_size); + (u32 *)priv->breakinputs, array_size); if (ret) return ret; - for (i = 0; i < nb && !ret; i++) { - ret = stm32_pwm_set_breakinput(priv, - breakinput[i].index, - breakinput[i].level, - breakinput[i].filter); - } - - return ret; + return stm32_pwm_apply_breakinputs(priv); } static void stm32_pwm_detect_complementary(struct stm32_pwm *priv) @@ -614,7 +626,7 @@ static int stm32_pwm_probe(struct platform_device *pdev) if (!priv->regmap || !priv->clk) return -EINVAL; - ret = stm32_pwm_apply_breakinputs(priv, np); + ret = stm32_pwm_probe_breakinputs(priv, np); if (ret) return ret; -- cgit From 2d3aa06b5de097747d848a9d714987a4aa2303aa Mon Sep 17 00:00:00 2001 From: Fabrice Gasnier Date: Fri, 4 Oct 2019 14:53:53 +0200 Subject: pwm: stm32: Add power management support Add suspend/resume PM sleep ops. When going to low power, enforce the PWM channel isn't active. Let the PWM consumers disable it during their own suspend sequence, see [1]. So, perform a check here, and handle the pinctrl states. Also restore the break inputs upon resume, as registers content may be lost when going to low power mode. [1] https://lkml.org/lkml/2019/2/5/770 Signed-off-by: Fabrice Gasnier Signed-off-by: Thierry Reding --- drivers/pwm/pwm-stm32.c | 38 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/drivers/pwm/pwm-stm32.c b/drivers/pwm/pwm-stm32.c index dd0b27783d02..9430b4cd383f 100644 --- a/drivers/pwm/pwm-stm32.c +++ b/drivers/pwm/pwm-stm32.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include @@ -659,6 +660,42 @@ static int stm32_pwm_remove(struct platform_device *pdev) return 0; } +static int __maybe_unused stm32_pwm_suspend(struct device *dev) +{ + struct stm32_pwm *priv = dev_get_drvdata(dev); + unsigned int i; + u32 ccer, mask; + + /* Look for active channels */ + ccer = active_channels(priv); + + for (i = 0; i < priv->chip.npwm; i++) { + mask = TIM_CCER_CC1E << (i * 4); + if (ccer & mask) { + dev_err(dev, "PWM %u still in use by consumer %s\n", + i, priv->chip.pwms[i].label); + return -EBUSY; + } + } + + return pinctrl_pm_select_sleep_state(dev); +} + +static int __maybe_unused stm32_pwm_resume(struct device *dev) +{ + struct stm32_pwm *priv = dev_get_drvdata(dev); + int ret; + + ret = pinctrl_pm_select_default_state(dev); + if (ret) + return ret; + + /* restore breakinput registers that may have been lost in low power */ + return stm32_pwm_apply_breakinputs(priv); +} + +static SIMPLE_DEV_PM_OPS(stm32_pwm_pm_ops, stm32_pwm_suspend, stm32_pwm_resume); + static const struct of_device_id stm32_pwm_of_match[] = { { .compatible = "st,stm32-pwm", }, { /* end node */ }, @@ -671,6 +708,7 @@ static struct platform_driver stm32_pwm_driver = { .driver = { .name = "stm32-pwm", .of_match_table = stm32_pwm_of_match, + .pm = &stm32_pwm_pm_ops, }, }; module_platform_driver(stm32_pwm_driver); -- cgit From 50cc7e3e4f26e3bf5ed74a8d061195c4d2161b8b Mon Sep 17 00:00:00 2001 From: Ondrej Jirman Date: Mon, 14 Oct 2019 15:53:03 +0200 Subject: pwm: sun4i: Fix incorrect calculation of duty_cycle/period MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Since 5.4-rc1, pwm_apply_state calls ->get_state after ->apply if available, and this revealed an issue with integer precision when calculating duty_cycle and period for the currently set state in ->get_state callback. This issue manifested in broken backlight on several Allwinner based devices. Previously this worked, because ->apply updated the passed state directly. Fixes: deb9c462f4e53 ("pwm: sun4i: Don't update the state for the caller of pwm_apply_state") Signed-off-by: Ondrej Jirman Acked-by: Uwe Kleine-König Signed-off-by: Thierry Reding --- drivers/pwm/pwm-sun4i.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pwm/pwm-sun4i.c b/drivers/pwm/pwm-sun4i.c index 53970d4ba695..581d23287333 100644 --- a/drivers/pwm/pwm-sun4i.c +++ b/drivers/pwm/pwm-sun4i.c @@ -137,10 +137,10 @@ static void sun4i_pwm_get_state(struct pwm_chip *chip, val = sun4i_pwm_readl(sun4i_pwm, PWM_CH_PRD(pwm->hwpwm)); - tmp = prescaler * NSEC_PER_SEC * PWM_REG_DTY(val); + tmp = (u64)prescaler * NSEC_PER_SEC * PWM_REG_DTY(val); state->duty_cycle = DIV_ROUND_CLOSEST_ULL(tmp, clk_rate); - tmp = prescaler * NSEC_PER_SEC * PWM_REG_PRD(val); + tmp = (u64)prescaler * NSEC_PER_SEC * PWM_REG_PRD(val); state->period = DIV_ROUND_CLOSEST_ULL(tmp, clk_rate); } -- cgit From 27938fd8ba78b4c7f9a2385b7b52cca19ab891b8 Mon Sep 17 00:00:00 2001 From: Rasmus Villemoes Date: Fri, 4 Oct 2019 15:32:07 +0200 Subject: pwm: Update comment on struct pwm_ops::apply MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Commit 71523d1812ac (pwm: Ensure pwm_apply_state() doesn't modify the state argument) updated the kernel-doc for pwm_apply_state(), but not for the ->apply callback in the pwm_ops struct. Signed-off-by: Rasmus Villemoes Reviewed-by: Uwe Kleine-König Reviewed-by: Bjorn Andersson Signed-off-by: Thierry Reding --- include/linux/pwm.h | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/include/linux/pwm.h b/include/linux/pwm.h index b2c9c460947d..0ef808d925bb 100644 --- a/include/linux/pwm.h +++ b/include/linux/pwm.h @@ -243,10 +243,7 @@ pwm_set_relative_duty_cycle(struct pwm_state *state, unsigned int duty_cycle, * @request: optional hook for requesting a PWM * @free: optional hook for freeing a PWM * @capture: capture and report PWM signal - * @apply: atomically apply a new PWM config. The state argument - * should be adjusted with the real hardware config (if the - * approximate the period or duty_cycle value, state should - * reflect it) + * @apply: atomically apply a new PWM config * @get_state: get the current PWM state. This function is only * called once per PWM device when the PWM chip is * registered. -- cgit From 8dfa620e3d70d3eceff59943b29257949505dd33 Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Wed, 16 Oct 2019 12:06:31 +0200 Subject: pwm: stm32: Validate breakinput data from DT Both index and level can only be either 0 or 1 and the filter value is limited to values between (and including) 0 and 15. Validate that the device tree node contains values that are within these ranges. Signed-off-by: Thierry Reding --- drivers/pwm/pwm-stm32.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/pwm/pwm-stm32.c b/drivers/pwm/pwm-stm32.c index 9430b4cd383f..c5f51a33ee1b 100644 --- a/drivers/pwm/pwm-stm32.c +++ b/drivers/pwm/pwm-stm32.c @@ -536,6 +536,7 @@ static int stm32_pwm_probe_breakinputs(struct stm32_pwm *priv, struct device_node *np) { int nb, ret, array_size; + unsigned int i; nb = of_property_count_elems_of_size(np, "st,breakinput", sizeof(struct stm32_breakinput)); @@ -557,6 +558,13 @@ static int stm32_pwm_probe_breakinputs(struct stm32_pwm *priv, if (ret) return ret; + for (i = 0; i < priv->num_breakinputs; i++) { + if (priv->breakinputs[i].index > 1 || + priv->breakinputs[i].level > 1 || + priv->breakinputs[i].filter > 15) + return -EINVAL; + } + return stm32_pwm_apply_breakinputs(priv); } -- cgit From 8e53622594f5530b5a86094464937dda47fc6e3b Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Wed, 16 Oct 2019 12:42:40 +0200 Subject: pwm: stm32: Remove clutter from ternary operator Remove usage of the ternary operator to assign values for register fields. Instead, parameterize the register and field offset macros and pass the index to them. This removes clutter and improves readability. Signed-off-by: Thierry Reding --- drivers/pwm/pwm-stm32.c | 21 +++++++++------------ include/linux/mfd/stm32-timers.h | 12 ++++-------- 2 files changed, 13 insertions(+), 20 deletions(-) diff --git a/drivers/pwm/pwm-stm32.c b/drivers/pwm/pwm-stm32.c index c5f51a33ee1b..7a2be0453824 100644 --- a/drivers/pwm/pwm-stm32.c +++ b/drivers/pwm/pwm-stm32.c @@ -493,20 +493,17 @@ static const struct pwm_ops stm32pwm_ops = { static int stm32_pwm_set_breakinput(struct stm32_pwm *priv, int index, int level, int filter) { - u32 bke = (index == 0) ? TIM_BDTR_BKE : TIM_BDTR_BK2E; - int shift = (index == 0) ? TIM_BDTR_BKF_SHIFT : TIM_BDTR_BK2F_SHIFT; - u32 mask = (index == 0) ? TIM_BDTR_BKE | TIM_BDTR_BKP | TIM_BDTR_BKF - : TIM_BDTR_BK2E | TIM_BDTR_BK2P | TIM_BDTR_BK2F; - u32 bdtr = bke; + u32 shift = TIM_BDTR_BKF_SHIFT(index); + u32 bke = TIM_BDTR_BKE(index); + u32 bkp = TIM_BDTR_BKP(index); + u32 bkf = TIM_BDTR_BKF(index); + u32 mask = bkf | bkp | bke; + u32 bdtr; - /* - * The both bits could be set since only one will be wrote - * due to mask value. - */ - if (level) - bdtr |= TIM_BDTR_BKP | TIM_BDTR_BK2P; + bdtr = (filter & TIM_BDTR_BKF_MASK) << shift | bke; - bdtr |= (filter & TIM_BDTR_BKF_MASK) << shift; + if (level) + bdtr |= bkp; regmap_update_bits(priv->regmap, TIM_BDTR, mask, bdtr); diff --git a/include/linux/mfd/stm32-timers.h b/include/linux/mfd/stm32-timers.h index 067d14655c28..f8db83aedb2b 100644 --- a/include/linux/mfd/stm32-timers.h +++ b/include/linux/mfd/stm32-timers.h @@ -70,14 +70,11 @@ #define TIM_CCER_CC4E BIT(12) /* Capt/Comp 4 out Ena */ #define TIM_CCER_CC4P BIT(13) /* Capt/Comp 4 Polarity */ #define TIM_CCER_CCXE (BIT(0) | BIT(4) | BIT(8) | BIT(12)) -#define TIM_BDTR_BKE BIT(12) /* Break input enable */ -#define TIM_BDTR_BKP BIT(13) /* Break input polarity */ +#define TIM_BDTR_BKE(x) BIT(12 + (x) * 12) /* Break input enable */ +#define TIM_BDTR_BKP(x) BIT(13 + (x) * 12) /* Break input polarity */ #define TIM_BDTR_AOE BIT(14) /* Automatic Output Enable */ #define TIM_BDTR_MOE BIT(15) /* Main Output Enable */ -#define TIM_BDTR_BKF (BIT(16) | BIT(17) | BIT(18) | BIT(19)) -#define TIM_BDTR_BK2F (BIT(20) | BIT(21) | BIT(22) | BIT(23)) -#define TIM_BDTR_BK2E BIT(24) /* Break 2 input enable */ -#define TIM_BDTR_BK2P BIT(25) /* Break 2 input polarity */ +#define TIM_BDTR_BKF(x) (0xf << (16 + (x) * 4)) #define TIM_DCR_DBA GENMASK(4, 0) /* DMA base addr */ #define TIM_DCR_DBL GENMASK(12, 8) /* DMA burst len */ @@ -87,8 +84,7 @@ #define TIM_CR2_MMS2_SHIFT 20 #define TIM_SMCR_TS_SHIFT 4 #define TIM_BDTR_BKF_MASK 0xF -#define TIM_BDTR_BKF_SHIFT 16 -#define TIM_BDTR_BK2F_SHIFT 20 +#define TIM_BDTR_BKF_SHIFT(x) (16 + (x) * 4) enum stm32_timers_dmas { STM32_TIMERS_DMA_CH1, -- cgit From 9e1b4999a1693d67cc87a887057d8012c28fb12b Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Wed, 16 Oct 2019 09:30:33 +0200 Subject: pwm: stm32: Pass breakinput instead of its values Instead of passing the individual values of the breakpoint, pass a pointer to the breakpoint. Signed-off-by: Thierry Reding --- drivers/pwm/pwm-stm32.c | 19 ++++++++----------- 1 file changed, 8 insertions(+), 11 deletions(-) diff --git a/drivers/pwm/pwm-stm32.c b/drivers/pwm/pwm-stm32.c index 7a2be0453824..7ff48c14fae8 100644 --- a/drivers/pwm/pwm-stm32.c +++ b/drivers/pwm/pwm-stm32.c @@ -491,18 +491,18 @@ static const struct pwm_ops stm32pwm_ops = { }; static int stm32_pwm_set_breakinput(struct stm32_pwm *priv, - int index, int level, int filter) + const struct stm32_breakinput *bi) { - u32 shift = TIM_BDTR_BKF_SHIFT(index); - u32 bke = TIM_BDTR_BKE(index); - u32 bkp = TIM_BDTR_BKP(index); - u32 bkf = TIM_BDTR_BKF(index); + u32 shift = TIM_BDTR_BKF_SHIFT(bi->index); + u32 bke = TIM_BDTR_BKE(bi->index); + u32 bkp = TIM_BDTR_BKP(bi->index); + u32 bkf = TIM_BDTR_BKF(bi->index); u32 mask = bkf | bkp | bke; u32 bdtr; - bdtr = (filter & TIM_BDTR_BKF_MASK) << shift | bke; + bdtr = (bi->filter & TIM_BDTR_BKF_MASK) << shift | bke; - if (level) + if (bi->level) bdtr |= bkp; regmap_update_bits(priv->regmap, TIM_BDTR, mask, bdtr); @@ -518,10 +518,7 @@ static int stm32_pwm_apply_breakinputs(struct stm32_pwm *priv) int ret; for (i = 0; i < priv->num_breakinputs; i++) { - ret = stm32_pwm_set_breakinput(priv, - priv->breakinputs[i].index, - priv->breakinputs[i].level, - priv->breakinputs[i].filter); + ret = stm32_pwm_set_breakinput(priv, &priv->breakinputs[i]); if (ret < 0) return ret; } -- cgit