From e0bed0774538bdb2e82d6999c8ed9556116e8559 Mon Sep 17 00:00:00 2001 From: Yingjoe Chen Date: Tue, 25 Nov 2014 09:04:00 +0100 Subject: ARM: mediatek: Add sysirq in mt6589/mt8135/mt8127 dtsi Add sysirq settings for mt6589/mt8135/mt8127 This also correct timer interrupt flag. The old setting works because boot loader already set polarity for timer interrupt. Without intpol support, the setting was not changed so gic can get the irq correctly. Signed-off-by: Yingjoe Chen Signed-off-by: Matthias Brugger --- arch/arm/boot/dts/mt6589.dtsi | 14 ++++++++++++-- arch/arm/boot/dts/mt8127.dtsi | 14 ++++++++++++-- arch/arm/boot/dts/mt8135.dtsi | 14 ++++++++++++-- 3 files changed, 36 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/mt6589.dtsi b/arch/arm/boot/dts/mt6589.dtsi index e3c7600ddb38..c91b2a9ebdc3 100644 --- a/arch/arm/boot/dts/mt6589.dtsi +++ b/arch/arm/boot/dts/mt6589.dtsi @@ -19,7 +19,7 @@ / { compatible = "mediatek,mt6589"; - interrupt-parent = <&gic>; + interrupt-parent = <&sysirq>; cpus { #address-cells = <1>; @@ -76,15 +76,25 @@ timer: timer@10008000 { compatible = "mediatek,mt6577-timer"; reg = <0x10008000 0x80>; - interrupts = ; + interrupts = ; clocks = <&system_clk>, <&rtc_clk>; clock-names = "system-clk", "rtc-clk"; }; + sysirq: interrupt-controller@10200100 { + compatible = "mediatek,mt6589-sysirq", + "mediatek,mt6577-sysirq"; + interrupt-controller; + #interrupt-cells = <3>; + interrupt-parent = <&gic>; + reg = <0x10200100 0x1c>; + }; + gic: interrupt-controller@10211000 { compatible = "arm,cortex-a7-gic"; interrupt-controller; #interrupt-cells = <3>; + interrupt-parent = <&gic>; reg = <0x10211000 0x1000>, <0x10212000 0x1000>, <0x10214000 0x2000>, diff --git a/arch/arm/boot/dts/mt8127.dtsi b/arch/arm/boot/dts/mt8127.dtsi index b24c0a2f3c44..a325404c714c 100644 --- a/arch/arm/boot/dts/mt8127.dtsi +++ b/arch/arm/boot/dts/mt8127.dtsi @@ -18,7 +18,7 @@ / { compatible = "mediatek,mt8127"; - interrupt-parent = <&gic>; + interrupt-parent = <&sysirq>; cpus { #address-cells = <1>; @@ -76,15 +76,25 @@ compatible = "mediatek,mt8127-timer", "mediatek,mt6577-timer"; reg = <0 0x10008000 0 0x80>; - interrupts = ; + interrupts = ; clocks = <&system_clk>, <&rtc_clk>; clock-names = "system-clk", "rtc-clk"; }; + sysirq: interrupt-controller@10200100 { + compatible = "mediatek,mt8127-sysirq", + "mediatek,mt6577-sysirq"; + interrupt-controller; + #interrupt-cells = <3>; + interrupt-parent = <&gic>; + reg = <0 0x10200100 0 0x1c>; + }; + gic: interrupt-controller@10211000 { compatible = "arm,cortex-a7-gic"; interrupt-controller; #interrupt-cells = <3>; + interrupt-parent = <&gic>; reg = <0 0x10211000 0 0x1000>, <0 0x10212000 0 0x1000>, <0 0x10214000 0 0x2000>, diff --git a/arch/arm/boot/dts/mt8135.dtsi b/arch/arm/boot/dts/mt8135.dtsi index 7d56a986358e..2762fd57f739 100644 --- a/arch/arm/boot/dts/mt8135.dtsi +++ b/arch/arm/boot/dts/mt8135.dtsi @@ -18,7 +18,7 @@ / { compatible = "mediatek,mt8135"; - interrupt-parent = <&gic>; + interrupt-parent = <&sysirq>; cpu-map { cluster0 { @@ -98,15 +98,25 @@ compatible = "mediatek,mt8135-timer", "mediatek,mt6577-timer"; reg = <0 0x10008000 0 0x80>; - interrupts = ; + interrupts = ; clocks = <&system_clk>, <&rtc_clk>; clock-names = "system-clk", "rtc-clk"; }; + sysirq: interrupt-controller@10200030 { + compatible = "mediatek,mt8135-sysirq", + "mediatek,mt6577-sysirq"; + interrupt-controller; + #interrupt-cells = <3>; + interrupt-parent = <&gic>; + reg = <0 0x10200030 0 0x1c>; + }; + gic: interrupt-controller@10211000 { compatible = "arm,cortex-a15-gic"; interrupt-controller; #interrupt-cells = <3>; + interrupt-parent = <&gic>; reg = <0 0x10211000 0 0x1000>, <0 0x10212000 0 0x1000>, <0 0x10214000 0 0x2000>, -- cgit