From eb5dbd22b619c01ff15b58b27c8e3409cfc7a20e Mon Sep 17 00:00:00 2001 From: John Crispin Date: Fri, 10 Oct 2014 23:37:52 +0200 Subject: MIPS: lantiq: the detection of the gpe clock is broken The code to detect unfused SoCs was broken due to missing register masking. Signed-off-by: Thomas Langer Signed-off-by: John Crispin Patchwork: http://patchwork.linux-mips.org/patch/8049/ Signed-off-by: Ralf Baechle --- arch/mips/lantiq/falcon/sysctrl.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/arch/mips/lantiq/falcon/sysctrl.c b/arch/mips/lantiq/falcon/sysctrl.c index 468ffa043607..7e74760cf2bd 100644 --- a/arch/mips/lantiq/falcon/sysctrl.c +++ b/arch/mips/lantiq/falcon/sysctrl.c @@ -147,12 +147,11 @@ static void falcon_gpe_enable(void) if (status & (1 << (GPPC_OFFSET + 1))) return; - if (status_r32(STATUS_CONFIG) == 0) + freq = (status_r32(STATUS_CONFIG) & + GPEFREQ_MASK) >> + GPEFREQ_OFFSET; + if (freq == 0) freq = 1; /* use 625MHz on unfused chip */ - else - freq = (status_r32(STATUS_CONFIG) & - GPEFREQ_MASK) >> - GPEFREQ_OFFSET; /* apply new frequency */ sysctl_w32_mask(SYSCTL_SYS1, 7 << (GPPC_OFFSET + 1), -- cgit