From 1a50ec0b3b2e9a83f1b1245ea37a853aac2f741c Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Tue, 21 Jan 2020 12:58:52 +0000 Subject: arm64: Implement archrandom.h for ARMv8.5-RNG Expose the ID_AA64ISAR0.RNDR field to userspace, as the RNG system registers are always available at EL0. Implement arch_get_random_seed_long using RNDR. Given that the TRNG is likely to be a shared resource between cores, and VMs, do not explicitly force re-seeding with RNDRRS. In order to avoid code complexity and potential issues with hetrogenous systems only provide values after cpufeature has finalized the system capabilities. Signed-off-by: Richard Henderson [Modified to only function after cpufeature has finalized the system capabilities and move all the code into the header -- broonie] Signed-off-by: Mark Brown Reviewed-by: Mark Rutland Reviewed-by: Ard Biesheuvel [will: Advertise HWCAP via /proc/cpuinfo] Signed-off-by: Will Deacon --- Documentation/arm64/elf_hwcaps.rst | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation/arm64/elf_hwcaps.rst') diff --git a/Documentation/arm64/elf_hwcaps.rst b/Documentation/arm64/elf_hwcaps.rst index 7fa3d215ae6a..276a33414b22 100644 --- a/Documentation/arm64/elf_hwcaps.rst +++ b/Documentation/arm64/elf_hwcaps.rst @@ -204,6 +204,10 @@ HWCAP2_FRINT Functionality implied by ID_AA64ISAR1_EL1.FRINTTS == 0b0001. +HWCAP2_RNG + + Functionality implied by ID_AA64ISAR0_EL1.RNDR == 0b0001. + 4. Unused AT_HWCAP bits ----------------------- -- cgit