From 39bd2b6a3783b8990d97494ec4c8698ba5bb6740 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Tue, 18 Jan 2022 19:50:38 -0600 Subject: dt-bindings: Improve phandle-array schemas The 'phandle-array' type is a bit ambiguous. It can be either just an array of phandles or an array of phandles plus args. Many schemas for phandle-array properties aren't clear in the schema which case applies though the description usually describes it. The array of phandles case boils down to needing: items: maxItems: 1 The phandle plus args cases should typically take this form: items: - items: - description: A phandle - description: 1st arg cell - description: 2nd arg cell With this change, some examples need updating so that the bracketing of property values matches the schema. Signed-off-by: Rob Herring Acked-by: Viresh Kumar Acked-by: Vinod Koul Acked-by: Ulf Hansson Acked-by: Georgi Djakov Reviewed-by: Geert Uytterhoeven Acked-by: Mark Brown Acked-by: Krzysztof Kozlowski Acked-by: Stephen Boyd Acked-by: Greg Kroah-Hartman Acked-by: Marc Kleine-Budde Link: https://lore.kernel.org/r/20220119015038.2433585-1-robh@kernel.org --- Documentation/devicetree/bindings/arm/cpus.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation/devicetree/bindings/arm/cpus.yaml') diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index 0dcebc48ea22..916a5aebefff 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -243,6 +243,8 @@ properties: cpu-idle-states: $ref: '/schemas/types.yaml#/definitions/phandle-array' + items: + maxItems: 1 description: | List of phandles to idle state nodes supported by this cpu (see ./idle-states.yaml). -- cgit From ea87f1eb4fd81375a3abf564f6f2999561985831 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Thu, 3 Mar 2022 10:57:09 -0600 Subject: dt-bindings: arm: Allow 32-bit 'cpu-release-addr' values While the DT Spec says 'cpu-release-addr' is always 64-bit, some 32-bit Arm DTs used a 32-bit value. We're now stuck with those cases, so add uint32 as a valid type. Signed-off-by: Rob Herring Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220303165710.1859862-1-robh@kernel.org --- Documentation/devicetree/bindings/arm/cpus.yaml | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'Documentation/devicetree/bindings/arm/cpus.yaml') diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index 916a5aebefff..cddc3f63c9fd 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -232,14 +232,14 @@ properties: - ti,am4372 cpu-release-addr: - $ref: '/schemas/types.yaml#/definitions/uint64' - + oneOf: + - $ref: '/schemas/types.yaml#/definitions/uint32' + - $ref: '/schemas/types.yaml#/definitions/uint64' description: + The DT specification defines this as 64-bit always, but some 32-bit Arm + systems have used a 32-bit value which must be supported. Required for systems that have an "enable-method" property value of "spin-table". - On ARM v8 64-bit systems must be a two cell - property identifying a 64-bit zero-initialised - memory location. cpu-idle-states: $ref: '/schemas/types.yaml#/definitions/phandle-array' -- cgit