From 47aab53331effedd3f5a6136854bd1da011f94b6 Mon Sep 17 00:00:00 2001 From: Bjorn Helgaas Date: Mon, 14 Aug 2023 16:28:21 -0500 Subject: dt-bindings: Fix typos Fix typos in Documentation/devicetree/bindings. The changes are in descriptions or comments where they shouldn't affect functionality. Signed-off-by: Bjorn Helgaas Link: https://lore.kernel.org/r/20230814212822.193684-3-helgaas@kernel.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml | 2 +- .../bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt | 2 +- .../devicetree/bindings/interrupt-controller/brcm,bcm7120-l2-intc.yaml | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'Documentation/devicetree/bindings/interrupt-controller') diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml b/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml index 39e64c7f6360..2bc38479a41e 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml @@ -49,7 +49,7 @@ properties: The 2nd cell contains the interrupt number for the interrupt type. SPI interrupts are in the range [0-987]. PPI interrupts are in the - range [0-15]. Extented SPI interrupts are in the range [0-1023]. + range [0-15]. Extended SPI interrupts are in the range [0-1023]. Extended PPI interrupts are in the range [0-127]. The 3rd cell is the flags, encoded as follows: diff --git a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt index 0f1af5a1c12e..bdd173056f72 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt @@ -70,7 +70,7 @@ Bank 1: 25: DMA9 26: DMA10 27: DMA11-14 - shared interrupt for DMA 11 to 14 -28: DMAALL - triggers on all dma interrupts (including chanel 15) +28: DMAALL - triggers on all dma interrupts (including channel 15) 29: AUX 30: ARM 31: VPUDMA diff --git a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm7120-l2-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm7120-l2-intc.yaml index c680de1cbd56..786f2426399b 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm7120-l2-intc.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm7120-l2-intc.yaml @@ -59,7 +59,7 @@ description: > .. 31 ........................ X - The BCM3380 Level 1 / Level 2 interrrupt controller shows up in various forms + The BCM3380 Level 1 / Level 2 interrupt controller shows up in various forms on many BCM338x/BCM63xx chipsets. It has the following properties: - outputs a single interrupt signal to its interrupt controller parent -- cgit