From dc8ea9204b242cd93e63585396ac7d13f622802d Mon Sep 17 00:00:00 2001 From: Conor Dooley Date: Thu, 30 Mar 2023 18:32:56 +0100 Subject: dt-bindings: move cache controller bindings to a cache directory There's a bunch of bindings for (mostly l2) cache controllers scattered to the four winds, move them to a common directory. I renamed the freescale l2cache.txt file, as while that might make sense when the parent dir is fsl, it's confusing after the move. The two Marvell bindings have had a "marvell," prefix added to match their compatibles. Signed-off-by: Conor Dooley Link: https://lore.kernel.org/r/20230330173255.109731-1-conor@kernel.org Signed-off-by: Rob Herring --- .../memory-controllers/baikal,bt1-l2-ctl.yaml | 63 ---------------------- 1 file changed, 63 deletions(-) delete mode 100644 Documentation/devicetree/bindings/memory-controllers/baikal,bt1-l2-ctl.yaml (limited to 'Documentation/devicetree/bindings/memory-controllers') diff --git a/Documentation/devicetree/bindings/memory-controllers/baikal,bt1-l2-ctl.yaml b/Documentation/devicetree/bindings/memory-controllers/baikal,bt1-l2-ctl.yaml deleted file mode 100644 index 1fca282f64a2..000000000000 --- a/Documentation/devicetree/bindings/memory-controllers/baikal,bt1-l2-ctl.yaml +++ /dev/null @@ -1,63 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -# Copyright (C) 2020 BAIKAL ELECTRONICS, JSC -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/memory-controllers/baikal,bt1-l2-ctl.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Baikal-T1 L2-cache Control Block - -maintainers: - - Serge Semin - -description: | - By means of the System Controller Baikal-T1 SoC exposes a few settings to - tune the MIPS P5600 CM2 L2 cache performance up. In particular it's possible - to change the Tag, Data and Way-select RAM access latencies. Baikal-T1 - L2-cache controller block is responsible for the tuning. Its DT node is - supposed to be a child of the system controller. - -properties: - compatible: - const: baikal,bt1-l2-ctl - - reg: - maxItems: 1 - - baikal,l2-ws-latency: - $ref: /schemas/types.yaml#/definitions/uint32 - description: Cycles of latency for Way-select RAM accesses - default: 0 - minimum: 0 - maximum: 3 - - baikal,l2-tag-latency: - $ref: /schemas/types.yaml#/definitions/uint32 - description: Cycles of latency for Tag RAM accesses - default: 0 - minimum: 0 - maximum: 3 - - baikal,l2-data-latency: - $ref: /schemas/types.yaml#/definitions/uint32 - description: Cycles of latency for Data RAM accesses - default: 1 - minimum: 0 - maximum: 3 - -additionalProperties: false - -required: - - compatible - -examples: - - | - l2@1f04d028 { - compatible = "baikal,bt1-l2-ctl"; - reg = <0x1f04d028 0x004>; - - baikal,l2-ws-latency = <1>; - baikal,l2-tag-latency = <1>; - baikal,l2-data-latency = <2>; - }; -... -- cgit From e62fc18213632ee11e35ea1e954a9156cd67a792 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Tue, 24 Jan 2023 17:02:28 -0600 Subject: dt-bindings: Add missing (unevaluated|additional)Properties on child node schemas Just as unevaluatedProperties or additionalProperties are required at the top level of schemas, they should (and will) also be required for child node schemas. That ensures only documented properties are present. Add unevaluatedProperties or additionalProperties as appropriate, and then add any missing properties flagged by the addition. Acked-by: Sebastian Reichel Acked-by: Guenter Roeck Acked-by: Greg Kroah-Hartman Acked-by: Mark Brown Acked-by: Lee Jones Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230124230228.372305-1-robh@kernel.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/memory-controllers/arm,pl35x-smc.yaml | 1 + Documentation/devicetree/bindings/memory-controllers/exynos-srom.yaml | 1 + .../memory-controllers/intel,ixp4xx-expansion-bus-controller.yaml | 1 + .../devicetree/bindings/memory-controllers/nvidia,tegra124-emc.yaml | 1 + .../devicetree/bindings/memory-controllers/st,stm32-fmc2-ebi.yaml | 1 + 5 files changed, 5 insertions(+) (limited to 'Documentation/devicetree/bindings/memory-controllers') diff --git a/Documentation/devicetree/bindings/memory-controllers/arm,pl35x-smc.yaml b/Documentation/devicetree/bindings/memory-controllers/arm,pl35x-smc.yaml index bd23257fe021..6d3962a17e49 100644 --- a/Documentation/devicetree/bindings/memory-controllers/arm,pl35x-smc.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/arm,pl35x-smc.yaml @@ -73,6 +73,7 @@ properties: patternProperties: "@[0-7],[a-f0-9]+$": type: object + additionalProperties: true description: | The child device node represents the controller connected to the SMC bus. The controller can be a NAND controller or a pair of any memory diff --git a/Documentation/devicetree/bindings/memory-controllers/exynos-srom.yaml b/Documentation/devicetree/bindings/memory-controllers/exynos-srom.yaml index c6e44f47ce7c..10a2d97e5f8b 100644 --- a/Documentation/devicetree/bindings/memory-controllers/exynos-srom.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/exynos-srom.yaml @@ -38,6 +38,7 @@ properties: patternProperties: "^.*@[0-3],[a-f0-9]+$": type: object + additionalProperties: true description: The actual device nodes should be added as subnodes to the SROMc node. These subnodes, in addition to regular device specification, should diff --git a/Documentation/devicetree/bindings/memory-controllers/intel,ixp4xx-expansion-bus-controller.yaml b/Documentation/devicetree/bindings/memory-controllers/intel,ixp4xx-expansion-bus-controller.yaml index 188db821dff3..3049d6bb0b1f 100644 --- a/Documentation/devicetree/bindings/memory-controllers/intel,ixp4xx-expansion-bus-controller.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/intel,ixp4xx-expansion-bus-controller.yaml @@ -57,6 +57,7 @@ patternProperties: subnodes. type: object $ref: /schemas/memory-controllers/intel,ixp4xx-expansion-peripheral-props.yaml# + additionalProperties: true required: - compatible diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-emc.yaml b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-emc.yaml index 9163c3f12a85..f5f03bf36413 100644 --- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-emc.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-emc.yaml @@ -50,6 +50,7 @@ properties: patternProperties: "^emc-timings-[0-9]+$": type: object + additionalProperties: false properties: nvidia,ram-code: $ref: /schemas/types.yaml#/definitions/uint32 diff --git a/Documentation/devicetree/bindings/memory-controllers/st,stm32-fmc2-ebi.yaml b/Documentation/devicetree/bindings/memory-controllers/st,stm32-fmc2-ebi.yaml index e76ba767dfd2..14f1833d37c9 100644 --- a/Documentation/devicetree/bindings/memory-controllers/st,stm32-fmc2-ebi.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/st,stm32-fmc2-ebi.yaml @@ -47,6 +47,7 @@ properties: patternProperties: "^.*@[0-4],[a-f0-9]+$": + additionalProperties: true type: object $ref: mc-peripheral-props.yaml# -- cgit