From b43502e925487d6f9d9305f172569335aace9cc8 Mon Sep 17 00:00:00 2001 From: Fabrizio Castro Date: Tue, 11 Jun 2019 14:06:40 +0100 Subject: dt-bindings: timer: renesas: tmu: Document r8a774a1 bindings Document RZ/G2M (R8A774A1) SoC in the Renesas TMU bindings. Signed-off-by: Fabrizio Castro Reviewed-by: Simon Horman Reviewed-by: Rob Herring Acked-by: Daniel Lezcano Link: https://lore.kernel.org/r/1560258401-9517-6-git-send-email-fabrizio.castro@bp.renesas.com Signed-off-by: Geert Uytterhoeven --- Documentation/devicetree/bindings/timer/renesas,tmu.txt | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings/timer') diff --git a/Documentation/devicetree/bindings/timer/renesas,tmu.txt b/Documentation/devicetree/bindings/timer/renesas,tmu.txt index 13ad07416bdd..9dff7e5cae6a 100644 --- a/Documentation/devicetree/bindings/timer/renesas,tmu.txt +++ b/Documentation/devicetree/bindings/timer/renesas,tmu.txt @@ -10,6 +10,7 @@ Required Properties: - compatible: must contain one or more of the following: - "renesas,tmu-r8a7740" for the r8a7740 TMU + - "renesas,tmu-r8a774a1" for the r8a774A1 TMU - "renesas,tmu-r8a774c0" for the r8a774C0 TMU - "renesas,tmu-r8a7778" for the r8a7778 TMU - "renesas,tmu-r8a7779" for the r8a7779 TMU -- cgit From 65eba0db22743320376498555d0c47d65b400d53 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 30 Sep 2019 17:44:17 +0200 Subject: dt-bindings: timer: Convert Exynos MCT bindings to json-schema Convert Samsung Exynos Soc Multi Core Timer bindings to DT schema format using json-schema. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Rob Herring --- .../bindings/timer/samsung,exynos4210-mct.txt | 88 ----------------- .../bindings/timer/samsung,exynos4210-mct.yaml | 107 +++++++++++++++++++++ 2 files changed, 107 insertions(+), 88 deletions(-) delete mode 100644 Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt create mode 100644 Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml (limited to 'Documentation/devicetree/bindings/timer') diff --git a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt deleted file mode 100644 index 8f78640ad64c..000000000000 --- a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt +++ /dev/null @@ -1,88 +0,0 @@ -Samsung's Multi Core Timer (MCT) - -The Samsung's Multi Core Timer (MCT) module includes two main blocks, the -global timer and CPU local timers. The global timer is a 64-bit free running -up-counter and can generate 4 interrupts when the counter reaches one of the -four preset counter values. The CPU local timers are 32-bit free running -down-counters and generate an interrupt when the counter expires. There is -one CPU local timer instantiated in MCT for every CPU in the system. - -Required properties: - -- compatible: should be "samsung,exynos4210-mct". - (a) "samsung,exynos4210-mct", for mct compatible with Exynos4210 mct. - (b) "samsung,exynos4412-mct", for mct compatible with Exynos4412 mct. - -- reg: base address of the mct controller and length of the address space - it occupies. - -- interrupts: the list of interrupts generated by the controller. The following - should be the order of the interrupts specified. The local timer interrupts - should be specified after the four global timer interrupts have been - specified. - - 0: Global Timer Interrupt 0 - 1: Global Timer Interrupt 1 - 2: Global Timer Interrupt 2 - 3: Global Timer Interrupt 3 - 4: Local Timer Interrupt 0 - 5: Local Timer Interrupt 1 - 6: .. - 7: .. - i: Local Timer Interrupt n - - For MCT block that uses a per-processor interrupt for local timers, such - as ones compatible with "samsung,exynos4412-mct", only one local timer - interrupt might be specified, meaning that all local timers use the same - per processor interrupt. - -Example 1: In this example, the IP contains two local timers, using separate - interrupts, so two local timer interrupts have been specified, - in addition to four global timer interrupts. - - mct@10050000 { - compatible = "samsung,exynos4210-mct"; - reg = <0x10050000 0x800>; - interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>, - <0 42 0>, <0 48 0>; - }; - -Example 2: In this example, the timer interrupts are connected to two separate - interrupt controllers. Hence, an interrupt-map is created to map - the interrupts to the respective interrupt controllers. - - mct@101c0000 { - compatible = "samsung,exynos4210-mct"; - reg = <0x101C0000 0x800>; - interrupt-parent = <&mct_map>; - interrupts = <0>, <1>, <2>, <3>, <4>, <5>; - - mct_map: mct-map { - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = <0 &gic 0 57 0>, - <1 &gic 0 69 0>, - <2 &combiner 12 6>, - <3 &combiner 12 7>, - <4 &gic 0 42 0>, - <5 &gic 0 48 0>; - }; - }; - -Example 3: In this example, the IP contains four local timers, but using - a per-processor interrupt to handle them. Either all the local - timer interrupts can be specified, with the same interrupt specifier - value or just the first one. - - mct@10050000 { - compatible = "samsung,exynos4412-mct"; - reg = <0x10050000 0x800>; - - /* Both ways are possible in this case. Either: */ - interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>, - <0 42 0>; - /* or: */ - interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>, - <0 42 0>, <0 42 0>, <0 42 0>, <0 42 0>; - }; diff --git a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml new file mode 100644 index 000000000000..3e26fd5e235a --- /dev/null +++ b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml @@ -0,0 +1,107 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/timer/samsung,exynos4210-mct.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung Exynos SoC Multi Core Timer (MCT) + +maintainers: + - Krzysztof Kozlowski + +description: |+ + The Samsung's Multi Core Timer (MCT) module includes two main blocks, the + global timer and CPU local timers. The global timer is a 64-bit free running + up-counter and can generate 4 interrupts when the counter reaches one of the + four preset counter values. The CPU local timers are 32-bit free running + down-counters and generate an interrupt when the counter expires. There is + one CPU local timer instantiated in MCT for every CPU in the system. + +properties: + compatible: + enum: + - samsung,exynos4210-mct + - samsung,exynos4412-mct + + reg: + maxItems: 1 + + interrupts: + description: | + Interrupts should be put in specific order. This is, the local timer + interrupts should be specified after the four global timer interrupts + have been specified: + 0: Global Timer Interrupt 0 + 1: Global Timer Interrupt 1 + 2: Global Timer Interrupt 2 + 3: Global Timer Interrupt 3 + 4: Local Timer Interrupt 0 + 5: Local Timer Interrupt 1 + 6: .. + 7: .. + i: Local Timer Interrupt n + For MCT block that uses a per-processor interrupt for local timers, such + as ones compatible with "samsung,exynos4412-mct", only one local timer + interrupt might be specified, meaning that all local timers use the same + per processor interrupt. + minItems: 5 # 4 Global + 1 local + maxItems: 20 # 4 Global + 16 local + +required: + - compatible + - interrupts + - reg + +examples: + - | + // In this example, the IP contains two local timers, using separate + // interrupts, so two local timer interrupts have been specified, + // in addition to four global timer interrupts. + + timer@10050000 { + compatible = "samsung,exynos4210-mct"; + reg = <0x10050000 0x800>; + interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>, + <0 42 0>, <0 48 0>; + }; + + - | + // In this example, the timer interrupts are connected to two separate + // interrupt controllers. Hence, an interrupts-extended is needed. + + timer@101c0000 { + compatible = "samsung,exynos4210-mct"; + reg = <0x101C0000 0x800>; + interrupts-extended = <&gic 0 57 0>, + <&gic 0 69 0>, + <&combiner 12 6>, + <&combiner 12 7>, + <&gic 0 42 0>, + <&gic 0 48 0>; + }; + + - | + // In this example, the IP contains four local timers, but using + // a per-processor interrupt to handle them. Only one first local + // interrupt is specified. + + timer@10050000 { + compatible = "samsung,exynos4412-mct"; + reg = <0x10050000 0x800>; + + interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>, + <0 42 0>; + }; + + - | + // In this example, the IP contains four local timers, but using + // a per-processor interrupt to handle them. All the local timer + // interrupts are specified. + + timer@10050000 { + compatible = "samsung,exynos4412-mct"; + reg = <0x10050000 0x800>; + + interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>, + <0 42 0>, <0 42 0>, <0 42 0>, <0 42 0>; + }; -- cgit From 4b73b6f7dca3ef29a68947746a6f3372b1cd96d9 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 30 Sep 2019 17:44:18 +0200 Subject: dt-bindings: timer: Use defines instead of numbers in Exynos MCT examples Make the examples in Exynos Multi Core Timer bindings more readable and bring them closer to real DTS by using defines for interrupt flags. Fix also GIC interrupt type in example for Exynos4412 (from SPI to PPI). Suggested-by: Marek Szyprowski Signed-off-by: Krzysztof Kozlowski Signed-off-by: Rob Herring --- .../bindings/timer/samsung,exynos4210-mct.yaml | 37 ++++++++++++++++------ 1 file changed, 27 insertions(+), 10 deletions(-) (limited to 'Documentation/devicetree/bindings/timer') diff --git a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml index 3e26fd5e235a..273e359854dd 100644 --- a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml +++ b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml @@ -57,51 +57,68 @@ examples: // In this example, the IP contains two local timers, using separate // interrupts, so two local timer interrupts have been specified, // in addition to four global timer interrupts. + #include timer@10050000 { compatible = "samsung,exynos4210-mct"; reg = <0x10050000 0x800>; - interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>, - <0 42 0>, <0 48 0>; + interrupts = , + , + , + , + , + ; }; - | // In this example, the timer interrupts are connected to two separate // interrupt controllers. Hence, an interrupts-extended is needed. + #include timer@101c0000 { compatible = "samsung,exynos4210-mct"; reg = <0x101C0000 0x800>; - interrupts-extended = <&gic 0 57 0>, - <&gic 0 69 0>, + interrupts-extended = <&gic GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, + <&gic GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>, <&combiner 12 6>, <&combiner 12 7>, - <&gic 0 42 0>, - <&gic 0 48 0>; + <&gic GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, + <&gic GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; }; - | // In this example, the IP contains four local timers, but using // a per-processor interrupt to handle them. Only one first local // interrupt is specified. + #include timer@10050000 { compatible = "samsung,exynos4412-mct"; reg = <0x10050000 0x800>; - interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>, - <0 42 0>; + interrupts = , + , + , + , + ; }; - | // In this example, the IP contains four local timers, but using // a per-processor interrupt to handle them. All the local timer // interrupts are specified. + #include timer@10050000 { compatible = "samsung,exynos4412-mct"; reg = <0x10050000 0x800>; - interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>, - <0 42 0>, <0 42 0>, <0 42 0>, <0 42 0>; + interrupts = , + , + , + , + , + , + , + ; }; -- cgit From 0ac624f47dd3474441bb56d64f97192f139b593f Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 24 Sep 2019 10:01:28 -0300 Subject: docs: fix some broken references There are a number of documentation files that got moved or renamed. update their references. Signed-off-by: Mauro Carvalho Chehab Acked-by: Shannon Nelson Acked-by: Guenter Roeck Acked-by: Rob Herring Acked-by: Paul Walmsley # RISC-V Acked-by: Bartosz Golaszewski Signed-off-by: Jonathan Corbet --- Documentation/devicetree/bindings/timer/ingenic,tcu.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings/timer') diff --git a/Documentation/devicetree/bindings/timer/ingenic,tcu.txt b/Documentation/devicetree/bindings/timer/ingenic,tcu.txt index 5a4b9ddd9470..7f6fe20503f5 100644 --- a/Documentation/devicetree/bindings/timer/ingenic,tcu.txt +++ b/Documentation/devicetree/bindings/timer/ingenic,tcu.txt @@ -2,7 +2,7 @@ Ingenic JZ47xx SoCs Timer/Counter Unit devicetree bindings ========================================================== For a description of the TCU hardware and drivers, have a look at -Documentation/mips/ingenic-tcu.txt. +Documentation/mips/ingenic-tcu.rst. Required properties: -- cgit From bfbcbf88f9dbfec0690849aa2d3c429ccafc2aa7 Mon Sep 17 00:00:00 2001 From: Benjamin Gaignard Date: Mon, 14 Oct 2019 11:23:16 +0200 Subject: dt-bindings: timer: Convert stm32 timer bindings to json-schema Convert the STM32 timer binding to DT schema format using json-schema Signed-off-by: Benjamin Gaignard Signed-off-by: Rob Herring --- .../devicetree/bindings/timer/st,stm32-timer.txt | 22 ---------- .../devicetree/bindings/timer/st,stm32-timer.yaml | 47 ++++++++++++++++++++++ 2 files changed, 47 insertions(+), 22 deletions(-) delete mode 100644 Documentation/devicetree/bindings/timer/st,stm32-timer.txt create mode 100644 Documentation/devicetree/bindings/timer/st,stm32-timer.yaml (limited to 'Documentation/devicetree/bindings/timer') diff --git a/Documentation/devicetree/bindings/timer/st,stm32-timer.txt b/Documentation/devicetree/bindings/timer/st,stm32-timer.txt deleted file mode 100644 index 8ef28e70d6e8..000000000000 --- a/Documentation/devicetree/bindings/timer/st,stm32-timer.txt +++ /dev/null @@ -1,22 +0,0 @@ -. STMicroelectronics STM32 timer - -The STM32 MCUs family has several general-purpose 16 and 32 bits timers. - -Required properties: -- compatible : Should be "st,stm32-timer" -- reg : Address and length of the register set -- clocks : Reference on the timer input clock -- interrupts : Reference to the timer interrupt - -Optional properties: -- resets: Reference to a reset controller asserting the timer - -Example: - -timer5: timer@40000c00 { - compatible = "st,stm32-timer"; - reg = <0x40000c00 0x400>; - interrupts = <50>; - resets = <&rrc 259>; - clocks = <&clk_pmtr1>; -}; diff --git a/Documentation/devicetree/bindings/timer/st,stm32-timer.yaml b/Documentation/devicetree/bindings/timer/st,stm32-timer.yaml new file mode 100644 index 000000000000..176aa3c9baf8 --- /dev/null +++ b/Documentation/devicetree/bindings/timer/st,stm32-timer.yaml @@ -0,0 +1,47 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/timer/st,stm32-timer.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: STMicroelectronics STM32 general-purpose 16 and 32 bits timers bindings + +maintainers: + - Benjamin Gaignard + +properties: + compatible: + const: st,stm32-timer + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + resets: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - clocks + +additionalProperties: false + +examples: + - | + #include + #include + timer: timer@40000c00 { + compatible = "st,stm32-timer"; + reg = <0x40000c00 0x400>; + interrupts = <50>; + clocks = <&clk_pmtr1>; + }; + +... -- cgit From d14e0fe39c6204f0c35d7d7da50b5727df8a3560 Mon Sep 17 00:00:00 2001 From: Dehui Sun Date: Mon, 28 Oct 2019 14:09:43 +0800 Subject: dt-bindings: mediatek: update bindings for MT8183 systimer This commit adds mt8183 compatible node in mtk-timer binding document. Reviewed-by: Rob Herring Signed-off-by: Dehui Sun Acked-by: Daniel Lezcano Signed-off-by: Matthias Brugger --- Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings/timer') diff --git a/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt b/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt index 74c3eadad844..0d256486f886 100644 --- a/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt +++ b/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt @@ -21,6 +21,7 @@ Required properties: * "mediatek,mt6577-timer" for MT6577 and all above compatible timers (GPT) For those SoCs that use SYST + * "mediatek,mt8183-timer" for MT8183 compatible timers (SYST) * "mediatek,mt7629-timer" for MT7629 compatible timers (SYST) * "mediatek,mt6765-timer" for MT6765 and all above compatible timers (SYST) -- cgit From 89650a1e3b6f877517121b67063f53d20a233deb Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 21 Oct 2019 18:02:06 +0200 Subject: dt-bindings: pwm: Convert PWM bindings to json-schema Convert generic PWM controller bindings to DT schema format using json-schema. The consumer bindings are provided by dt-schema. Signed-off-by: Krzysztof Kozlowski Acked-by: Stephen Boyd Acked-by: Paul Walmsley Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/timer/ingenic,tcu.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings/timer') diff --git a/Documentation/devicetree/bindings/timer/ingenic,tcu.txt b/Documentation/devicetree/bindings/timer/ingenic,tcu.txt index 5a4b9ddd9470..0c7bd51c19eb 100644 --- a/Documentation/devicetree/bindings/timer/ingenic,tcu.txt +++ b/Documentation/devicetree/bindings/timer/ingenic,tcu.txt @@ -42,7 +42,7 @@ Required properties: - compatible: Must be one of: * ingenic,jz4740-pwm * ingenic,jz4725b-pwm -- #pwm-cells: Should be 3. See ../pwm/pwm.txt for a description of the cell +- #pwm-cells: Should be 3. See ../pwm/pwm.yaml for a description of the cell format. - clocks: List of phandle & clock specifiers for the TCU clocks. - clock-names: List of name strings for the TCU clocks. -- cgit