From 37de951b3656eb0421065695409e7dbeaccee039 Mon Sep 17 00:00:00 2001 From: Daniele Alessandrelli Date: Fri, 17 Jul 2020 10:04:11 +0100 Subject: dt-bindings: arm: Add Keem Bay bindings Document Intel Movidius SoC code-named Keem Bay, along with the Keem Bay EVM board. Link: https://lore.kernel.org/r/20200717090414.313530-3-daniele.alessandrelli@linux.intel.com Reviewed-by: Dinh Nguyen Reviewed-by: Rob Herring Signed-off-by: Daniele Alessandrelli Signed-off-by: Arnd Bergmann --- .../devicetree/bindings/arm/intel,keembay.yaml | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/intel,keembay.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/intel,keembay.yaml b/Documentation/devicetree/bindings/arm/intel,keembay.yaml new file mode 100644 index 000000000000..4d925785f504 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/intel,keembay.yaml @@ -0,0 +1,19 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/intel,keembay.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Keem Bay platform device tree bindings + +maintainers: + - Paul J. Murphy + - Daniele Alessandrelli + +properties: + compatible: + items: + - enum: + - intel,keembay-evm + - const: intel,keembay +... -- cgit From 85032207c86dcb6e13a3afd0650c44ecfc6df4c6 Mon Sep 17 00:00:00 2001 From: Lars Povlsen Date: Mon, 15 Jun 2020 15:32:33 +0200 Subject: dt-bindings: arm: sparx5: Add documentation for Microchip Sparx5 SoC This adds the main Sparx5 SoC DT documentation file, with information abut the supported board types. Link: https://lore.kernel.org/r/20200615133242.24911-2-lars.povlsen@microchip.com Reviewed-by: Alexandre Belloni Signed-off-by: Lars Povlsen Reviewed-by: Rob Herring Signed-off-by: Arnd Bergmann --- .../devicetree/bindings/arm/microchip,sparx5.yaml | 65 ++++++++++++++++++++++ Documentation/devicetree/bindings/mfd/syscon.yaml | 1 + 2 files changed, 66 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/microchip,sparx5.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/microchip,sparx5.yaml b/Documentation/devicetree/bindings/arm/microchip,sparx5.yaml new file mode 100644 index 000000000000..ecf6fa12e6ad --- /dev/null +++ b/Documentation/devicetree/bindings/arm/microchip,sparx5.yaml @@ -0,0 +1,65 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/microchip,sparx5.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip Sparx5 Boards Device Tree Bindings + +maintainers: + - Lars Povlsen + +description: |+ + The Microchip Sparx5 SoC is a ARMv8-based used in a family of + gigabit TSN-capable gigabit switches. + + The SparX-5 Ethernet switch family provides a rich set of switching + features such as advanced TCAM-based VLAN and QoS processing + enabling delivery of differentiated services, and security through + TCAM-based frame processing using versatile content aware processor + (VCAP) + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - description: The Sparx5 pcb125 board is a modular board, + which has both spi-nor and eMMC storage. The modular design + allows for connection of different network ports. + items: + - const: microchip,sparx5-pcb125 + - const: microchip,sparx5 + + - description: The Sparx5 pcb134 is a pizzabox form factor + gigabit switch with 20 SFP ports. It features spi-nor and + either spi-nand or eMMC storage (mount option). + items: + - const: microchip,sparx5-pcb134 + - const: microchip,sparx5 + + - description: The Sparx5 pcb135 is a pizzabox form factor + gigabit switch with 48+4 Cu ports. It features spi-nor and + either spi-nand or eMMC storage (mount option). + items: + - const: microchip,sparx5-pcb135 + - const: microchip,sparx5 + + axi@600000000: + type: object + description: the root node in the Sparx5 platforms must contain + an axi bus child node. They are always at physical address + 0x600000000 in all the Sparx5 variants. + properties: + compatible: + items: + - const: simple-bus + + required: + - compatible + +required: + - compatible + - axi@600000000 + +... diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml index 19bdaf781853..f3fba860d3cc 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -38,6 +38,7 @@ properties: - allwinner,sun8i-h3-system-controller - allwinner,sun8i-v3s-system-controller - allwinner,sun50i-a64-system-controller + - microchip,sparx5-cpu-syscon - const: syscon -- cgit From 2ce39f20d0bfa2cae289beaf0ab1aa37fb2b93e6 Mon Sep 17 00:00:00 2001 From: Lars Povlsen Date: Mon, 15 Jun 2020 15:32:38 +0200 Subject: dt-bindings: clock: sparx5: Add Sparx5 SoC DPLL clock This add the DT bindings documentation for the Sparx5 SoC DPLL clock Link: https://lore.kernel.org/r/20200615133242.24911-7-lars.povlsen@microchip.com Reviewed-by: Alexandre Belloni Signed-off-by: Lars Povlsen Reviewed-by: Rob Herring Signed-off-by: Arnd Bergmann --- .../bindings/clock/microchip,sparx5-dpll.yaml | 52 ++++++++++++++++++++++ 1 file changed, 52 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/microchip,sparx5-dpll.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/clock/microchip,sparx5-dpll.yaml b/Documentation/devicetree/bindings/clock/microchip,sparx5-dpll.yaml new file mode 100644 index 000000000000..39559a0a598a --- /dev/null +++ b/Documentation/devicetree/bindings/clock/microchip,sparx5-dpll.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/microchip,sparx5-dpll.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip Sparx5 DPLL Clock + +maintainers: + - Lars Povlsen + +description: | + The Sparx5 DPLL clock controller generates and supplies clock to + various peripherals within the SoC. + +properties: + compatible: + const: microchip,sparx5-dpll + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + '#clock-cells': + const: 1 + +required: + - compatible + - reg + - clocks + - '#clock-cells' + +additionalProperties: false + +examples: + # Clock provider for eMMC: + - | + lcpll_clk: lcpll-clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <2500000000>; + }; + clks: clock-controller@61110000c { + compatible = "microchip,sparx5-dpll"; + #clock-cells = <1>; + clocks = <&lcpll_clk>; + reg = <0x1110000c 0x24>; + }; + +... -- cgit From f7d85e73f92026e436b0068066cf862c08521818 Mon Sep 17 00:00:00 2001 From: Daniel Palmer Date: Fri, 10 Jul 2020 18:45:33 +0900 Subject: dt-bindings: vendor-prefixes: Add mstar vendor prefix Add prefix for MStar Semiconductor, Inc. Signed-off-by: Daniel Palmer Signed-off-by: Arnd Bergmann Acked-by: Rob Herring Signed-off-by: Arnd Bergmann --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 9aeab66be85f..b09b6c9911c3 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -680,6 +680,8 @@ patternProperties: description: Microsemi Corporation "^msi,.*": description: Micro-Star International Co. Ltd. + "^mstar,.*": + description: MStar Semiconductor, Inc. (acquired by MediaTek Inc.) "^mti,.*": description: Imagination Technologies Ltd. (formerly MIPS Technologies Inc.) "^multi-inno,.*": -- cgit From 108fc78f16fb070d4e809229e180bcf4effc797e Mon Sep 17 00:00:00 2001 From: Daniel Palmer Date: Fri, 10 Jul 2020 18:45:34 +0900 Subject: dt-bindings: vendor-prefixes: Add sstar vendor prefix Add prefix for Xiamen Xingchen Technology Co., Ltd Signed-off-by: Daniel Palmer Signed-off-by: Arnd Bergmann Acked-by: Rob Herring Signed-off-by: Arnd Bergmann --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index b09b6c9911c3..ba5bd3b0ed9a 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -986,6 +986,8 @@ patternProperties: description: Spreadtrum Communications Inc. "^sst,.*": description: Silicon Storage Technology, Inc. + "^sstar,.*": + description: Xiamen Xingchen(SigmaStar) Technology Co., Ltd. (formerly part of MStar Semiconductor, Inc.) "^st,.*": description: STMicroelectronics "^starry,.*": -- cgit From cdef4702e2799a58e32021c345c3a43ca72f9c27 Mon Sep 17 00:00:00 2001 From: Daniel Palmer Date: Fri, 10 Jul 2020 18:45:35 +0900 Subject: dt-bindings: vendor-prefixes: Add 70mai vendor prefix Add prefix for 70mai Co., Ltd Signed-off-by: Daniel Palmer Signed-off-by: Arnd Bergmann Acked-by: Rob Herring Signed-off-by: Arnd Bergmann --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index ba5bd3b0ed9a..53cd050668e6 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -23,6 +23,8 @@ patternProperties: "^(simple-audio-card|simple-graph-card|st-plgpio|st-spics|ts),.*": true # Keep list in alphabetical order. + "^70mai,.*": + description: 70mai Co., Ltd. "^abilis,.*": description: Abilis Systems "^abracon,.*": -- cgit From d1b6e3bd85f02e7ead020de9cd87fcd0326ae9ad Mon Sep 17 00:00:00 2001 From: Daniel Palmer Date: Fri, 10 Jul 2020 18:45:36 +0900 Subject: dt-bindings: vendor-prefixes: Add thingy.jp prefix Add prefix for thingy.jp Signed-off-by: Daniel Palmer Signed-off-by: Arnd Bergmann Acked-by: Rob Herring Signed-off-by: Arnd Bergmann --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 53cd050668e6..c209b3dc7ecc 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -1038,6 +1038,8 @@ patternProperties: description: Three Five Corp "^thine,.*": description: THine Electronics, Inc. + "^thingyjp,.*": + description: thingy.jp "^ti,.*": description: Texas Instruments "^tianma,.*": -- cgit From 343e8f7286e87f60ef7cc8c8b140e254f550886f Mon Sep 17 00:00:00 2001 From: Daniel Palmer Date: Fri, 10 Jul 2020 18:45:37 +0900 Subject: dt-bindings: arm: Add mstar YAML schema Signed-off-by: Daniel Palmer Signed-off-by: Arnd Bergmann Reviewed-by: Rob Herring Signed-off-by: Arnd Bergmann --- Documentation/devicetree/bindings/arm/mstar.yaml | 33 ++++++++++++++++++++++++ 1 file changed, 33 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/mstar.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/mstar.yaml b/Documentation/devicetree/bindings/arm/mstar.yaml new file mode 100644 index 000000000000..bdce34b3336e --- /dev/null +++ b/Documentation/devicetree/bindings/arm/mstar.yaml @@ -0,0 +1,33 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/mstar.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MStar platforms device tree bindings + +maintainers: + - Daniel Palmer + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - description: infinity boards + items: + - enum: + - thingyjp,breadbee-crust # thingy.jp BreadBee Crust + - const: mstar,infinity + + - description: infinity3 boards + items: + - enum: + - thingyjp,breadbee # thingy.jp BreadBee + - const: mstar,infinity3 + + - description: mercury5 boards + items: + - enum: + - 70mai,midrived08 # 70mai midrive d08 + - const: mstar,mercury5 -- cgit From 09220c579c7873a89a07f4f55da9662b1b95355f Mon Sep 17 00:00:00 2001 From: Daniel Palmer Date: Fri, 10 Jul 2020 18:45:39 +0900 Subject: ARM: mstar: Add binding details for mstar,l3bridge This adds a YAML description of the l3bridge node needed by the platform code for the MStar/SigmaStar Armv7 SoCs. Signed-off-by: Daniel Palmer Signed-off-by: Arnd Bergmann Reviewed-by: Rob Herring Signed-off-by: Arnd Bergmann --- .../devicetree/bindings/misc/mstar,l3bridge.yaml | 44 ++++++++++++++++++++++ 1 file changed, 44 insertions(+) create mode 100644 Documentation/devicetree/bindings/misc/mstar,l3bridge.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/misc/mstar,l3bridge.yaml b/Documentation/devicetree/bindings/misc/mstar,l3bridge.yaml new file mode 100644 index 000000000000..cb7fd1cdfb1a --- /dev/null +++ b/Documentation/devicetree/bindings/misc/mstar,l3bridge.yaml @@ -0,0 +1,44 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2020 thingy.jp. +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/misc/mstar,l3bridge.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: MStar/SigmaStar Armv7 SoC l3bridge + +maintainers: + - Daniel Palmer + +description: | + MStar/SigmaStar's Armv7 SoCs have a pipeline in the interface + between the CPU and memory. This means that before DMA capable + devices are allowed to run the pipeline must be flushed to ensure + everything is in memory. + + The l3bridge region contains registers that allow such a flush + to be triggered. + + This node is used by the platform code to find where the registers + are and install a barrier that triggers the required pipeline flush. + +properties: + compatible: + items: + - const: mstar,l3bridge + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + l3bridge: l3bridge@1f204400 { + compatible = "mstar,l3bridge"; + reg = <0x1f204400 0x200>; + }; -- cgit From 33cabc0bc679022160c48f96e2d358e666710f58 Mon Sep 17 00:00:00 2001 From: Daniel Palmer Date: Tue, 28 Jul 2020 19:03:13 +0900 Subject: dt-bindings: arm: mstar: Add binding details for mstar, pmsleep This adds a YAML description of the pmsleep node used by MStar/SigmaStar Armv7 SoCs. Signed-off-by: Daniel Palmer Signed-off-by: Arnd Bergmann --- .../bindings/arm/mstar/mstar,pmsleep.yaml | 43 ++++++++++++++++++++++ 1 file changed, 43 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/mstar/mstar,pmsleep.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/mstar/mstar,pmsleep.yaml b/Documentation/devicetree/bindings/arm/mstar/mstar,pmsleep.yaml new file mode 100644 index 000000000000..ef78097a7087 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/mstar/mstar,pmsleep.yaml @@ -0,0 +1,43 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2020 thingy.jp. +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/arm/mstar/mstar,pmsleep.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: MStar/SigmaStar Armv7 SoC pmsleep register region + +maintainers: + - Daniel Palmer + +description: | + MStar/Sigmastar's Armv7 SoCs contain a region of registers that are + in the always on domain that the vendor code calls the "pmsleep" area. + + This area contains registers and bits for a broad range of functionality + ranging from registers that control going into deep sleep to bits that + turn things like the internal temperature sensor on and off. + +properties: + compatible: + oneOf: + - items: + - enum: + - mstar,pmsleep + - const: syscon + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + pmsleep: pmsleep@1c00 { + compatible = "mstar,pmsleep", "syscon"; + reg = <0x0x1c00 0x100>; + }; -- cgit From 9e30b098f25f525af048e685ccb79fc958cfd200 Mon Sep 17 00:00:00 2001 From: Daniel Palmer Date: Tue, 28 Jul 2020 19:03:14 +0900 Subject: dt-bindings: arm: mstar: Move existing MStar binding descriptions Now there is an mstar directory move the existing MStar specific descriptions into that directory. Signed-off-by: Daniel Palmer Signed-off-by: Arnd Bergmann --- Documentation/devicetree/bindings/arm/mstar.yaml | 33 ---------------- .../bindings/arm/mstar/mstar,l3bridge.yaml | 44 ++++++++++++++++++++++ .../devicetree/bindings/arm/mstar/mstar.yaml | 33 ++++++++++++++++ .../devicetree/bindings/misc/mstar,l3bridge.yaml | 44 ---------------------- 4 files changed, 77 insertions(+), 77 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/mstar.yaml create mode 100644 Documentation/devicetree/bindings/arm/mstar/mstar,l3bridge.yaml create mode 100644 Documentation/devicetree/bindings/arm/mstar/mstar.yaml delete mode 100644 Documentation/devicetree/bindings/misc/mstar,l3bridge.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/mstar.yaml b/Documentation/devicetree/bindings/arm/mstar.yaml deleted file mode 100644 index bdce34b3336e..000000000000 --- a/Documentation/devicetree/bindings/arm/mstar.yaml +++ /dev/null @@ -1,33 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/arm/mstar.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: MStar platforms device tree bindings - -maintainers: - - Daniel Palmer - -properties: - $nodename: - const: '/' - compatible: - oneOf: - - description: infinity boards - items: - - enum: - - thingyjp,breadbee-crust # thingy.jp BreadBee Crust - - const: mstar,infinity - - - description: infinity3 boards - items: - - enum: - - thingyjp,breadbee # thingy.jp BreadBee - - const: mstar,infinity3 - - - description: mercury5 boards - items: - - enum: - - 70mai,midrived08 # 70mai midrive d08 - - const: mstar,mercury5 diff --git a/Documentation/devicetree/bindings/arm/mstar/mstar,l3bridge.yaml b/Documentation/devicetree/bindings/arm/mstar/mstar,l3bridge.yaml new file mode 100644 index 000000000000..6816bd68f9cf --- /dev/null +++ b/Documentation/devicetree/bindings/arm/mstar/mstar,l3bridge.yaml @@ -0,0 +1,44 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2020 thingy.jp. +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/arm/mstar/mstar,l3bridge.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: MStar/SigmaStar Armv7 SoC l3bridge + +maintainers: + - Daniel Palmer + +description: | + MStar/SigmaStar's Armv7 SoCs have a pipeline in the interface + between the CPU and memory. This means that before DMA capable + devices are allowed to run the pipeline must be flushed to ensure + everything is in memory. + + The l3bridge region contains registers that allow such a flush + to be triggered. + + This node is used by the platform code to find where the registers + are and install a barrier that triggers the required pipeline flush. + +properties: + compatible: + items: + - const: mstar,l3bridge + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + l3bridge: l3bridge@1f204400 { + compatible = "mstar,l3bridge"; + reg = <0x1f204400 0x200>; + }; diff --git a/Documentation/devicetree/bindings/arm/mstar/mstar.yaml b/Documentation/devicetree/bindings/arm/mstar/mstar.yaml new file mode 100644 index 000000000000..c2f980b00b06 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/mstar/mstar.yaml @@ -0,0 +1,33 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/mstar/mstar.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MStar platforms device tree bindings + +maintainers: + - Daniel Palmer + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - description: infinity boards + items: + - enum: + - thingyjp,breadbee-crust # thingy.jp BreadBee Crust + - const: mstar,infinity + + - description: infinity3 boards + items: + - enum: + - thingyjp,breadbee # thingy.jp BreadBee + - const: mstar,infinity3 + + - description: mercury5 boards + items: + - enum: + - 70mai,midrived08 # 70mai midrive d08 + - const: mstar,mercury5 diff --git a/Documentation/devicetree/bindings/misc/mstar,l3bridge.yaml b/Documentation/devicetree/bindings/misc/mstar,l3bridge.yaml deleted file mode 100644 index cb7fd1cdfb1a..000000000000 --- a/Documentation/devicetree/bindings/misc/mstar,l3bridge.yaml +++ /dev/null @@ -1,44 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) -# Copyright 2020 thingy.jp. -%YAML 1.2 ---- -$id: "http://devicetree.org/schemas/misc/mstar,l3bridge.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" - -title: MStar/SigmaStar Armv7 SoC l3bridge - -maintainers: - - Daniel Palmer - -description: | - MStar/SigmaStar's Armv7 SoCs have a pipeline in the interface - between the CPU and memory. This means that before DMA capable - devices are allowed to run the pipeline must be flushed to ensure - everything is in memory. - - The l3bridge region contains registers that allow such a flush - to be triggered. - - This node is used by the platform code to find where the registers - are and install a barrier that triggers the required pipeline flush. - -properties: - compatible: - items: - - const: mstar,l3bridge - - reg: - maxItems: 1 - -required: - - compatible - - reg - -additionalProperties: false - -examples: - - | - l3bridge: l3bridge@1f204400 { - compatible = "mstar,l3bridge"; - reg = <0x1f204400 0x200>; - }; -- cgit From 4b4b27e4330e8fd0e3b96a2fd801f3ac188f5e79 Mon Sep 17 00:00:00 2001 From: Daniel Palmer Date: Thu, 30 Jul 2020 00:07:46 +0900 Subject: dt-bindings: mfd: syscon: add compatible string for mstar,msc313-pmsleep Add a compatible string for the pmsleep register region in the MStar MSC313 SoC. Link: https://lore.kernel.org/r/20200729150748.1945589-2-daniel@0x0f.com Signed-off-by: Daniel Palmer Signed-off-by: Arnd Bergmann --- Documentation/devicetree/bindings/mfd/syscon.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml index f3fba860d3cc..614e58bb5d7d 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -39,6 +39,7 @@ properties: - allwinner,sun8i-v3s-system-controller - allwinner,sun50i-a64-system-controller - microchip,sparx5-cpu-syscon + - mstar,msc313-pmsleep - const: syscon -- cgit From 1eb47d0a80281decf9b5c8cd08a6da932746a908 Mon Sep 17 00:00:00 2001 From: Daniel Palmer Date: Thu, 30 Jul 2020 00:07:47 +0900 Subject: dt-bindings: arm: mstar: remove the binding description for mstar,pmsleep Remove the unneeded binding description. Compatible string is in mfd/syscon.yaml now. Link: https://lore.kernel.org/r/20200729150748.1945589-3-daniel@0x0f.com Signed-off-by: Daniel Palmer Signed-off-by: Arnd Bergmann --- .../bindings/arm/mstar/mstar,pmsleep.yaml | 43 ---------------------- 1 file changed, 43 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/mstar/mstar,pmsleep.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/mstar/mstar,pmsleep.yaml b/Documentation/devicetree/bindings/arm/mstar/mstar,pmsleep.yaml deleted file mode 100644 index ef78097a7087..000000000000 --- a/Documentation/devicetree/bindings/arm/mstar/mstar,pmsleep.yaml +++ /dev/null @@ -1,43 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) -# Copyright 2020 thingy.jp. -%YAML 1.2 ---- -$id: "http://devicetree.org/schemas/arm/mstar/mstar,pmsleep.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" - -title: MStar/SigmaStar Armv7 SoC pmsleep register region - -maintainers: - - Daniel Palmer - -description: | - MStar/Sigmastar's Armv7 SoCs contain a region of registers that are - in the always on domain that the vendor code calls the "pmsleep" area. - - This area contains registers and bits for a broad range of functionality - ranging from registers that control going into deep sleep to bits that - turn things like the internal temperature sensor on and off. - -properties: - compatible: - oneOf: - - items: - - enum: - - mstar,pmsleep - - const: syscon - - reg: - maxItems: 1 - -required: - - compatible - - reg - -additionalProperties: false - -examples: - - | - pmsleep: pmsleep@1c00 { - compatible = "mstar,pmsleep", "syscon"; - reg = <0x0x1c00 0x100>; - }; -- cgit