From bdfdf4b2ba644347d63a61da941f30aea1bd35fc Mon Sep 17 00:00:00 2001 From: Phil Edworthy Date: Thu, 28 Feb 2019 13:52:09 +0000 Subject: dt: snps,designware-i2c: Add clock bindings documentation The driver requires an undocumented clock property, so detail it. Add documentation for a separate, optional, interface clock. Signed-off-by: Phil Edworthy Signed-off-by: Gareth Williams Acked-by: Wolfram Sang Reviewed-by: Rob Herring Reviewed-by: Jarkko Nikula Signed-off-by: Wolfram Sang --- Documentation/devicetree/bindings/i2c/i2c-designware.txt | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/i2c/i2c-designware.txt b/Documentation/devicetree/bindings/i2c/i2c-designware.txt index 3e4bcc2fb6f7..08be4d3846e5 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-designware.txt +++ b/Documentation/devicetree/bindings/i2c/i2c-designware.txt @@ -6,12 +6,21 @@ Required properties : or "mscc,ocelot-i2c" with "snps,designware-i2c" for fallback - reg : Offset and length of the register set for the device - interrupts : where IRQ is the interrupt number. + - clocks : phandles for the clocks, see the description of clock-names below. + The phandle for the "ic_clk" clock is required. The phandle for the "pclk" + clock is optional. If a single clock is specified but no clock-name, it is + the "ic_clk" clock. If both clocks are listed, the "ic_clk" must be first. Recommended properties : - clock-frequency : desired I2C bus clock frequency in Hz. Optional properties : + + - clock-names : Contains the names of the clocks: + "ic_clk", for the core clock used to generate the external I2C clock. + "pclk", the interface clock, required for register access. + - reg : for "mscc,ocelot-i2c", a second register set to configure the SDA hold time, named ICPU_CFG:TWI_DELAY in the datasheet. -- cgit From d333bad1f6f3e0df224db181c991fb8d65bbc2be Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 20 Mar 2019 11:33:51 +0100 Subject: dt-bindings: at24: add Renesas R1EX24016 Document the compatible value for the Renesas R1EX24128ASAS0A two-wire serial interface EEPROM, so it can be used in DTS files without causing checkpatch warnings. This is a 2 KiB EEPROM. The first 1 KiB can always be written, the second 1 KiB cannot be written if the write-protect line is asserted. Signed-off-by: Geert Uytterhoeven Signed-off-by: Bartosz Golaszewski --- Documentation/devicetree/bindings/eeprom/at24.txt | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/eeprom/at24.txt b/Documentation/devicetree/bindings/eeprom/at24.txt index 0e456bbc1213..22aead844d0f 100644 --- a/Documentation/devicetree/bindings/eeprom/at24.txt +++ b/Documentation/devicetree/bindings/eeprom/at24.txt @@ -50,6 +50,7 @@ Required properties: "nxp,se97b" - the fallback is "atmel,24c02", "renesas,r1ex24002" - the fallback is "atmel,24c02" + "renesas,r1ex24016" - the fallback is "atmel,24c16" "renesas,r1ex24128" - the fallback is "atmel,24c128" "rohm,br24t01" - the fallback is "atmel,24c01" -- cgit From 472ec0ce3ef4111c1b55e6f677599cef4b52eed1 Mon Sep 17 00:00:00 2001 From: Bich HEMON Date: Wed, 6 Mar 2019 15:11:51 +0000 Subject: dt-bindings: i2c: stm32: remove extra spaces Remove extra spaces before colons. Signed-off-by: Bich Hemon Reviewed-by: Pierre-Yves MORDRET Signed-off-by: Wolfram Sang --- .../devicetree/bindings/i2c/i2c-stm32.txt | 26 +++++++++++----------- 1 file changed, 13 insertions(+), 13 deletions(-) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/i2c/i2c-stm32.txt b/Documentation/devicetree/bindings/i2c/i2c-stm32.txt index 69240e189b01..7d054f1a5b2b 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-stm32.txt +++ b/Documentation/devicetree/bindings/i2c/i2c-stm32.txt @@ -1,11 +1,11 @@ * I2C controller embedded in STMicroelectronics STM32 I2C platform -Required properties : -- compatible : Must be one of the following +Required properties: +- compatible: Must be one of the following - "st,stm32f4-i2c" - "st,stm32f7-i2c" -- reg : Offset and length of the register set for the device -- interrupts : Must contain the interrupt id for I2C event and then the +- reg: Offset and length of the register set for the device +- interrupts: Must contain the interrupt id for I2C event and then the interrupt id for I2C error. - resets: Must contain the phandle to the reset controller. - clocks: Must contain the input clock of the I2C instance. @@ -14,25 +14,25 @@ Required properties : - #address-cells = <1>; - #size-cells = <0>; -Optional properties : -- clock-frequency : Desired I2C bus clock frequency in Hz. If not specified, +Optional properties: +- clock-frequency: Desired I2C bus clock frequency in Hz. If not specified, the default 100 kHz frequency will be used. For STM32F4 SoC Standard-mode and Fast-mode are supported, possible values are 100000 and 400000. For STM32F7 SoC, Standard-mode, Fast-mode and Fast-mode Plus are supported, possible values are 100000, 400000 and 1000000. -- i2c-scl-rising-time-ns : Only for STM32F7, I2C SCL Rising time for the board +- i2c-scl-rising-time-ns: Only for STM32F7, I2C SCL Rising time for the board (default: 25) -- i2c-scl-falling-time-ns : Only for STM32F7, I2C SCL Falling time for the board +- i2c-scl-falling-time-ns: Only for STM32F7, I2C SCL Falling time for the board (default: 10) I2C Timings are derived from these 2 values -- st,syscfg-fmp: Only for STM32F7, use to set Fast Mode Plus bit within SYSCFG +- st,syscfg-fmp: Only for STM32F7, use to set Fast Mode Plus bit within SYSCFG whether Fast Mode Plus speed is selected by slave. - 1st cell : phandle to syscfg - 2nd cell : register offset within SYSCFG - 3rd cell : register bitmask for FMP bit + 1st cell: phandle to syscfg + 2nd cell: register offset within SYSCFG + 3rd cell: register bitmask for FMP bit -Example : +Example: i2c@40005400 { compatible = "st,stm32f4-i2c"; -- cgit From 36ea73cb9a42aaf67451f6a9373777363a6ce508 Mon Sep 17 00:00:00 2001 From: Bich HEMON Date: Wed, 6 Mar 2019 15:11:51 +0000 Subject: dt-bindings: i2c: stm32: update optional properties for stm32h7/stm32mp1 Add STM32H7 and STM32MP1 in the list of compatible socs for each optional property. Signed-off-by: Bich Hemon Reviewed-by: Pierre-Yves MORDRET Signed-off-by: Wolfram Sang --- Documentation/devicetree/bindings/i2c/i2c-stm32.txt | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/i2c/i2c-stm32.txt b/Documentation/devicetree/bindings/i2c/i2c-stm32.txt index 7d054f1a5b2b..f334738f7a35 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-stm32.txt +++ b/Documentation/devicetree/bindings/i2c/i2c-stm32.txt @@ -19,18 +19,19 @@ Optional properties: the default 100 kHz frequency will be used. For STM32F4 SoC Standard-mode and Fast-mode are supported, possible values are 100000 and 400000. - For STM32F7 SoC, Standard-mode, Fast-mode and Fast-mode Plus are supported, - possible values are 100000, 400000 and 1000000. -- i2c-scl-rising-time-ns: Only for STM32F7, I2C SCL Rising time for the board - (default: 25) -- i2c-scl-falling-time-ns: Only for STM32F7, I2C SCL Falling time for the board - (default: 10) + For STM32F7, STM32H7 and STM32MP1 SoCs, Standard-mode, Fast-mode and Fast-mode + Plus are supported, possible values are 100000, 400000 and 1000000. +- i2c-scl-rising-time-ns: I2C SCL Rising time for the board (default: 25) + For STM32F7, STM32H7 and STM32MP1 only. +- i2c-scl-falling-time-ns: I2C SCL Falling time for the board (default: 10) + For STM32F7, STM32H7 and STM32MP1 only. I2C Timings are derived from these 2 values -- st,syscfg-fmp: Only for STM32F7, use to set Fast Mode Plus bit within SYSCFG - whether Fast Mode Plus speed is selected by slave. +- st,syscfg-fmp: Use to set Fast Mode Plus bit within SYSCFG when Fast Mode + Plus speed is selected by slave. 1st cell: phandle to syscfg 2nd cell: register offset within SYSCFG 3rd cell: register bitmask for FMP bit + For STM32F7, STM32H7 and STM32MP1 only. Example: -- cgit From 682587080da998886461cb0dc9b609d1b6205277 Mon Sep 17 00:00:00 2001 From: Ray Jui Date: Tue, 2 Apr 2019 18:18:25 -0700 Subject: dt-bindings: i2c: iproc: make 'interrupts' optional Update the binding document to make the 'interrupts' property optional. For certain revisions of the I2C controller (e.g., iProc NIC I2C), I2C interrupt is unwired to the interrupt controller. In such case, this 'interrupts' property should be left unspecified, and driver will fall back to polling mode Signed-off-by: Ray Jui Signed-off-by: Rayagonda Kokatanur Reviewed-by: Rob Herring Signed-off-by: Wolfram Sang --- Documentation/devicetree/bindings/i2c/brcm,iproc-i2c.txt | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/i2c/brcm,iproc-i2c.txt b/Documentation/devicetree/bindings/i2c/brcm,iproc-i2c.txt index 81f982ccca31..7a32bf81bfa9 100644 --- a/Documentation/devicetree/bindings/i2c/brcm,iproc-i2c.txt +++ b/Documentation/devicetree/bindings/i2c/brcm,iproc-i2c.txt @@ -9,9 +9,6 @@ Required properties: Define the base and range of the I/O address space that contain the iProc I2C controller registers -- interrupts: - Should contain the I2C interrupt - - clock-frequency: This is the I2C bus clock. Need to be either 100000 or 400000 @@ -21,6 +18,14 @@ Required properties: - #size-cells: Always 0 +Optional properties: + +- interrupts: + Should contain the I2C interrupt. For certain revisions of the I2C + controller, I2C interrupt is unwired to the interrupt controller. In such + case, this property should be left unspecified, and driver will fall back + to polling mode + Example: i2c0: i2c@18008000 { compatible = "brcm,iproc-i2c"; -- cgit From 12402f825d3b83de57bd2902989dc54a5a2128d4 Mon Sep 17 00:00:00 2001 From: Rayagonda Kokatanur Date: Tue, 2 Apr 2019 18:18:28 -0700 Subject: dt-bindings: i2c: iproc: add "brcm, iproc-nic-i2c" compatible string Update iProc I2C binding document to add new compatible string "brcm,iproc-nic-i2c". Optional property "brcm,ape-hsls-addr-mask" is also added that allows configuration of the host view into the APE's address for "brcm,iproc-nic-i2c" Signed-off-by: Rayagonda Kokatanur Signed-off-by: Ray Jui Reviewed-by: Rob Herring Signed-off-by: Wolfram Sang --- Documentation/devicetree/bindings/i2c/brcm,iproc-i2c.txt | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/i2c/brcm,iproc-i2c.txt b/Documentation/devicetree/bindings/i2c/brcm,iproc-i2c.txt index 7a32bf81bfa9..d12cc33cca6c 100644 --- a/Documentation/devicetree/bindings/i2c/brcm,iproc-i2c.txt +++ b/Documentation/devicetree/bindings/i2c/brcm,iproc-i2c.txt @@ -3,7 +3,7 @@ Broadcom iProc I2C controller Required properties: - compatible: - Must be "brcm,iproc-i2c" + Must be "brcm,iproc-i2c" or "brcm,iproc-nic-i2c" - reg: Define the base and range of the I/O address space that contain the iProc @@ -26,6 +26,10 @@ Optional properties: case, this property should be left unspecified, and driver will fall back to polling mode +- brcm,ape-hsls-addr-mask: + Required for "brcm,iproc-nic-i2c". Host view of address mask into the + 'APE' co-processor. Value must be unsigned, 32-bit + Example: i2c0: i2c@18008000 { compatible = "brcm,iproc-i2c"; -- cgit From a3438152c66728e5dc15a3aa167b836ce7329e68 Mon Sep 17 00:00:00 2001 From: Qii Wang Date: Tue, 2 Apr 2019 20:35:56 +0800 Subject: dt-bindings: i2c: Add Mediatek MT8183 i2c binding Add MT8183 i2c binding to binding file. Compare to MT2712 i2c controller, MT8183 has different registers, offsets, and clock. Signed-off-by: Qii Wang Reviewed-by: Rob Herring Reviewed-by: Matthias Brugger Signed-off-by: Wolfram Sang --- Documentation/devicetree/bindings/i2c/i2c-mtk.txt | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/i2c/i2c-mtk.txt b/Documentation/devicetree/bindings/i2c/i2c-mtk.txt index ee4c32454198..b052f29e72f0 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-mtk.txt +++ b/Documentation/devicetree/bindings/i2c/i2c-mtk.txt @@ -12,13 +12,15 @@ Required properties: "mediatek,mt7623-i2c", "mediatek,mt6577-i2c": for MediaTek MT7623 "mediatek,mt7629-i2c", "mediatek,mt2712-i2c": for MediaTek MT7629 "mediatek,mt8173-i2c": for MediaTek MT8173 + "mediatek,mt8183-i2c": for MediaTek MT8183 - reg: physical base address of the controller and dma base, length of memory mapped region. - interrupts: interrupt number to the cpu. - clock-div: the fixed value for frequency divider of clock source in i2c module. Each IC may be different. - clocks: clock name from clock manager - - clock-names: Must include "main" and "dma", if enable have-pmic need include + - clock-names: Must include "main" and "dma", "arb" is for multi-master that + one bus has more than two i2c controllers, if enable have-pmic need include "pmic" extra. Optional properties: -- cgit From 18073da76973f8ce75ee1d622f2a4d2d1b6121a8 Mon Sep 17 00:00:00 2001 From: Fabien Parent Date: Sat, 23 Mar 2019 22:16:10 +0100 Subject: dt-bindings: i2c: i2c-mtk: add support for MT8516 Add binding documentation of i2c-mtk for MT8516 SoC. Signed-off-by: Fabien Parent Acked-by: Rob Herring Acked-by: Matthias Brugger Signed-off-by: Wolfram Sang --- Documentation/devicetree/bindings/i2c/i2c-mtk.txt | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/i2c/i2c-mtk.txt b/Documentation/devicetree/bindings/i2c/i2c-mtk.txt index b052f29e72f0..68f6d73a8b73 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-mtk.txt +++ b/Documentation/devicetree/bindings/i2c/i2c-mtk.txt @@ -13,6 +13,7 @@ Required properties: "mediatek,mt7629-i2c", "mediatek,mt2712-i2c": for MediaTek MT7629 "mediatek,mt8173-i2c": for MediaTek MT8173 "mediatek,mt8183-i2c": for MediaTek MT8183 + "mediatek,mt8516-i2c", "mediatek,mt2712-i2c": for MediaTek MT8516 - reg: physical base address of the controller and dma base, length of memory mapped region. - interrupts: interrupt number to the cpu. -- cgit From e6ae3ca27477226eae77cc00d5fad89d7ce64aea Mon Sep 17 00:00:00 2001 From: Chris Brandt Date: Tue, 30 Apr 2019 08:23:05 -0500 Subject: dt-bindings: i2c: riic: document r7s9210 support Document support for the R7S9210 (RZ/A2) SoC. Also explicitly document bindings for the R7S72100 (RZ/A1) SoC. Signed-off-by: Chris Brandt Reviewed-by: Geert Uytterhoeven Reviewed-by: Rob Herring Signed-off-by: Wolfram Sang --- Documentation/devicetree/bindings/i2c/i2c-riic.txt | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/i2c/i2c-riic.txt b/Documentation/devicetree/bindings/i2c/i2c-riic.txt index 0bcc4716c319..e26fe3ad86a9 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-riic.txt +++ b/Documentation/devicetree/bindings/i2c/i2c-riic.txt @@ -1,7 +1,10 @@ Device tree configuration for Renesas RIIC driver Required properties: -- compatible : "renesas,riic-". "renesas,riic-rz" as fallback +- compatible : + "renesas,riic-r7s72100" if the device is a part of a R7S72100 SoC. + "renesas,riic-r7s9210" if the device is a part of a R7S9210 SoC. + "renesas,riic-rz" for a generic RZ/A compatible device. - reg : address start and address range size of device - interrupts : 8 interrupts (TEI, RI, TI, SPI, STI, NAKI, ALI, TMOI) - clock-frequency : frequency of bus clock in Hz -- cgit