From 42586315b7b6e682bd4136a1a2bc2b1d50113487 Mon Sep 17 00:00:00 2001 From: Xiubo Li Date: Thu, 27 Feb 2014 17:39:52 +0800 Subject: Documentation: Add device tree bindings for Freescale FTM PWM. This adds the binding documentation for Freescale FlexTimer Module (FTM) PWM driver under Documentation/devicetree/bindings/pwm/. Signed-off-by: Xiubo Li Reviewed-by: Sascha Hauer Reviewed-by: Yuan Yao Acked-by: Kumar Gala Signed-off-by: Thierry Reding --- .../devicetree/bindings/pwm/pwm-fsl-ftm.txt | 35 ++++++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt b/Documentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt new file mode 100644 index 000000000000..0bda229a6171 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt @@ -0,0 +1,35 @@ +Freescale FlexTimer Module (FTM) PWM controller + +Required properties: +- compatible: Should be "fsl,vf610-ftm-pwm". +- reg: Physical base address and length of the controller's registers +- #pwm-cells: Should be 3. See pwm.txt in this directory for a description of + the cells format. +- clock-names: Should include the following module clock source entries: + "ftm_sys" (module clock, also can be used as counter clock), + "ftm_ext" (external counter clock), + "ftm_fix" (fixed counter clock), + "ftm_cnt_clk_en" (external and fixed counter clock enable/disable). +- clocks: Must contain a phandle and clock specifier for each entry in + clock-names, please see clock/clock-bindings.txt for details of the property + values. +- pinctrl-names: Must contain a "default" entry. +- pinctrl-NNN: One property must exist for each entry in pinctrl-names. + See pinctrl/pinctrl-bindings.txt for details of the property values. + + +Example: + +pwm0: pwm@40038000 { + compatible = "fsl,vf610-ftm-pwm"; + reg = <0x40038000 0x1000>; + #pwm-cells = <3>; + clock-names = "ftm_sys", "ftm_ext", + "ftm_fix", "ftm_cnt_clk_en"; + clocks = <&clks VF610_CLK_FTM0>, + <&clks VF610_CLK_FTM0_EXT_SEL>, + <&clks VF610_CLK_FTM0_FIX_SEL>, + <&clks VF610_CLK_FTM0_EXT_FIX_EN>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm0_1>; +}; -- cgit From 7eb3f6ffb5c3635e8cc5df7b19741b4bfc5894f5 Mon Sep 17 00:00:00 2001 From: Alexander Shiyan Date: Wed, 12 Mar 2014 19:53:05 +0400 Subject: pwm: Add CLPS711X PWM support Add a new driver for the ARM CLPS711X Pulse Width Modulator (PWM) interface. This CPU contain two 4-bit PWM outputs with constant period, based on CPU PLL frequency. PWM polarity is determined by hardware by power on reset. Signed-off-by: Alexander Shiyan Signed-off-by: Thierry Reding --- .../devicetree/bindings/pwm/cirrus,clps711x-pwm.txt | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/cirrus,clps711x-pwm.txt (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/pwm/cirrus,clps711x-pwm.txt b/Documentation/devicetree/bindings/pwm/cirrus,clps711x-pwm.txt new file mode 100644 index 000000000000..a183db48f910 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/cirrus,clps711x-pwm.txt @@ -0,0 +1,16 @@ +* Cirris Logic CLPS711X PWM controller + +Required properties: +- compatible: Shall contain "cirrus,clps711x-pwm". +- reg: Physical base address and length of the controller's registers. +- clocks: phandle + clock specifier pair of the PWM reference clock. +- #pwm-cells: Should be 1. The cell specifies the index of the channel. + +Example: + pwm: pwm@80000400 { + compatible = "cirrus,ep7312-pwm", + "cirrus,clps711x-pwm"; + reg = <0x80000400 0x4>; + clocks = <&clks 8>; + #pwm-cells = <1>; + }; -- cgit