From 6dd5d3b8ad2b5a30509c76f164a61b32351aafdd Mon Sep 17 00:00:00 2001 From: Alexandru Ardelean Date: Fri, 10 Apr 2020 23:40:37 +0800 Subject: arch: nios2: rename 'altr,gpio-bank-width' -> 'altr,ngpio' There is no more 'altr,gpio-bank-width' in the 'altr,pio-1.0' driver. There is a 'altr,ngpio' which is what the property wants to configure. This change updates all occurrences of 'altr,gpio-bank-width' to 'altr,ngpio'. Signed-off-by: Alexandru Ardelean Signed-off-by: Ley Foon Tan --- Documentation/devicetree/bindings/fpga/fpga-region.txt | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/fpga/fpga-region.txt b/Documentation/devicetree/bindings/fpga/fpga-region.txt index 90c44694a30b..b0dacb6a3390 100644 --- a/Documentation/devicetree/bindings/fpga/fpga-region.txt +++ b/Documentation/devicetree/bindings/fpga/fpga-region.txt @@ -263,7 +263,7 @@ Overlay contains: gpio@10040 { compatible = "altr,pio-1.0"; reg = <0x10040 0x20>; - altr,gpio-bank-width = <4>; + altr,ngpio = <4>; #gpio-cells = <2>; clocks = <2>; gpio-controller; @@ -468,7 +468,7 @@ programming is the FPGA based bridge of fpga_region1. compatible = "altr,pio-1.0"; reg = <0x10040 0x20>; clocks = <0x2>; - altr,gpio-bank-width = <0x4>; + altr,ngpio = <0x4>; resetvalue = <0x0>; #gpio-cells = <0x2>; gpio-controller; -- cgit From d00935affc8f9485c5ae0cb5868c436264446f9e Mon Sep 17 00:00:00 2001 From: Alexandru Ardelean Date: Fri, 10 Apr 2020 23:41:18 +0800 Subject: arch: nios2: remove 'resetvalue' property The 'altr,pio-1.0' driver does not handle the 'resetvalue', so remove it. Signed-off-by: Alexandru Ardelean Signed-off-by: Ley Foon Tan --- Documentation/devicetree/bindings/fpga/fpga-region.txt | 1 - 1 file changed, 1 deletion(-) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/fpga/fpga-region.txt b/Documentation/devicetree/bindings/fpga/fpga-region.txt index b0dacb6a3390..8ab19d1d3f9a 100644 --- a/Documentation/devicetree/bindings/fpga/fpga-region.txt +++ b/Documentation/devicetree/bindings/fpga/fpga-region.txt @@ -469,7 +469,6 @@ programming is the FPGA based bridge of fpga_region1. reg = <0x10040 0x20>; clocks = <0x2>; altr,ngpio = <0x4>; - resetvalue = <0x0>; #gpio-cells = <0x2>; gpio-controller; }; -- cgit