From 7ea651ec392ecbd52227e009a482b571ce7b3bce Mon Sep 17 00:00:00 2001 From: Sagar Shrikant Kadam Date: Sat, 1 Jun 2019 11:41:13 +0530 Subject: dt-bindings: i2c: extend existing opencore bindings Reformatted compatibility strings to one valid combination on each line. Add FU540-C000 specific device tree bindings to already available i2-ocores file. This device is available on HiFive Unleashed Rev A00 board. Move interrupt under optional property list as this can be optional. The FU540-C000 SoC from sifive, has an Opencore's I2C block reimplementation. The DT compatibility string for this IP is present in HDL and available at. https://github.com/sifive/sifive-blocks/blob/master/src/main/scala/devices/i2c/I2C.scala#L73 Signed-off-by: Sagar Shrikant Kadam Reviewed-by: Rob Herring Signed-off-by: Wolfram Sang --- Documentation/devicetree/bindings/i2c/i2c-ocores.txt | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/i2c/i2c-ocores.txt b/Documentation/devicetree/bindings/i2c/i2c-ocores.txt index 17bef9a34e50..6b25a80ae8d3 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-ocores.txt +++ b/Documentation/devicetree/bindings/i2c/i2c-ocores.txt @@ -1,9 +1,13 @@ Device tree configuration for i2c-ocores Required properties: -- compatible : "opencores,i2c-ocores" or "aeroflexgaisler,i2cmst" +- compatible : "opencores,i2c-ocores" + "aeroflexgaisler,i2cmst" + "sifive,fu540-c000-i2c", "sifive,i2c0" + For Opencore based I2C IP block reimplemented in + FU540-C000 SoC. Please refer to sifive-blocks-ip-versioning.txt + for additional details. - reg : bus address start and address range size of device -- interrupts : interrupt number - clocks : handle to the controller clock; see the note below. Mutually exclusive with opencores,ip-clock-frequency - opencores,ip-clock-frequency: frequency of the controller clock in Hz; @@ -12,6 +16,7 @@ Required properties: - #size-cells : should be <0> Optional properties: +- interrupts : interrupt number. - clock-frequency : frequency of bus clock in Hz; see the note below. Defaults to 100 KHz when the property is not specified - reg-shift : device register offsets are shifted by this value -- cgit From 315cd67c945351f8a569500f8ab16b7fa94026e8 Mon Sep 17 00:00:00 2001 From: Alexander Sverdlin Date: Tue, 18 Jun 2019 17:06:50 +0000 Subject: i2c: i801: Add Block Write-Block Read Process Call support Add SMBUS 2.0 Block Write-Block Read Process Call command support. Signed-off-by: Alexander Sverdlin Reviewed-by: Jean Delvare Signed-off-by: Wolfram Sang --- Documentation/i2c/busses/i2c-i801 | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/i2c/busses/i2c-i801 b/Documentation/i2c/busses/i2c-i801 index ee9984f35868..cafb7e05f951 100644 --- a/Documentation/i2c/busses/i2c-i801 +++ b/Documentation/i2c/busses/i2c-i801 @@ -88,7 +88,7 @@ SMBus controller. Process Call Support -------------------- -Not supported. +Block process call is supported on the 82801EB (ICH5) and later chips. I2C Block Read Support -- cgit From 9be1485accd4a0375170b93f90894e7728029078 Mon Sep 17 00:00:00 2001 From: Jarkko Nikula Date: Thu, 20 Jun 2019 13:51:26 +0300 Subject: i2c: i801: Add support for Intel Elkhart Lake Add PCI ID for Intel Elkhart Lake PCH. Signed-off-by: Jarkko Nikula Reviewed-by: Jean Delvare Signed-off-by: Wolfram Sang --- Documentation/i2c/busses/i2c-i801 | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/i2c/busses/i2c-i801 b/Documentation/i2c/busses/i2c-i801 index cafb7e05f951..d247edcb0f99 100644 --- a/Documentation/i2c/busses/i2c-i801 +++ b/Documentation/i2c/busses/i2c-i801 @@ -37,6 +37,7 @@ Supported adapters: * Intel Cedar Fork (PCH) * Intel Ice Lake (PCH) * Intel Comet Lake (PCH) + * Intel Elkhart Lake (PCH) Datasheets: Publicly available at the Intel website On Intel Patsburg and later chipsets, both the normal host SMBus controller -- cgit From 05af0765707fc136433ab380d5d627afe3b8dda9 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Thu, 20 Jun 2019 22:01:47 +0200 Subject: i2c: mux: demux-pinctrl: use proper email address for ABI requests Use my commercial address, not my community one. Signed-off-by: Wolfram Sang Reviewed-by: Simon Horman [Removed a misplaced newline. /Peter] Signed-off-by: Peter Rosin --- Documentation/ABI/testing/sysfs-platform-i2c-demux-pinctrl | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-platform-i2c-demux-pinctrl b/Documentation/ABI/testing/sysfs-platform-i2c-demux-pinctrl index 3c3514815cd5..c394b808be19 100644 --- a/Documentation/ABI/testing/sysfs-platform-i2c-demux-pinctrl +++ b/Documentation/ABI/testing/sysfs-platform-i2c-demux-pinctrl @@ -1,7 +1,7 @@ What: /sys/devices/platform//available_masters Date: January 2016 KernelVersion: 4.6 -Contact: Wolfram Sang +Contact: Wolfram Sang Description: Reading the file will give you a list of masters which can be selected for a demultiplexed bus. The format is @@ -12,7 +12,7 @@ Description: What: /sys/devices/platform//current_master Date: January 2016 KernelVersion: 4.6 -Contact: Wolfram Sang +Contact: Wolfram Sang Description: This file selects/shows the active I2C master for a demultiplexed bus. It uses the value from the file 'available_masters'. -- cgit From 71731e1b2da17f5d2a9ca654c66c393d89cba9e6 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Mon, 17 Jun 2019 10:31:16 +0200 Subject: dt-bindings: i2c: i2c-mt7621: Add bindings for MediaTek MT7621/28/88 I2C Add bindings for the I2C controller that can be found in the MediaTek MT7621/7628/7688 SoCs. Signed-off-by: Stefan Roese Signed-off-by: Wolfram Sang --- .../devicetree/bindings/i2c/i2c-mt7621.txt | 25 ++++++++++++++++++++++ 1 file changed, 25 insertions(+) create mode 100644 Documentation/devicetree/bindings/i2c/i2c-mt7621.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/i2c/i2c-mt7621.txt b/Documentation/devicetree/bindings/i2c/i2c-mt7621.txt new file mode 100644 index 000000000000..bc36f0eb94cd --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/i2c-mt7621.txt @@ -0,0 +1,25 @@ +MediaTek MT7621/MT7628 I2C master controller + +Required properties: + +- compatible: Should be one of the following: + - "mediatek,mt7621-i2c": for MT7621/MT7628/MT7688 platforms +- #address-cells: should be 1. +- #size-cells: should be 0. +- reg: Address and length of the register set for the device +- resets: phandle to the reset controller asserting this device in + reset + See ../reset/reset.txt for details. + +Optional properties : + +Example: + +i2c: i2c@900 { + compatible = "mediatek,mt7621-i2c"; + reg = <0x900 0x100>; + #address-cells = <1>; + #size-cells = <0>; + resets = <&rstctrl 16>; + reset-names = "i2c"; +}; -- cgit From bbddb0fc3bbf07dd0b2785c8581c97a2fd58a174 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Tue, 11 Jun 2019 11:03:08 +0200 Subject: dt-bindings: i2c: sun6i-p2wi: Add YAML schemas Switch the DT binding to a YAML schema to enable the DT validation. Signed-off-by: Maxime Ripard Reviewed-by: Rob Herring Signed-off-by: Wolfram Sang --- .../bindings/i2c/allwinner,sun6i-a31-p2wi.yaml | 65 ++++++++++++++++++++++ .../devicetree/bindings/i2c/i2c-sun6i-p2wi.txt | 41 -------------- 2 files changed, 65 insertions(+), 41 deletions(-) create mode 100644 Documentation/devicetree/bindings/i2c/allwinner,sun6i-a31-p2wi.yaml delete mode 100644 Documentation/devicetree/bindings/i2c/i2c-sun6i-p2wi.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/i2c/allwinner,sun6i-a31-p2wi.yaml b/Documentation/devicetree/bindings/i2c/allwinner,sun6i-a31-p2wi.yaml new file mode 100644 index 000000000000..1804abe24f14 --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/allwinner,sun6i-a31-p2wi.yaml @@ -0,0 +1,65 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/i2c/allwinner,sun6i-a31-p2wi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Allwinner A31 P2WI (Push/Pull 2 Wires Interface) Device Tree Bindings + +maintainers: + - Chen-Yu Tsai + - Maxime Ripard + +allOf: + - $ref: /schemas/i2c/i2c-controller.yaml# + +properties: + compatible: + const: allwinner,sun6i-a31-p2wi + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + resets: + maxItems: 1 + + clock-frequency: + minimum: 1 + maximum: 6000000 + +required: + - compatible + - reg + - interrupts + - clocks + - resets + +# FIXME: We should set it, but it would report all the generic +# properties as additional properties. +# additionalProperties: false + +examples: + - | + i2c@1f03400 { + compatible = "allwinner,sun6i-a31-p2wi"; + reg = <0x01f03400 0x400>; + interrupts = <0 39 4>; + clocks = <&apb0_gates 3>; + clock-frequency = <6000000>; + resets = <&apb0_rst 3>; + #address-cells = <1>; + #size-cells = <0>; + + axp221: pmic@68 { + compatible = "x-powers,axp221"; + reg = <0x68>; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/i2c/i2c-sun6i-p2wi.txt b/Documentation/devicetree/bindings/i2c/i2c-sun6i-p2wi.txt deleted file mode 100644 index 49df0053347a..000000000000 --- a/Documentation/devicetree/bindings/i2c/i2c-sun6i-p2wi.txt +++ /dev/null @@ -1,41 +0,0 @@ - -* Allwinner P2WI (Push/Pull 2 Wire Interface) controller - -Required properties : - - - reg : Offset and length of the register set for the device. - - compatible : Should one of the following: - - "allwinner,sun6i-a31-p2wi" - - interrupts : The interrupt line connected to the P2WI peripheral. - - clocks : The gate clk connected to the P2WI peripheral. - - resets : The reset line connected to the P2WI peripheral. - -Optional properties : - - - clock-frequency : Desired P2WI bus clock frequency in Hz. If not set the -default frequency is 100kHz - -A P2WI may contain one child node encoding a P2WI slave device. - -Slave device properties: - Required properties: - - reg : the I2C slave address used during the initialization - process to switch from I2C to P2WI mode - -Example: - - p2wi@1f03400 { - compatible = "allwinner,sun6i-a31-p2wi"; - reg = <0x01f03400 0x400>; - interrupts = <0 39 4>; - clocks = <&apb0_gates 3>; - clock-frequency = <6000000>; - resets = <&apb0_rst 3>; - - axp221: pmic@68 { - compatible = "x-powers,axp221"; - reg = <0x68>; - - /* ... */ - }; - }; -- cgit From f8bbde72ef44417e41d4731b05264dcbfb9f962a Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Tue, 11 Jun 2019 11:03:09 +0200 Subject: dt-bindings: i2c: mv64xxx: Add YAML schemas Switch the DT binding to a YAML schema to enable the DT validation. Signed-off-by: Maxime Ripard Reviewed-by: Rob Herring Acked-by: Gregory CLEMENT Signed-off-by: Wolfram Sang --- .../devicetree/bindings/i2c/i2c-mv64xxx.txt | 64 ----------- .../bindings/i2c/marvell,mv64xxx-i2c.yaml | 124 +++++++++++++++++++++ 2 files changed, 124 insertions(+), 64 deletions(-) delete mode 100644 Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt create mode 100644 Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt b/Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt deleted file mode 100644 index 0ffe65a316ae..000000000000 --- a/Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt +++ /dev/null @@ -1,64 +0,0 @@ - -* Marvell MV64XXX I2C controller - -Required properties : - - - reg : Offset and length of the register set for the device - - compatible : Should be either: - - "allwinner,sun4i-a10-i2c" - - "allwinner,sun6i-a31-i2c" - - "marvell,mv64xxx-i2c" - - "marvell,mv78230-i2c" - - "marvell,mv78230-a0-i2c" - * Note: Only use "marvell,mv78230-a0-i2c" for a - very rare, initial version of the SoC which - had broken offload support. Linux - auto-detects this and sets it appropriately. - - interrupts : The interrupt number - -Optional properties : - - - clock-frequency : Desired I2C bus clock frequency in Hz. If not set the -default frequency is 100kHz - - - resets : phandle to the parent reset controller. Mandatory - whenever you're using the "allwinner,sun6i-a31-i2c" - compatible. - - - clocks: : pointers to the reference clocks for this device, the - first one is the one used for the clock on the i2c bus, - the second one is the clock used to acces the registers - of the controller - - - clock-names : names of used clocks, mandatory if the second clock is - used, the name must be "core", and "reg" (the latter is - only for Armada 7K/8K). - -Examples: - - i2c@11000 { - compatible = "marvell,mv64xxx-i2c"; - reg = <0x11000 0x20>; - interrupts = <29>; - clock-frequency = <100000>; - }; - -For the Armada XP: - - i2c@11000 { - compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c"; - reg = <0x11000 0x100>; - interrupts = <29>; - clock-frequency = <100000>; - }; - -For the Armada 7040: - - i2c@701000 { - compatible = "marvell,mv78230-i2c"; - reg = <0x701000 0x20>; - interrupts = <29>; - clock-frequency = <100000>; - clock-names = "core", "reg"; - clocks = <&core_clock>, <®_clock>; - }; diff --git a/Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml b/Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml new file mode 100644 index 000000000000..9a5654ef5670 --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml @@ -0,0 +1,124 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/i2c/marvell,mv64xxx-i2c.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell MV64XXX I2C Controller Device Tree Bindings + +maintainers: + - Gregory CLEMENT + +properties: + compatible: + oneOf: + - const: allwinner,sun4i-a10-i2c + - items: + - const: allwinner,sun7i-a20-i2c + - const: allwinner,sun4i-a10-i2c + - const: allwinner,sun6i-a31-i2c + - items: + - const: allwinner,sun8i-a23-i2c + - const: allwinner,sun6i-a31-i2c + - items: + - const: allwinner,sun8i-a83t-i2c + - const: allwinner,sun6i-a31-i2c + - items: + - const: allwinner,sun50i-a64-i2c + - const: allwinner,sun6i-a31-i2c + + - const: marvell,mv64xxx-i2c + - const: marvell,mv78230-i2c + - const: marvell,mv78230-a0-i2c + + description: + Only use "marvell,mv78230-a0-i2c" for a very rare, initial + version of the SoC which had broken offload support. Linux + auto-detects this and sets it appropriately. + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + minItems: 1 + maxItems: 2 + items: + - description: Reference clock for the I2C bus + - description: Bus clock (Only for Armada 7K/8K) + + clock-names: + minItems: 1 + maxItems: 2 + items: + - const: core + - const: reg + description: + Mandatory if two clocks are used (only for Armada 7k and 8k). + + resets: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + +allOf: + - $ref: /schemas/i2c/i2c-controller.yaml# + - if: + properties: + compatible: + contains: + enum: + - allwinner,sun4i-a10-i2c + - allwinner,sun6i-a31-i2c + + then: + required: + - clocks + + - if: + properties: + compatible: + contains: + const: allwinner,sun6i-a31-i2c + + then: + required: + - resets + +# FIXME: We should set it, but it would report all the generic +# properties as additional properties. +# additionalProperties: false + +examples: + - | + i2c@11000 { + compatible = "marvell,mv64xxx-i2c"; + reg = <0x11000 0x20>; + interrupts = <29>; + clock-frequency = <100000>; + }; + + - | + i2c@11000 { + compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c"; + reg = <0x11000 0x100>; + interrupts = <29>; + clock-frequency = <100000>; + }; + + - | + i2c@701000 { + compatible = "marvell,mv78230-i2c"; + reg = <0x701000 0x20>; + interrupts = <29>; + clock-frequency = <100000>; + clock-names = "core", "reg"; + clocks = <&core_clock>, <®_clock>; + }; + +... -- cgit From 4601db7ecf078523cd49b4d8953969739ed36bf4 Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Wed, 5 Jun 2019 14:15:04 +0530 Subject: dt-bindings: i2c: omap: Add new compatible for J721E SoCs J721E SoCs have same I2C IP as OMAP SoCs. Add new compatible to handle J721E SoCs. Signed-off-by: Peter Ujfalusi Signed-off-by: Vignesh Raghavendra Signed-off-by: Wolfram Sang --- Documentation/devicetree/bindings/i2c/i2c-omap.txt | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/i2c/i2c-omap.txt b/Documentation/devicetree/bindings/i2c/i2c-omap.txt index 4b90ba9f31b7..a44573d7c118 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-omap.txt +++ b/Documentation/devicetree/bindings/i2c/i2c-omap.txt @@ -7,6 +7,7 @@ Required properties : "ti,omap3-i2c" for OMAP3 SoCs "ti,omap4-i2c" for OMAP4+ SoCs "ti,am654-i2c", "ti,omap4-i2c" for AM654 SoCs + "ti,j721e-i2c", "ti,omap4-i2c" for J721E SoCs - ti,hwmods : Must be "i2c", n being the instance number (1-based) - #address-cells = <1>; - #size-cells = <0>; -- cgit From 102a3375e6671e6ca85dbde245a5071f8c09b760 Mon Sep 17 00:00:00 2001 From: Fabrice Gasnier Date: Tue, 4 Jun 2019 15:34:13 +0200 Subject: dt-bindings: i2c-stm32: document optional dmas Add missing documentation for "dmas" and "dma-names" properties that can be used on i2c-stm32. Signed-off-by: Fabrice Gasnier Reviewed-by: Pierre-Yves MORDRET Signed-off-by: Wolfram Sang --- Documentation/devicetree/bindings/i2c/i2c-stm32.txt | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/i2c/i2c-stm32.txt b/Documentation/devicetree/bindings/i2c/i2c-stm32.txt index f334738f7a35..ce3df2fff6c8 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-stm32.txt +++ b/Documentation/devicetree/bindings/i2c/i2c-stm32.txt @@ -21,6 +21,8 @@ Optional properties: 100000 and 400000. For STM32F7, STM32H7 and STM32MP1 SoCs, Standard-mode, Fast-mode and Fast-mode Plus are supported, possible values are 100000, 400000 and 1000000. +- dmas: List of phandles to rx and tx DMA channels. Refer to stm32-dma.txt. +- dma-names: List of dma names. Valid names are: "rx" and "tx". - i2c-scl-rising-time-ns: I2C SCL Rising time for the board (default: 25) For STM32F7, STM32H7 and STM32MP1 only. - i2c-scl-falling-time-ns: I2C SCL Falling time for the board (default: 10) -- cgit From 051d769f0a36b4642897d909cef980f944ae20ab Mon Sep 17 00:00:00 2001 From: Jarkko Nikula Date: Mon, 1 Jul 2019 16:15:34 +0300 Subject: i2c: i801: Add support for Intel Tiger Lake Add SMBUS PCI ID for Intel Tiger Lake -LP. Signed-off-by: Jarkko Nikula Reviewed-by: Jean Delvare Signed-off-by: Wolfram Sang --- Documentation/i2c/busses/i2c-i801 | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/i2c/busses/i2c-i801 b/Documentation/i2c/busses/i2c-i801 index d247edcb0f99..04b5de80ce4e 100644 --- a/Documentation/i2c/busses/i2c-i801 +++ b/Documentation/i2c/busses/i2c-i801 @@ -38,6 +38,7 @@ Supported adapters: * Intel Ice Lake (PCH) * Intel Comet Lake (PCH) * Intel Elkhart Lake (PCH) + * Intel Tiger Lake (PCH) Datasheets: Publicly available at the Intel website On Intel Patsburg and later chipsets, both the normal host SMBus controller -- cgit From ed6182a83924c2385679afd5a3b9cd3d41e2ef44 Mon Sep 17 00:00:00 2001 From: Jean Delvare Date: Thu, 4 Jul 2019 11:34:02 +0200 Subject: i2c: i801: Documentation update The i2c-i801 driver documentation needs some dusting: * Mention disable_features flag 0x20. * The i2c_ec driver has been removed from the kernel long ago. Driver i2c-scmi serves the same purpose for more recent hardware. * Replace obsolete /proc paths with equivalent /sys paths. Signed-off-by: Jean Delvare Reviewed-by: Jarkko Nikula Signed-off-by: Wolfram Sang --- Documentation/i2c/busses/i2c-i801 | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) (limited to 'Documentation') diff --git a/Documentation/i2c/busses/i2c-i801 b/Documentation/i2c/busses/i2c-i801 index 04b5de80ce4e..f426c13c63a9 100644 --- a/Documentation/i2c/busses/i2c-i801 +++ b/Documentation/i2c/busses/i2c-i801 @@ -60,6 +60,7 @@ question doesn't work as intended for whatever reason. Bit values: 0x02 disable the block buffer 0x08 disable the I2C block read functionality 0x10 don't use interrupts + 0x20 disable SMBus Host Notify Description @@ -120,16 +121,15 @@ BIOS to enable it, it means it has been hidden by the BIOS code. Asus is well known for first doing this on their P4B motherboard, and many other boards after that. Some vendor machines are affected as well. -The first thing to try is the "i2c_ec" ACPI driver. It could be that the +The first thing to try is the "i2c-scmi" ACPI driver. It could be that the SMBus was hidden on purpose because it'll be driven by ACPI. If the -i2c_ec driver works for you, just forget about the i2c-i801 driver and -don't try to unhide the ICH SMBus. Even if i2c_ec doesn't work, you +i2c-scmi driver works for you, just forget about the i2c-i801 driver and +don't try to unhide the ICH SMBus. Even if i2c-scmi doesn't work, you better make sure that the SMBus isn't used by the ACPI code. Try loading -the "fan" and "thermal" drivers, and check in /proc/acpi/fan and -/proc/acpi/thermal_zone. If you find anything there, it's likely that -the ACPI is accessing the SMBus and it's safer not to unhide it. Only -once you are certain that ACPI isn't using the SMBus, you can attempt -to unhide it. +the "fan" and "thermal" drivers, and check in /sys/class/thermal. If you +find a thermal zone with type "acpitz", it's likely that the ACPI is +accessing the SMBus and it's safer not to unhide it. Only once you are +certain that ACPI isn't using the SMBus, you can attempt to unhide it. In order to unhide the SMBus, we need to change the value of a PCI register before the kernel enumerates the PCI devices. This is done in -- cgit From 166f28c3eed269190d310ec611476b78101c309b Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Wed, 3 Jul 2019 11:53:37 +0200 Subject: dt-bindings: i2c: mv64xxx: Fix the example compatible One example has a compatible that isn't a valid combination according to the binding, and now that the examples are validated as well, this generates a warning. Let's fix this. Signed-off-by: Maxime Ripard Acked-by: Gregory CLEMENT Reviewed-by: Rob Herring Signed-off-by: Wolfram Sang --- Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml b/Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml index 9a5654ef5670..001f2b7abad0 100644 --- a/Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml @@ -105,7 +105,7 @@ examples: - | i2c@11000 { - compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c"; + compatible = "marvell,mv78230-i2c"; reg = <0x11000 0x100>; interrupts = <29>; clock-frequency = <100000>; -- cgit From 0038617132dea5c0516b6208a6d005ec9293ab94 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Wed, 3 Jul 2019 11:53:38 +0200 Subject: dt-bindings: i2c: sun6i-p2wi: Fix the binding example Even though the binding claims that the frequency can go up to 6MHz, the common i2c binding sets a limit at 3MHz, which then triggers a warning. Since the only SoC that uses that bus uses a frequency of 100kHz, and that this bus hasn't been found in an SoC for something like 5 years, let's just fix the example to have a frequency within the acceptable range for i2c. Signed-off-by: Maxime Ripard Acked-by: Gregory CLEMENT Reviewed-by: Rob Herring Signed-off-by: Wolfram Sang --- Documentation/devicetree/bindings/i2c/allwinner,sun6i-a31-p2wi.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/i2c/allwinner,sun6i-a31-p2wi.yaml b/Documentation/devicetree/bindings/i2c/allwinner,sun6i-a31-p2wi.yaml index 1804abe24f14..f9d526b7da01 100644 --- a/Documentation/devicetree/bindings/i2c/allwinner,sun6i-a31-p2wi.yaml +++ b/Documentation/devicetree/bindings/i2c/allwinner,sun6i-a31-p2wi.yaml @@ -51,7 +51,7 @@ examples: reg = <0x01f03400 0x400>; interrupts = <0 39 4>; clocks = <&apb0_gates 3>; - clock-frequency = <6000000>; + clock-frequency = <100000>; resets = <&apb0_rst 3>; #address-cells = <1>; #size-cells = <0>; -- cgit