From 7f340fea3a78201f8d5d14b414d6a314cb67452a Mon Sep 17 00:00:00 2001 From: Stafford Horne Date: Tue, 19 Sep 2017 22:39:31 +0900 Subject: MAINTAINERS: Add OpenRISC pic maintainer The OpenRISC team is the maintainer of the irqchip or1k-pic driver under drivers/irqchip. Signed-off-by: Stafford Horne --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index d85c08956875..543d9fda92aa 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -10032,6 +10032,7 @@ L: openrisc@lists.librecores.org W: http://openrisc.io S: Maintained F: arch/openrisc/ +F: drivers/irqchip/irq-or1k-* OPENVSWITCH M: Pravin Shelar -- cgit From 00aa61d36da1969b139dc10b9b555677ebb03c42 Mon Sep 17 00:00:00 2001 From: Stafford Horne Date: Tue, 19 Sep 2017 22:55:54 +0900 Subject: Documentation: Move OpenRISC docs out of arch/ The OpenRISC docs have traditionally been in arch/ but that does not seem like the correct place to be. Move them so they will be more visible to others. Also update MAINTAINERS to make sure we get notifications of changes. Signed-off-by: Stafford Horne --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 543d9fda92aa..4e2b720ca661 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -10031,6 +10031,7 @@ T: git git://github.com/openrisc/linux.git L: openrisc@lists.librecores.org W: http://openrisc.io S: Maintained +F: Documentation/openrisc/ F: arch/openrisc/ F: drivers/irqchip/irq-or1k-* -- cgit From ddc92bec6d7d7e8a07794a8dbeade19476891b53 Mon Sep 17 00:00:00 2001 From: Stafford Horne Date: Sat, 21 Oct 2017 22:39:35 +0900 Subject: dt-bindings: openrisc: Add OpenRISC platform SoC Add devicetree binding documentation for the OpenRISC platform opencores,or1ksim. This is the main OpenRISC reference platform supporting multiple FPGA SoC's. This format is based on some of the mips binding docs as we have similar requirements. Also, update maintainers so openrisc related binding changes are visible to the openrisc team. Acked-by: Rob Herring Suggested-by: Pavel Machek Signed-off-by: Stafford Horne --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 4e2b720ca661..bcb7e2525f54 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -10031,6 +10031,7 @@ T: git git://github.com/openrisc/linux.git L: openrisc@lists.librecores.org W: http://openrisc.io S: Maintained +F: Documentation/devicetree/bindings/openrisc/ F: Documentation/openrisc/ F: arch/openrisc/ F: drivers/irqchip/irq-or1k-* -- cgit From 9b54470afd836278a7e6f0f08194e2e2dca4b6eb Mon Sep 17 00:00:00 2001 From: Stafford Horne Date: Mon, 30 Oct 2017 21:38:35 +0900 Subject: irqchip: add initial support for ompic IPI driver for the Open Multi-Processor Interrupt Controller (ompic) as described in the Multi-core support section of the OpenRISC 1.2 architecture specification: https://github.com/openrisc/doc/raw/master/openrisc-arch-1.2-rev0.pdf Each OpenRISC core contains a full interrupt controller which is used in the SMP architecture for interrupt balancing. This IPI device, the ompic, is the only external device required for enabling SMP on OpenRISC. Pending ops are stored in a memory bit mask which can allow multiple pending operations to be set and serviced at a time. This is mostly borrowed from the alpha IPI implementation. Reviewed-by: Marc Zyngier Acked-by: Rob Herring Signed-off-by: Stefan Kristiansson [shorne@gmail.com: converted ops to bitmask, wrote commit message] Signed-off-by: Stafford Horne --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index bcb7e2525f54..bb129d5f0d3a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -10034,6 +10034,7 @@ S: Maintained F: Documentation/devicetree/bindings/openrisc/ F: Documentation/openrisc/ F: arch/openrisc/ +F: drivers/irqchip/irq-ompic.c F: drivers/irqchip/irq-or1k-* OPENVSWITCH -- cgit