From 007d05d898050ffc70fd2737896528c5069f7269 Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Sat, 5 Nov 2016 19:03:50 +0100 Subject: ARM: dts: armada-xp: Fixup pcie DT warnings PCIe has a range property, so the unit name should contain an address. Take the opportunity to use the node label instead of the full name. Signed-off-by: Gregory CLEMENT --- arch/arm/boot/dts/armada-xp-gp.dts | 42 +++++++++++++++++++------------------- 1 file changed, 21 insertions(+), 21 deletions(-) (limited to 'arch/arm/boot/dts/armada-xp-gp.dts') diff --git a/arch/arm/boot/dts/armada-xp-gp.dts b/arch/arm/boot/dts/armada-xp-gp.dts index 09c9cabdf67a..fca37e92b96a 100644 --- a/arch/arm/boot/dts/armada-xp-gp.dts +++ b/arch/arm/boot/dts/armada-xp-gp.dts @@ -127,27 +127,6 @@ }; }; - pcie-controller { - status = "okay"; - - /* - * The 3 slots are physically present as - * standard PCIe slots on the board. - */ - pcie@1,0 { - /* Port 0, Lane 0 */ - status = "okay"; - }; - pcie@9,0 { - /* Port 2, Lane 0 */ - status = "okay"; - }; - pcie@10,0 { - /* Port 3, Lane 0 */ - status = "okay"; - }; - }; - internal-regs { serial@12000 { status = "okay"; @@ -233,6 +212,27 @@ }; }; +&pciec { + status = "okay"; + + /* + * The 3 slots are physically present as + * standard PCIe slots on the board. + */ + pcie@1,0 { + /* Port 0, Lane 0 */ + status = "okay"; + }; + pcie@9,0 { + /* Port 2, Lane 0 */ + status = "okay"; + }; + pcie@10,0 { + /* Port 3, Lane 0 */ + status = "okay"; + }; +}; + &mdio { phy0: ethernet-phy@0 { reg = <16>; -- cgit