From 2450ceaf21798183f51bfdbd7d314635dbb62f4c Mon Sep 17 00:00:00 2001 From: Benjamin Herrenschmidt Date: Tue, 24 Jul 2018 14:24:02 +1000 Subject: ARM: dts: aspeed: Add coprocessor interrupt controller Add a node for the CVIC (the coprocessor interrupt controller) and add a label to the SRAM node so it can be referenced from the board device-tree file. Signed-off-by: Benjamin Herrenschmidt Signed-off-by: Joel Stanley --- arch/arm/boot/dts/aspeed-g4.dtsi | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) (limited to 'arch/arm/boot/dts/aspeed-g4.dtsi') diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi index 680336ac06f8..b23a983f95a5 100644 --- a/arch/arm/boot/dts/aspeed-g4.dtsi +++ b/arch/arm/boot/dts/aspeed-g4.dtsi @@ -92,6 +92,12 @@ reg = <0x1e6c0080 0x80>; }; + cvic: copro-interrupt-controller@1e6c2000 { + compatible = "aspeed,ast2400-cvic", "aspeed-cvic"; + valid-sources = <0x7fffffff>; + reg = <0x1e6c2000 0x80>; + }; + mac0: ethernet@1e660000 { compatible = "aspeed,ast2400-mac", "faraday,ftgmac100"; reg = <0x1e660000 0x180>; @@ -177,7 +183,7 @@ status = "disabled"; }; - sram@1e720000 { + sram: sram@1e720000 { compatible = "mmio-sram"; reg = <0x1e720000 0x8000>; // 32K }; -- cgit