From 651b79e8c9e208e84e2cfb4291e262f87b97c333 Mon Sep 17 00:00:00 2001 From: Cédric Le Goater Date: Mon, 9 May 2022 19:56:06 +0200 Subject: ARM: dts: aspeed: Adjust "reg" property of FMC/SPI controllers MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This is compatible with the current driver and addresses issues when running 'make dt_binding_check'. Cc: Chin-Ting Kuo Tested-by: Joel Stanley Tested-by: Tao Ren Tested-by: Jae Hyun Yoo Signed-off-by: Cédric Le Goater Link: https://lore.kernel.org/r/20220509175616.1089346-2-clg@kaod.org Signed-off-by: Joel Stanley --- arch/arm/boot/dts/aspeed-g4.dtsi | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'arch/arm/boot/dts/aspeed-g4.dtsi') diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi index fa8b581c3d6c..3b7b98e787e7 100644 --- a/arch/arm/boot/dts/aspeed-g4.dtsi +++ b/arch/arm/boot/dts/aspeed-g4.dtsi @@ -54,8 +54,7 @@ ranges; fmc: spi@1e620000 { - reg = < 0x1e620000 0x94 - 0x20000000 0x10000000 >; + reg = <0x1e620000 0x94>, <0x20000000 0x10000000>; #address-cells = <1>; #size-cells = <0>; compatible = "aspeed,ast2400-fmc"; @@ -91,8 +90,7 @@ }; spi: spi@1e630000 { - reg = < 0x1e630000 0x18 - 0x30000000 0x10000000 >; + reg = <0x1e630000 0x18>, <0x30000000 0x10000000>; #address-cells = <1>; #size-cells = <0>; compatible = "aspeed,ast2400-spi"; -- cgit