From 927c2fc2db19fe6022be7c6dc0e380cb5c56a878 Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Wed, 30 May 2018 15:47:40 +0930 Subject: ARM: dts: aspeed: Fix hwrng register address The register address should be the full address of the rng, not the offset from the start of the SCU. Fixes: 5daa8212c08e ("ARM: dts: aspeed: Describe random number device") Reviewed-by: Andrew Jeffery Signed-off-by: Joel Stanley Signed-off-by: Olof Johansson --- arch/arm/boot/dts/aspeed-g4.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/boot/dts/aspeed-g4.dtsi') diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi index 5e947ed496c2..75df1573380e 100644 --- a/arch/arm/boot/dts/aspeed-g4.dtsi +++ b/arch/arm/boot/dts/aspeed-g4.dtsi @@ -145,9 +145,9 @@ }; - rng: hwrng@78 { + rng: hwrng@1e6e2078 { compatible = "timeriomem_rng"; - reg = <0x78 0x4>; + reg = <0x1e6e2078 0x4>; period = <1>; quality = <100>; }; -- cgit