From 278407a53c3b33fb820332c4d39eb39316c3879a Mon Sep 17 00:00:00 2001 From: Pavel Hofman Date: Fri, 20 Nov 2020 17:39:20 +0100 Subject: ARM: dts: bcm283x: increase dwc2's RX FIFO size The previous version of the dwc2 overlay set the RX FIFO size to 256 4-byte words. This is not enough for 1024 bytes of the largest isochronous high speed packet allowed, because it doesn't take into account extra space needed by dwc2. RX FIFO's size is calculated based on the following (in 4byte words): - 13 locations for SETUP packets 5*n + 8 for Slave and Buffer DMA mode where n is number of control endpoints which is 1 on the bcm283x core - 1 location for Global OUT NAK - 2 * 257 locations for status information and the received packet. Typically two spaces are recommended so that when the previous packet is being transferred to AHB, the USB can receive the subsequent packet. - 10 * 1 location for transfer complete status for last packet of each endpoint. The bcm283x core has 5 IN and 5 OUT EPs - 10 * 1 additional location for EPDisable status for each endpoint - 5 * 2 additional locations are recommended for each OUT endpoint Total is 558 locations. Signed-off-by: Phil Elwell Signed-off-by: Pavel Hofman Signed-off-by: Nicolas Saenz Julienne Link: https://lore.kernel.org/r/e9e7d070-593c-122f-3a5c-2435bb147ab2@ivitera.com/ --- arch/arm/boot/dts/bcm283x-rpi-usb-otg.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot/dts/bcm283x-rpi-usb-otg.dtsi') diff --git a/arch/arm/boot/dts/bcm283x-rpi-usb-otg.dtsi b/arch/arm/boot/dts/bcm283x-rpi-usb-otg.dtsi index e2fd9610e125..20322de2f8bf 100644 --- a/arch/arm/boot/dts/bcm283x-rpi-usb-otg.dtsi +++ b/arch/arm/boot/dts/bcm283x-rpi-usb-otg.dtsi @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 &usb { dr_mode = "otg"; - g-rx-fifo-size = <256>; + g-rx-fifo-size = <558>; g-np-tx-fifo-size = <32>; /* * According to dwc2 the sum of all device EP -- cgit