From 8dccafaa281aa1d240a58bbcdff338aec114a021 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Fri, 13 Oct 2017 12:54:51 -0500 Subject: arm: dts: fix unit-address leading 0s Fix dtc warnings for 'simple_bus_reg' due to leading 0s. Converted using the following command: perl -p -i -e 's/\@0+([0-9a-f])/\@$1/g' `find arch/arm/boot/dts -type -f -name '*.dts*' Dropped changes to ARM, Ltd. boards LED nodes and manually fixed up some occurrences of uppercase hex. Signed-off-by: Rob Herring Signed-off-by: Arnd Bergmann --- arch/arm/boot/dts/imx6qdl-tx6.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot/dts/imx6qdl-tx6.dtsi') diff --git a/arch/arm/boot/dts/imx6qdl-tx6.dtsi b/arch/arm/boot/dts/imx6qdl-tx6.dtsi index c6bec97fbeaf..25fe6aef797b 100644 --- a/arch/arm/boot/dts/imx6qdl-tx6.dtsi +++ b/arch/arm/boot/dts/imx6qdl-tx6.dtsi @@ -293,7 +293,7 @@ clock-frequency = <400000>; status = "okay"; - sgtl5000: sgtl5000@0a { + sgtl5000: sgtl5000@a { compatible = "fsl,sgtl5000"; reg = <0x0a>; VDDA-supply = <®_2v5>; -- cgit From 01b175c56040a1763c505dc912a325cea232d522 Mon Sep 17 00:00:00 2001 From: Lothar Waßmann Date: Tue, 17 Oct 2017 11:17:55 +0200 Subject: ARM: dts: imx6-tx6: add trickle-charge config for DS1339 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit As the DS1339 driver now supports enabling the trickle charge feature via DTB, add the appropriate properties to utilize this feature. Signed-off-by: Lothar Waßmann Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6qdl-tx6.dtsi | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm/boot/dts/imx6qdl-tx6.dtsi') diff --git a/arch/arm/boot/dts/imx6qdl-tx6.dtsi b/arch/arm/boot/dts/imx6qdl-tx6.dtsi index c6bec97fbeaf..a50bf71a4431 100644 --- a/arch/arm/boot/dts/imx6qdl-tx6.dtsi +++ b/arch/arm/boot/dts/imx6qdl-tx6.dtsi @@ -284,6 +284,8 @@ ds1339: rtc@68 { compatible = "dallas,ds1339"; reg = <0x68>; + trickle-resistor-ohms = <250>; + trickle-diode-disable; }; }; -- cgit From 3fd415af1805b4906deaedb8150017e457ff0df7 Mon Sep 17 00:00:00 2001 From: Lothar Waßmann Date: Tue, 17 Oct 2017 11:17:56 +0200 Subject: ARM: dts: imx6-tx6: improve ethernet related pinctrl setup MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Remove the PHY INT and RESET pins from hog section and put them into their own pinctrl nodes referenced by the appropriate driver nodes. Also, the MDIO pins are required for probing the Ethernet PHY, so they must be configured by the FEC driver, not by the PHY driver. Move the corresponding pinctrl settings from the PHY subnode to the FEC node. Signed-off-by: Lothar Waßmann Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6qdl-tx6.dtsi | 23 +++++++++++++++++------ 1 file changed, 17 insertions(+), 6 deletions(-) (limited to 'arch/arm/boot/dts/imx6qdl-tx6.dtsi') diff --git a/arch/arm/boot/dts/imx6qdl-tx6.dtsi b/arch/arm/boot/dts/imx6qdl-tx6.dtsi index a50bf71a4431..f2cd3e77c536 100644 --- a/arch/arm/boot/dts/imx6qdl-tx6.dtsi +++ b/arch/arm/boot/dts/imx6qdl-tx6.dtsi @@ -1,5 +1,5 @@ /* - * Copyright 2014-2016 Lothar Waßmann + * Copyright 2014-2017 Lothar Waßmann * * This file is dual-licensed: you can use it either under the terms * of the GPL or the X11 license, at your option. Note that this dual @@ -241,7 +241,7 @@ &fec { pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_enet>; + pinctrl-0 = <&pinctrl_enet &pinctrl_enet_mdio &pinctrl_etnphy_rst>; clocks = <&clks IMX6QDL_CLK_ENET>, <&clks IMX6QDL_CLK_ENET>, <&clks IMX6QDL_CLK_ENET_REF>, @@ -261,8 +261,9 @@ compatible = "ethernet-phy-ieee802.3-c22"; reg = <0>; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_enet_mdio>; - interrupts-extended = <&gpio7 1 IRQ_TYPE_EDGE_FALLING>; + pinctrl-0 = <&pinctrl_etnphy_int>; + interrupt-parent = <&gpio7>; + interrupts = <1 IRQ_TYPE_EDGE_FALLING>; }; }; }; @@ -334,8 +335,6 @@ pinctrl_hog: hoggrp { fsl,pins = < - MX6QDL_PAD_SD3_DAT2__GPIO7_IO06 0x1b0b1 /* ETN PHY RESET */ - MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1b0b1 /* ETN PHY INT */ MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1b0b1 /* PWR BTN */ >; }; @@ -453,12 +452,24 @@ >; }; + pinctrl_etnphy_int: etnphy-intgrp { + fsl,pins = < + MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1b0b1 /* ETN PHY INT */ + >; + }; + pinctrl_etnphy_power: etnphy-pwrgrp { fsl,pins = < MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x1b0b1 /* ETN PHY POWER */ >; }; + pinctrl_etnphy_rst: etnphy-rstgrp { + fsl,pins = < + MX6QDL_PAD_SD3_DAT2__GPIO7_IO06 0x1b0b1 /* ETN PHY RESET */ + >; + }; + pinctrl_flexcan1: flexcan1grp { fsl,pins = < MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x1b0b0 -- cgit From 9b2d84058445ae826548e2ba4f08b551b251d06f Mon Sep 17 00:00:00 2001 From: Lothar Waßmann Date: Tue, 17 Oct 2017 11:17:57 +0200 Subject: ARM: dts: imx6-tx6: specify ethernet phy reset post-delay MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Under certain circumstances the ethernet PHY cannot be detected on Ka-Ro electronics TX6 modules. Using a phy-reset-post-delay of at least 2ms alleviates this problem. Define it to 10ms to be on the safe side. Signed-off-by: Lothar Waßmann Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6qdl-tx6.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/boot/dts/imx6qdl-tx6.dtsi') diff --git a/arch/arm/boot/dts/imx6qdl-tx6.dtsi b/arch/arm/boot/dts/imx6qdl-tx6.dtsi index f2cd3e77c536..f1655b3ba1ad 100644 --- a/arch/arm/boot/dts/imx6qdl-tx6.dtsi +++ b/arch/arm/boot/dts/imx6qdl-tx6.dtsi @@ -249,6 +249,7 @@ clock-names = "ipg", "ahb", "ptp", "enet_out"; phy-mode = "rmii"; phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>; + phy-reset-post-delay = <10>; phy-handle = <&etnphy>; phy-supply = <®_3v3_etn>; status = "okay"; -- cgit From 1a0f710ebfd7f971c6fb0644cd5db8c46b7c698f Mon Sep 17 00:00:00 2001 From: Lothar Waßmann Date: Tue, 17 Oct 2017 11:17:58 +0200 Subject: ARM: dts: imx6-tx6: convert to using simple-audio-card MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Convert the DTS sound setup to use the simple-audio-card driver. Signed-off-by: Lothar Waßmann Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6qdl-tx6.dtsi | 50 ++++++++++++++++++++++++++++++++------ 1 file changed, 42 insertions(+), 8 deletions(-) (limited to 'arch/arm/boot/dts/imx6qdl-tx6.dtsi') diff --git a/arch/arm/boot/dts/imx6qdl-tx6.dtsi b/arch/arm/boot/dts/imx6qdl-tx6.dtsi index f1655b3ba1ad..eb5accd2d1a1 100644 --- a/arch/arm/boot/dts/imx6qdl-tx6.dtsi +++ b/arch/arm/boot/dts/imx6qdl-tx6.dtsi @@ -43,6 +43,7 @@ #include #include #include +#include / { aliases { @@ -183,24 +184,56 @@ }; sound { - compatible = "karo,imx6qdl-tx6qdl-sgtl5000", - "fsl,imx-audio-sgtl5000"; - model = "sgtl5000-audio"; + compatible = "karo,imx6qdl-tx6-sgtl5000", + "simple-audio-card"; + simple-audio-card,name = "imx6qdl-tx6-sgtl5000-audio"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_audmux>; - ssi-controller = <&ssi1>; - audio-codec = <&sgtl5000>; - audio-routing = + simple-audio-card,format = "i2s"; + simple-audio-card,bitclock-master = <&codec_dai>; + simple-audio-card,frame-master = <&codec_dai>; + simple-audio-card,widgets = + "Microphone", "Mic Jack", + "Line", "Line In", + "Line", "Line Out", + "Headphone", "Headphone Jack"; + simple-audio-card,routing = "MIC_IN", "Mic Jack", "Mic Jack", "Mic Bias", "Headphone Jack", "HP_OUT"; - mux-int-port = <1>; - mux-ext-port = <5>; + + cpu_dai: simple-audio-card,cpu { + sound-dai = <&ssi1>; + }; + + codec_dai: simple-audio-card,codec { + sound-dai = <&sgtl5000>; + }; }; }; &audmux { status = "okay"; + + ssi1 { + fsl,audmux-port = <0>; + fsl,port-config = < + (IMX_AUDMUX_V2_PTCR_SYN | + IMX_AUDMUX_V2_PTCR_TFSEL(4) | + IMX_AUDMUX_V2_PTCR_TCSEL(4) | + IMX_AUDMUX_V2_PTCR_TFSDIR | + IMX_AUDMUX_V2_PTCR_TCLKDIR) + IMX_AUDMUX_V2_PDCR_RXDSEL(4) + >; + }; + + pins5 { + fsl,audmux-port = <4>; + fsl,port-config = < + IMX_AUDMUX_V2_PTCR_SYN + IMX_AUDMUX_V2_PDCR_RXDSEL(0) + >; + }; }; &can1 { @@ -299,6 +332,7 @@ sgtl5000: sgtl5000@0a { compatible = "fsl,sgtl5000"; + #sound-dai-cells = <0>; reg = <0x0a>; VDDA-supply = <®_2v5>; VDDIO-supply = <®_3v3>; -- cgit From 038ab100c3d02b4055d4d92c6d316ea851f2e474 Mon Sep 17 00:00:00 2001 From: Lothar Waßmann Date: Tue, 17 Oct 2017 11:17:59 +0200 Subject: ARM: dts: imx6-tx6: add support for I2C bus recovery MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Define the required properties to enable I2C bus recovery supported by the I2C subsystem. Signed-off-by: Lothar Waßmann Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6qdl-tx6.dtsi | 24 ++++++++++++++++++++++-- 1 file changed, 22 insertions(+), 2 deletions(-) (limited to 'arch/arm/boot/dts/imx6qdl-tx6.dtsi') diff --git a/arch/arm/boot/dts/imx6qdl-tx6.dtsi b/arch/arm/boot/dts/imx6qdl-tx6.dtsi index eb5accd2d1a1..c1404020581c 100644 --- a/arch/arm/boot/dts/imx6qdl-tx6.dtsi +++ b/arch/arm/boot/dts/imx6qdl-tx6.dtsi @@ -311,8 +311,11 @@ }; &i2c1 { - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c1>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>; clock-frequency = <400000>; status = "okay"; @@ -325,8 +328,11 @@ }; &i2c3 { - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c3>; + pinctrl-1 = <&pinctrl_i2c3_gpio>; + scl-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; clock-frequency = <400000>; status = "okay"; @@ -552,6 +558,13 @@ >; }; + pinctrl_i2c1_gpio: i2c1-gpiogrp { + fsl,pins = < + MX6QDL_PAD_EIM_D21__GPIO3_IO21 0x4001b8b1 + MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x4001b8b1 + >; + }; + pinctrl_i2c3: i2c3grp { fsl,pins = < MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 @@ -559,6 +572,13 @@ >; }; + pinctrl_i2c3_gpio: i2c3-gpiogrp { + fsl,pins = < + MX6QDL_PAD_GPIO_3__GPIO1_IO03 0x4001b8b1 + MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x4001b8b1 + >; + }; + pinctrl_kpp: kppgrp { fsl,pins = < MX6QDL_PAD_GPIO_9__KEY_COL6 0x1b0b1 -- cgit From 1a9aae6f1a06ca9cfc0da24b0600087d9fca6595 Mon Sep 17 00:00:00 2001 From: Lothar Waßmann Date: Tue, 17 Oct 2017 11:18:00 +0200 Subject: ARM: dts: imx6-tx6: move display configuration to .dtsi file MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Currently the display (LCD or LVDS) configuration is duplicated with slight variations in each TX6 module specific file. Move it to an include file for simplification and consistency. Signed-off-by: Lothar Waßmann Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6qdl-tx6.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/boot/dts/imx6qdl-tx6.dtsi') diff --git a/arch/arm/boot/dts/imx6qdl-tx6.dtsi b/arch/arm/boot/dts/imx6qdl-tx6.dtsi index c1404020581c..6e24ac97b94b 100644 --- a/arch/arm/boot/dts/imx6qdl-tx6.dtsi +++ b/arch/arm/boot/dts/imx6qdl-tx6.dtsi @@ -146,7 +146,7 @@ pinctrl-0 = <&pinctrl_lcd0_pwr>; gpio = <&gpio3 29 GPIO_ACTIVE_HIGH>; enable-active-high; - regulator-boot-on; + status = "disabled"; }; reg_lcd1_pwr: regulator-lcd1-pwr { @@ -158,7 +158,7 @@ pinctrl-0 = <&pinctrl_lcd1_pwr>; gpio = <&gpio2 31 GPIO_ACTIVE_HIGH>; enable-active-high; - regulator-boot-on; + status = "disabled"; }; reg_usbh1_vbus: regulator-usbh1-vbus { -- cgit