From f3d80deb080f422ff1df4a715444f156bb51adc1 Mon Sep 17 00:00:00 2001 From: Anson Huang Date: Fri, 8 Jun 2018 11:06:40 +0200 Subject: ARM: dts: imx: add cooling-cells for cpufreq cooling device Add #cooling-cells for i.MX6/7 SoCs for cpufreq cooling device usage. Signed-off-by: Anson Huang Signed-off-by: Bastian Stender Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6sx.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/boot/dts/imx6sx.dtsi') diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi index d8b94f47498b..7130ab8a7518 100644 --- a/arch/arm/boot/dts/imx6sx.dtsi +++ b/arch/arm/boot/dts/imx6sx.dtsi @@ -79,6 +79,7 @@ 198000 1175000 >; clock-latency = <61036>; /* two CLK32 periods */ + #cooling-cells = <2>; clocks = <&clks IMX6SX_CLK_ARM>, <&clks IMX6SX_CLK_PLL2_PFD2>, <&clks IMX6SX_CLK_STEP>, -- cgit From 77cf8a009df8a47ba0c8f32b0d6bb6cbfb55a17e Mon Sep 17 00:00:00 2001 From: Anson Huang Date: Mon, 2 Jul 2018 10:04:36 +0800 Subject: ARM: dts: imx6: correct anatop regulators range According to i.MX6 datasheet, the LDO_1P1's typical programming operating range is 1.0V to 1.2V, and the LDO_2P5's typical programming operating range is 2.25V to 2.75V, correct LDO_1P1 and LDO_2P5's regulator range settings for i.MX6 SoCs. Signed-off-by: Anson Huang Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6sx.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/arm/boot/dts/imx6sx.dtsi') diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi index 7130ab8a7518..596763c2fe33 100644 --- a/arch/arm/boot/dts/imx6sx.dtsi +++ b/arch/arm/boot/dts/imx6sx.dtsi @@ -592,8 +592,8 @@ regulator-1p1 { compatible = "fsl,anatop-regulator"; regulator-name = "vdd1p1"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1375000>; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1200000>; regulator-always-on; anatop-reg-offset = <0x110>; anatop-vol-bit-shift = <8>; @@ -622,8 +622,8 @@ regulator-2p5 { compatible = "fsl,anatop-regulator"; regulator-name = "vdd2p5"; - regulator-min-microvolt = <2100000>; - regulator-max-microvolt = <2875000>; + regulator-min-microvolt = <2250000>; + regulator-max-microvolt = <2750000>; regulator-always-on; anatop-reg-offset = <0x130>; anatop-vol-bit-shift = <8>; -- cgit From 2db286d7361ecde6cb336cc8f10582afa9c09374 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Wed, 4 Jul 2018 14:52:50 -0300 Subject: ARM: dts: imx: Remove optional 'fsl,sec-era' property Since commit 654f2b937b38 ("crypto: caam - allow retrieving 'era' from register") the CAAM driver is capable of obtaining the era version by reading the appropriate CAAM registers, so let the CAAM driver discover the era version in run-time instead of hardcoding such information in the device tree. According to Documentation/devicetree/bindings/crypto/fsl-sec4.txt the 'fsl,sec-era' is an optional property and this can be safely removed now. Signed-off-by: Fabio Estevam Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6sx.dtsi | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm/boot/dts/imx6sx.dtsi') diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi index 596763c2fe33..881c0dd8d09a 100644 --- a/arch/arm/boot/dts/imx6sx.dtsi +++ b/arch/arm/boot/dts/imx6sx.dtsi @@ -815,7 +815,6 @@ crypto: caam@2100000 { compatible = "fsl,sec-v4.0"; - fsl,sec-era = <4>; #address-cells = <1>; #size-cells = <1>; reg = <0x2100000 0x10000>; -- cgit From ba4446d4faeb8e60a78915c4f19645beb5f7e6ad Mon Sep 17 00:00:00 2001 From: Anson Huang Date: Wed, 11 Jul 2018 08:58:59 +0800 Subject: ARM: dts: imx6sx: add ocram_s support i.MX6SX has a 16KB always-on ocram bank called ocram_s, enable it as another mmio sram. Signed-off-by: Anson Huang Reviewed-by: Fabio Estevam Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6sx.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch/arm/boot/dts/imx6sx.dtsi') diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi index 881c0dd8d09a..ae10225e8061 100644 --- a/arch/arm/boot/dts/imx6sx.dtsi +++ b/arch/arm/boot/dts/imx6sx.dtsi @@ -166,6 +166,12 @@ interrupt-parent = <&gpc>; ranges; + ocram_s: sram@8f8000 { + compatible = "mmio-sram"; + reg = <0x008f8000 0x4000>; + clocks = <&clks IMX6SX_CLK_OCRAM_S>; + }; + ocram: sram@900000 { compatible = "mmio-sram"; reg = <0x00900000 0x20000>; -- cgit