From 44e4716499b8988a20ba99ba5c871cdbf1c819fd Mon Sep 17 00:00:00 2001 From: Roger Quadros Date: Tue, 23 Feb 2016 18:37:25 +0200 Subject: ARM: dts: omap3: Fix NAND device nodes Add compatible id, GPMC register resource and interrupt resource to NAND controller nodes. The GPMC node will provide an interrupt controller for the NAND IRQs. Signed-off-by: Roger Quadros Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap3-ldp.dts | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) (limited to 'arch/arm/boot/dts/omap3-ldp.dts') diff --git a/arch/arm/boot/dts/omap3-ldp.dts b/arch/arm/boot/dts/omap3-ldp.dts index 540163025dd3..2f353dadfa40 100644 --- a/arch/arm/boot/dts/omap3-ldp.dts +++ b/arch/arm/boot/dts/omap3-ldp.dts @@ -97,12 +97,16 @@ }; &gpmc { - ranges = <0 0 0x00000000 0x01000000>, - <1 0 0x08000000 0x01000000>; + ranges = <0 0 0x30000000 0x1000000>, /* CS0 space, 16MB */ + <1 0 0x08000000 0x1000000>; /* CS1 space, 16MB */ nand@0,0 { + compatible = "ti,omap2-nand"; + reg = <0 0 4>; /* CS0, offset 0, IO size 4 */ + interrupt-parent = <&gpmc>; + interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ + <1 IRQ_TYPE_NONE>; /* termcount */ linux,mtd-name= "micron,nand"; - reg = <0 0 4>; /* CS0, offset 0, IO size 4 */ nand-bus-width = <16>; gpmc,device-width = <2>; ti,nand-ecc-opt = "bch8"; -- cgit