From c312f066314e3dfb99fe7db8b8b43c4d8992c90c Mon Sep 17 00:00:00 2001 From: Adam Ford Date: Wed, 17 Jun 2020 05:58:40 -0500 Subject: ARM: dts: omap3: Migrate AES from hwmods to sysc-omap2 Various OMAP3 boards have two AES blocks, but only one is currently available, because the hwmods are only configured for one. This patch migrates the hwmods for the AES engine to sysc-omap2 which allows the second AES crypto engine to become available. omap-aes 480a6000.aes1: OMAP AES hw accel rev: 2.6 omap-aes 480a6000.aes1: will run requests pump with realtime priority omap-aes 480c5000.aes2: OMAP AES hw accel rev: 2.6 omap-aes 480c5000.aes2: will run requests pump with realtime priority Signed-off-by: Adam Ford [tony@atomide.com: updated to disable both aes_targets on hs boards] Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap3.dtsi | 57 ++++++++++++++++++++++++++++++++++++++------ 1 file changed, 50 insertions(+), 7 deletions(-) (limited to 'arch/arm/boot/dts/omap3.dtsi') diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi index 1296d0643943..6e874ed64009 100644 --- a/arch/arm/boot/dts/omap3.dtsi +++ b/arch/arm/boot/dts/omap3.dtsi @@ -157,13 +157,56 @@ }; }; - aes: aes@480c5000 { - compatible = "ti,omap3-aes"; - ti,hwmods = "aes"; - reg = <0x480c5000 0x50>; - interrupts = <0>; - dmas = <&sdma 65 &sdma 66>; - dma-names = "tx", "rx"; + aes1_target: target-module@480a6000 { + compatible = "ti,sysc-omap2", "ti,sysc"; + reg = <0x480a6044 0x4>, + <0x480a6048 0x4>, + <0x480a604c 0x4>; + reg-names = "rev", "sysc", "syss"; + ti,sysc-mask = <(SYSC_OMAP2_AUTOIDLE)>; + ti,sysc-sidle = , + , + ; + ti,syss-mask = <1>; + clocks = <&aes1_ick>; + clock-names = "ick"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x480a6000 0x2000>; + + aes1: aes1@0 { + compatible = "ti,omap3-aes"; + reg = <0 0x50>; + interrupts = <0>; + dmas = <&sdma 9 &sdma 10>; + dma-names = "tx", "rx"; + }; + }; + + aes2_target: target-module@480c5000 { + compatible = "ti,sysc-omap2", "ti,sysc"; + reg = <0x480c5044 0x4>, + <0x480c5048 0x4>, + <0x480c504c 0x4>; + reg-names = "rev", "sysc", "syss"; + ti,sysc-mask = <(SYSC_OMAP2_AUTOIDLE)>; + ti,sysc-sidle = , + , + ; + ti,syss-mask = <1>; + clocks = <&aes2_ick>; + clock-names = "ick"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x480c5000 0x2000>; + + aes2: aes2@0 { + compatible = "ti,omap3-aes"; + reg = <0 0x50>; + interrupts = <0>; + dmas = <&sdma 65 &sdma 66>; + dma-names = "tx", "rx"; + }; }; prm: prm@48306000 { -- cgit