From b0142a10db149daadbc2cc94c890dd00b3fa58ad Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Wed, 30 Aug 2017 08:19:38 -0700 Subject: ARM: dts: Configure pmu without interrupt for omap4430 On omap4430, the PMU is not configure unlike on omap4460 because of the missing handling. The missing pmu node with the missing ti,hwmods entry will cause boot time errors when the legacy platform data is removed as the SoC interconnect code needs it. Note that this will only show up as a bug with "doesn't have mpu register target base" boot errors when the legacy platform data is removed. Let's fix the issue by configuring PMU but without the interrupts. Then when cross trigger interface (CTI) is supported, we can add interrupts also for omap4430. Cc: Jon Hunter Cc: Will Deacon Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap4.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'arch/arm/boot/dts/omap4.dtsi') diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index 64d00f5893a6..47bc41954e2e 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -51,6 +51,17 @@ }; }; + /* + * Note that 4430 needs cross trigger interface (CTI) supported + * before we can configure the interrupts. This means sampling + * events are not supported for pmu. Note that 4460 does not use + * CTI, see also 4460.dtsi. + */ + pmu { + compatible = "arm,cortex-a9-pmu"; + ti,hwmods = "debugss"; + }; + gic: interrupt-controller@48241000 { compatible = "arm,cortex-a9-gic"; interrupt-controller; -- cgit From 1d6a332ae8b7d8eacb9fe4c0a09370550f0b3eee Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Wed, 30 Aug 2017 08:19:39 -0700 Subject: ARM: dts: Add missing properties for omap4 control modules On omap4, we are missing several ti,hwmods properties and IO ranges for system control modules. These are needed by the SoC interconnect code. Note that this will only show up as a bug with "doesn't have mpu register target base" boot errors when the legacy platform data is removed. In order to add these, we need to move omap4_pmx_wkup to be a child of omap4_padconf_wkup. On omap4 there are separate modules for control module and control module pads. For control module core, we have this already configured except for the missing ti,hwmods and reg entries. Cc: Mark Rutland Acked-by: Rob Herring Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap4.dtsi | 39 +++++++++++++++++++++++++++++---------- 1 file changed, 29 insertions(+), 10 deletions(-) (limited to 'arch/arm/boot/dts/omap4.dtsi') diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index 47bc41954e2e..16ec0bd29209 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -174,6 +174,7 @@ #address-cells = <1>; #size-cells = <1>; ranges = <0 0x2000 0x1000>; + ti,hwmods = "ctrl_module_core"; scm_conf: scm_conf@0 { compatible = "syscon"; @@ -186,9 +187,11 @@ omap4_padconf_core: scm@100000 { compatible = "ti,omap4-scm-padconf-core", "simple-bus"; + reg = <0x100000 0x1000>; #address-cells = <1>; #size-cells = <1>; ranges = <0 0x100000 0x1000>; + ti,hwmods = "ctrl_module_pad_core"; omap4_pmx_core: pinmux@40 { compatible = "ti,omap4-padconf", @@ -263,17 +266,33 @@ }; }; - omap4_pmx_wkup: pinmux@1e040 { - compatible = "ti,omap4-padconf", - "pinctrl-single"; - reg = <0x1e040 0x0038>; + omap4_scm_wkup: scm@c000 { + compatible = "ti,omap4-scm-wkup"; + reg = <0xc000 0x1000>; + ti,hwmods = "ctrl_module_wkup"; + }; + + omap4_padconf_wkup: padconf@1e000 { + compatible = "ti,omap4-scm-padconf-wkup", + "simple-bus"; + reg = <0x1e000 0x1000>; #address-cells = <1>; - #size-cells = <0>; - #pinctrl-cells = <1>; - #interrupt-cells = <1>; - interrupt-controller; - pinctrl-single,register-width = <16>; - pinctrl-single,function-mask = <0x7fff>; + #size-cells = <1>; + ranges = <0 0x1e000 0x1000>; + ti,hwmods = "ctrl_module_pad_wkup"; + + omap4_pmx_wkup: pinmux@40 { + compatible = "ti,omap4-padconf", + "pinctrl-single"; + reg = <0x40 0x0038>; + #address-cells = <1>; + #size-cells = <0>; + #pinctrl-cells = <1>; + #interrupt-cells = <1>; + interrupt-controller; + pinctrl-single,register-width = <16>; + pinctrl-single,function-mask = <0x7fff>; + }; }; }; }; -- cgit From 370ad6b4670adfc3c5c7d5aad63347e8db839762 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Wed, 30 Aug 2017 08:19:40 -0700 Subject: ARM: dts: Add missing hwmods property for omap4 dma On omap4, we are missing a ti,hwmods property for dma that the that the SoC interconnect code needs. Note that this will only show up as a bug with "doesn't have mpu register target base" boot errors when the legacy platform data is removed. Cc: Peter Ujfalusi Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap4.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/boot/dts/omap4.dtsi') diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index 16ec0bd29209..24a3f70f1eef 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -312,6 +312,7 @@ #dma-cells = <1>; dma-channels = <32>; dma-requests = <127>; + ti,hwmods = "dma_system"; }; gpio1: gpio@4a310000 { -- cgit From 514b2da46fcc10bd5f42446b9fa746ba2c80aaf1 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Wed, 30 Aug 2017 08:19:41 -0700 Subject: ARM: dts: Add missing smartreflex node and binding for omap4 We are missing smartreflex device tree nodes for omap4 with their related "ti,hwmods" properties that the SoC interconnect code needs. Note that this will only show up as a bug with "doesn't have mpu register target base" boot errors when the legacy platform data is removed. And since we're missing the device tree binding for smartreflex, let's also add it and document the existing omap3 use too. Note that the related driver also needs to be updated to probe using device tree and get the platform data passed to it using auxdata with arch/arm/mach-omap2/pdata-quirks.c. Cc: Mark Rutland Cc: Nishanth Menon Cc: Rafael J. Wysocki Cc: Tero Kristo Acked-by: Rob Herring Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap4.dtsi | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) (limited to 'arch/arm/boot/dts/omap4.dtsi') diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index 24a3f70f1eef..c48b7e8713ca 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -442,6 +442,27 @@ clock-frequency = <48000000>; }; + smartreflex_iva: smartreflex@4a0db000 { + compatible = "ti,omap4-smartreflex-iva"; + reg = <0x4a0db000 0x80>; + interrupts = ; + ti,hwmods = "smartreflex_iva"; + }; + + smartreflex_core: smartreflex@4a0dd000 { + compatible = "ti,omap4-smartreflex-core"; + reg = <0x4a0dd000 0x80>; + interrupts = ; + ti,hwmods = "smartreflex_core"; + }; + + smartreflex_mpu: smartreflex@4a0d9000 { + compatible = "ti,omap4-smartreflex-mpu"; + reg = <0x4a0d9000 0x80>; + interrupts = ; + ti,hwmods = "smartreflex_mpu"; + }; + hwspinlock: spinlock@4a0f6000 { compatible = "ti,omap4-hwspinlock"; reg = <0x4a0f6000 0x1000>; -- cgit From d6e1a2381694c9a15f5a2ea9877fd20017470e95 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Wed, 30 Aug 2017 08:19:43 -0700 Subject: ARM: dts: Add missing onewire node for omap4 On omap4 we're missing the onewire node with it's related "ti,hwmods" property that the SoC interconnect code needs. Note that this will only show up as a bug with "doesn't have mpu register target base" boot errors when the legacy platform data is removed. Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap4.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'arch/arm/boot/dts/omap4.dtsi') diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index c48b7e8713ca..69d129b420e0 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -541,6 +541,13 @@ dma-names = "tx0", "rx0", "tx1", "rx1"; }; + hdqw1w: 1w@480b2000 { + compatible = "ti,omap3-1w"; + reg = <0x480b2000 0x1000>; + interrupts = ; + ti,hwmods = "hdq1w"; + }; + mcspi3: spi@480b8000 { compatible = "ti,omap4-mcspi"; reg = <0x480b8000 0x200>; -- cgit From 8be8576fcf2d90a8bc679bfb25a4121d0eebe0de Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Wed, 30 Aug 2017 13:25:20 -0700 Subject: ARM: dts: Add missing hsi node for omap4 On omap4 we're missing the hsi node with it's related "ti,hwmods" property that the SoC interconnect code needs. Note that this will only show up as a bug with "doesn't have mpu register target base" boot errors when the legacy platform data is removed. Let's also update the binding accrodingly while at it. Cc: Mark Rutland Cc: Rob Herring Reviewed-by: Sebastian Reichel Acked-by: Rob Herring Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap4.dtsi | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) (limited to 'arch/arm/boot/dts/omap4.dtsi') diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index 69d129b420e0..a3c4d3541e3d 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -624,6 +624,40 @@ dma-names = "tx", "rx"; }; + hsi: hsi@4a058000 { + compatible = "ti,omap4-hsi"; + reg = <0x4a058000 0x4000>, + <0x4a05c000 0x1000>; + reg-names = "sys", "gdd"; + ti,hwmods = "hsi"; + + clocks = <&hsi_fck>; + clock-names = "hsi_fck"; + + interrupts = ; + interrupt-names = "gdd_mpu"; + + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x4a058000 0x4000>; + + hsi_port1: hsi-port@2000 { + compatible = "ti,omap4-hsi-port"; + reg = <0x2000 0x800>, + <0x2800 0x800>; + reg-names = "tx", "rx"; + interrupts = ; + }; + + hsi_port2: hsi-port@3000 { + compatible = "ti,omap4-hsi-port"; + reg = <0x3000 0x800>, + <0x3800 0x800>; + reg-names = "tx", "rx"; + interrupts = ; + }; + }; + mmu_dsp: mmu@4a066000 { compatible = "ti,omap4-iommu"; reg = <0x4a066000 0x100>; -- cgit From 5750d6717b54ac9461912264710a3b60cda153bb Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Wed, 30 Aug 2017 08:19:46 -0700 Subject: ARM: dts: Add missing wdt3 node for omap4 On omap4 we're missing the wdt3 node with it's related "ti,hwmods" property that the SoC interconnect code needs. Note that this will only show up as a bug with "doesn't have mpu register target base" boot errors when the legacy platform data is removed. Cc: Peter Ujfalusi Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap4.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'arch/arm/boot/dts/omap4.dtsi') diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index a3c4d3541e3d..70ecd840772d 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -682,6 +682,14 @@ ti,hwmods = "wd_timer2"; }; + wdt3: wdt@40130000 { + compatible = "ti,omap4-wdt", "ti,omap3-wdt"; + reg = <0x40130000 0x80>, /* MPU private access */ + <0x49030000 0x80>; /* L3 Interconnect */ + interrupts = ; + ti,hwmods = "wd_timer3"; + }; + mcpdm: mcpdm@40132000 { compatible = "ti,omap4-mcpdm"; reg = <0x40132000 0x7f>, /* MPU private access */ -- cgit From d23a163ebe5aab85fb66fd6b1256bed34a18a269 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Tue, 10 Oct 2017 14:14:50 -0700 Subject: ARM: dts: Add nodes for missing omap4 interconnect target modules MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On omap4 we are missing dts nodes for several interconnect target modules that we are idling on init. This currently works with the legacy platform data still around. To fix this, let's add the interconnect target modules so we can idle the unused interconnect target module on init. Also note that adding the interconnect target module node does not necessarily mean that there is a driver available for the child IP block, or that the child IP block is even functional. In the SGX case, the PowerVR driver is closed source. And McASP on omap4 has at least the TX path disabled and is not supported by the davinci-mcasp driver. For AESS there is old Android 3.4 kernel driver available. For smarflex, we are still probing with platform data and the driver needs more work before we can add the device ip child nodes. And finally, we're not yet using the interconnet ranges. I will be posting separate patches for those later on. Cc: Benoît Cousson Cc: Laurent Pinchart Cc: Liam Girdwood Cc: Mark Brown Cc: Mark Rutland Cc: Mauro Carvalho Chehab Cc: Nishanth Menon Cc: Matthijs van Duin Cc: Paul Walmsley Cc: Peter Ujfalusi Cc: Rob Herring Cc: Sakari Ailus Cc: Tero Kristo Cc: Tomi Valkeinen Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap4.dtsi | 159 +++++++++++++++++++++++++++++++++++++++---- 1 file changed, 147 insertions(+), 12 deletions(-) (limited to 'arch/arm/boot/dts/omap4.dtsi') diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index 70ecd840772d..f69de916b06a 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -382,6 +382,19 @@ #interrupt-cells = <2>; }; + target-module@48076000 { + compatible = "ti,sysc-omap4"; + ti,hwmods = "slimbus2"; + reg = <0x48076000 0x4>, + <0x48076010 0x4>; + reg-names = "rev", "sysc"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x48076000 0x001000>; + + /* No child device binding or driver in mainline */ + }; + elm: elm@48078000 { compatible = "ti,am3352-elm"; reg = <0x48078000 0x2000>; @@ -442,25 +455,55 @@ clock-frequency = <48000000>; }; - smartreflex_iva: smartreflex@4a0db000 { - compatible = "ti,omap4-smartreflex-iva"; - reg = <0x4a0db000 0x80>; - interrupts = ; + target-module@4a0db000 { + compatible = "ti,sysc-sr"; ti,hwmods = "smartreflex_iva"; + reg = <0x4a0db000 0x4>, + <0x4a0db008 0x4>; + reg-names = "rev", "sysc"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x4a0db000 0x001000>; + + smartreflex_iva: smartreflex@0 { + compatible = "ti,omap4-smartreflex-iva"; + reg = <0 0x80>; + interrupts = ; + }; }; - smartreflex_core: smartreflex@4a0dd000 { - compatible = "ti,omap4-smartreflex-core"; - reg = <0x4a0dd000 0x80>; - interrupts = ; + target-module@4a0dd000 { + compatible = "ti,sysc-sr"; ti,hwmods = "smartreflex_core"; + reg = <0x4a0dd000 0x4>, + <0x4a0dd008 0x4>; + reg-names = "rev", "sysc"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x4a0dd000 0x001000>; + + smartreflex_core: smartreflex@0 { + compatible = "ti,omap4-smartreflex-core"; + reg = <0 0x80>; + interrupts = ; + }; }; - smartreflex_mpu: smartreflex@4a0d9000 { - compatible = "ti,omap4-smartreflex-mpu"; - reg = <0x4a0d9000 0x80>; - interrupts = ; + target-module@4a0d9000 { + compatible = "ti,sysc-sr"; ti,hwmods = "smartreflex_mpu"; + reg = <0x4a0d9000 0x4>, + <0x4a0d9008 0x4>; + reg-names = "rev", "sysc"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x4a0d9000 0x001000>; + + smartreflex_mpu: smartreflex@0 { + compatible = "ti,omap4-smartreflex-mpu"; + reg = <0 0x80>; + interrupts = ; + }; }; hwspinlock: spinlock@4a0f6000 { @@ -666,6 +709,19 @@ #iommu-cells = <0>; }; + target-module@52000000 { + compatible = "ti,sysc-omap4"; + ti,hwmods = "iss"; + reg = <0x52000000 0x4>, + <0x52000010 0x4>; + reg-names = "rev", "sysc"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x52000000 0x1000000>; + + /* No child device binding, driver in staging */ + }; + mmu_ipu: mmu@55082000 { compatible = "ti,omap4-iommu"; reg = <0x55082000 0x100>; @@ -760,6 +816,56 @@ status = "disabled"; }; + target-module@40128000 { + compatible = "ti,sysc-mcasp"; + ti,hwmods = "mcasp"; + reg = <0x40128004 0x4>; + reg-names = "sysc"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x00000000 0x40128000 0x1000>, /* MPU */ + <0x49028000 0x49028000 0x1000>; /* L3 */ + + /* + * Child device unsupported by davinci-mcasp. At least + * TX path is disabled for omap4, and only DIT mode + * works with no I2S. See also old Android kernel + * omap-mcasp driver for more information. + */ + }; + + target-module@4012c000 { + compatible = "ti,sysc-omap4"; + ti,hwmods = "slimbus1"; + reg = <0x4012c000 0x4>, + <0x4012c010 0x4>; + reg-names = "rev", "sysc"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x00000000 0x4012c000 0x1000>, /* MPU */ + <0x4902c000 0x4902c000 0x1000>; /* L3 */ + + /* No child device binding or driver in mainline */ + }; + + target-module@401f1000 { + compatible = "ti,sysc-omap4"; + ti,hwmods = "aess"; + reg = <0x401f1000 0x4>, + <0x401f1010 0x4>; + reg-names = "rev", "sysc"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x00000000 0x401f1000 0x1000>, /* MPU */ + <0x490f1000 0x490f1000 0x1000>; /* L3 */ + + /* + * No child device binding or driver in mainline. + * See Android tree and related upstreaming efforts + * for the old driver. + */ + }; + mcbsp4: mcbsp@48096000 { compatible = "ti,omap4-mcbsp"; reg = <0x48096000 0xff>; /* L4 Interconnect */ @@ -848,6 +954,19 @@ }; }; + target-module@4a10a000 { + compatible = "ti,sysc-omap4"; + ti,hwmods = "fdif"; + reg = <0x4a10a000 0x4>, + <0x4a10a010 0x4>; + reg-names = "rev", "sysc"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x4a10a000 0x1000>; + + /* No child device binding or driver in mainline */ + }; + timer1: timer@4a318000 { compatible = "ti,omap3430-timer"; reg = <0x4a318000 0x80>; @@ -1063,6 +1182,22 @@ status = "disabled"; }; + target-module@56000000 { + compatible = "ti,sysc-omap4"; + ti,hwmods = "gpu"; + reg = <0x5601fc00 0x4>, + <0x5601fc10 0x4>; + reg-names = "rev", "sysc"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x56000000 0x2000000>; + + /* + * Closed source PowerVR driver, no child device + * binding or driver in mainline + */ + }; + dss: dss@58000000 { compatible = "ti,omap4-dss"; reg = <0x58000000 0x80>; -- cgit