From 2ab27991c0f098f888cb3e89729caccf750cfd14 Mon Sep 17 00:00:00 2001 From: Rohit Vaswani Date: Fri, 1 Nov 2013 10:10:40 -0700 Subject: ARM: dts: qcom: Add nodes necessary for SMP boot Add the necessary nodes to support SMP on MSM8660, MSM8960, and MSM8974/APQ8074. While we're here also add in the error interrupts for the Krait cache error detection. Signed-off-by: Rohit Vaswani [sboyd: Split into separate patch, add error interrupts] Signed-off-by: Stephen Boyd Signed-off-by: Kumar Gala --- arch/arm/boot/dts/qcom-msm8660.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) (limited to 'arch/arm/boot/dts/qcom-msm8660.dtsi') diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom-msm8660.dtsi index 69d6c4edea30..c52a9e964a44 100644 --- a/arch/arm/boot/dts/qcom-msm8660.dtsi +++ b/arch/arm/boot/dts/qcom-msm8660.dtsi @@ -9,6 +9,30 @@ compatible = "qcom,msm8660"; interrupt-parent = <&intc>; + cpus { + #address-cells = <1>; + #size-cells = <0>; + compatible = "qcom,scorpion"; + enable-method = "qcom,gcc-msm8660"; + + cpu@0 { + device_type = "cpu"; + reg = <0>; + next-level-cache = <&L2>; + }; + + cpu@1 { + device_type = "cpu"; + reg = <1>; + next-level-cache = <&L2>; + }; + + L2: l2-cache { + compatible = "cache"; + cache-level = <2>; + }; + }; + intc: interrupt-controller@2080000 { compatible = "qcom,msm-8660-qgic"; interrupt-controller; -- cgit